Avnet MaaXBoard 8ULP Installation manual

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MaaXBoard 8ULP
Hardware User Guide
v1.0 October 03, 2023
Ultra-Low Power
NXP i.MX 8ULP
Development
Board

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1 Document Control
Document Version: v1.0
Document Date: 10/03/2023
Document Author: Peter Fenn
Document Classification: public
Document Distribution: public
2 Version History
Version
Date
Comment
1.0
10/03/2023
Initial release

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Contents
1Document Control.......................................................................................... 2
2Version History ..............................................................................................2
3Hardware Checklist ........................................................................................ 6
4Software Checklist .........................................................................................6
5Introduction.................................................................................................... 7
5.1 MaaXBoard 8ULP Info.............................................................................. 9
5.2 Items Included with MaaXBoard 8ULP.......................................................9
5.3 Important Reference Documents...............................................................9
5.4 Hardware Setup for Application Development ............................................ 9
6MaaXBoard 8ULP Architecture & Features .................................................... 11
6.1 Features................................................................................................ 11
6.2 Block Diagram –NXP i.MX8ULP Processor............................................. 12
6.3 8ULP Architecture Diagram..................................................................... 13
6.4 Block Diagram –MaaXBoard 8ULP......................................................... 14
6.5 MaaXBoard 8ULP SOM Component Locations ........................................ 15
6.6 MaaXBoard 8ULP BaseBoard Component Locations (Top)....................... 16
6.7 MaaXBoard 8ULP BaseBoard Component Locations (Bottom).................. 17
6.8 Boot DIP-Switches, Button-Switches and LEDs........................................ 18
6.8.1 Boot Mode DIP Switches (SW3)..............................................................................18
6.8.2 Push-Button Switches ............................................................................................18
6.8.3 Status LEDs ..........................................................................................................18
6.9 Memory Resources................................................................................ 19
6.10 Wireless Connectivity ............................................................................. 20
6.10.1 Wi-Fi SDIO Interface..............................................................................................20
6.10.2 BT/BLE UART Interface..........................................................................................20
6.10.3 BT PCM Audio Interface.........................................................................................21
6.10.4 Wi-Fi / BT antenna.................................................................................................23
6.11 Peripheral Devices and Interfaces........................................................... 24
6.11.1 USB 2.0 FTDI Remote Debug Interface...................................................................24
6.11.2 USB 2.0 Device Interface........................................................................................24
6.11.3 USB 2.0 Host Interface...........................................................................................24
6.11.4 10/100 Ethernet (with IEEE 1588 time-sync.)...........................................................24
6.11.5 CAN-FD ................................................................................................................24

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6.11.6 MIPI-DSI Display and Touchscreen.........................................................................24
6.11.7 MIPI-CSI Camera...................................................................................................25
6.11.8 Digital Microphones................................................................................................25
6.11.9 Audio Codec..........................................................................................................25
6.11.10 J9: Stereo Audio Jack.............................................................................................26
6.11.11 J1: Pi-HAT compatible 40-pin header ......................................................................27
6.11.12 MikroE Click Boards...............................................................................................28
6.11.13 MikroE Pi-2-Click HAT Adapter Pinout.....................................................................28
6.11.14 J15: 16-pin MikroE Click Shuttle expansion header ..................................................29
6.11.15 Pi HAT Expansion Boards ......................................................................................29
6.11.16 SWD/JTAG debugger 10-pin mini-header................................................................30
6.12 Power Input, Protection and Regulation ................................................... 31
6.12.1 USB type-C Connector...........................................................................................31
6.12.2 ESD Protection......................................................................................................31
6.12.3 Power Regulation...................................................................................................31
6.12.4 Measuring Power Consumption...............................................................................31
6.12.5 8ULP Power Domains ............................................................................................32
7MaaXBoard 8ULP Example Applications ....................................................... 35
7.1 Avnet-Supplied Reference Designs ......................................................... 35
8Known Issues .............................................................................................. 36
9Cautionary Notes ......................................................................................... 36
10 Technical Support ........................................................................................ 37
10.1 NXP-hosted Technical Support Resources .............................................. 37
10.2 Avnet-hosted Technical Support Resources............................................. 37
11 Sales Contact Info........................................................................................ 37
12 Disclaimer.................................................................................................... 38
13 Safety Warnings........................................................................................... 38
14 MaaXBoard 8ULP Accessories ..................................................................... 39
14.1 MIPI DSI 7-inch Capacitive Touch LCD Display (optional)......................... 39
14.2 MIPI DSI 5-inch Capacitive Touch LCD Display (optional)......................... 39
14.3 MIPI CSI 5 MP Camera (optional) ........................................................... 40
14.4 MCU-LINK Debugger/Programmer Probe (optional for M33 debug)........... 41
14.5 MCU-LINK-PRO Debugger/Programmer Probe (optional for M33 debug)... 42
14.6 Other SBCs, SOMs and Accessories from Avnet Boards .......................... 43
15 MaaXBoard 8ULP Out-of-Box Demo Application............................................ 45

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Figures
Figure 1 –MaaXBoard 8ULP Baseboard (BB) and Compute Module (SOM ............. 8
Figure 2 –i.MX 8ULP vs i.MX 8ULP-CS Processor Block Diagram........................ 12
Figure 3 –MaaXBoard 8ULP Block Diagram........................................................ 14
Figure 4 –MaaXBoard 8ULP Memory Compared to EVK ...................................... 19
Figure 5 –Murata Type-1ZM Wi-Fi/BT Combo Module Block Diagram................... 21
Figure 6 –Detail of Wi-Fi/BT M.2 Module Implementation..................................... 23
Figure 7 –Example Current-measurement USB Dongle ....................................... 31
Figure 8 –8ULP Power Management Scheme..................................................... 33
Figure 9 –NXP MCU-LINK Debug/Programmer Probe ......................................... 41
Figure 10 –NXP MCU-LINK-PRO Debug/Programmer Probe............................... 42
Tables
Table 1 –Hardware Checklist ............................................................................... 6
Table 2 –Software Checklist.................................................................................6
Table 3 –Key Components on MaaXBoard 8ULP SOM........................................ 15
Table 4 –Key Components on MaaXBoard 8ULP BaseBoard (top)....................... 16
Table 5 –Key Components on MaaXBoard 8ULP BaseBoard (bottom).................. 17
Table 6 –BT PCM Audio Interface (mapped to SDK/EVK signal names)................ 21
Table 7 –Wi-Fi/BT Module Interface.................................................................... 22
Table 8 –Pi-HAT compatible 40-pin header (J1) .................................................. 27
Table 9 –16-pin MikroE Click Shuttle expansion header (J15) .............................. 29
Table 10 –SWD/JTAG debugger 10-pin mini-header (J16)................................... 30

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3 Hardware Checklist
Hardware items recommended for application development are the following
#
Item Description
1
Computer (Windows / Linux / Mac) with installed development tools (see below)
2
Avnet MaaXBoard 8ULP board http://avnet.me/MaaXBoard-8ULP
3
NXP MCU-LINK Debugger/Programmer Probe
(plus USB type-A to MicroUSB cable)
4
5V 2A power adapter
(plus USB type-A to USB type-C cable)
5
USB current monitor dongle (optional)
6
MaaXBoard MIPI-DSI 7” Capacitive Touch 720 x 1280 Display (optional)
p/n: AES-ACC-MAAX-DISP2
7
MIPI-CSI Camera, 5 MP, OV5640 image sensor (optional)
p/n: Arducam B0470 camera
Table 1 –Hardware Checklist
4 Software Checklist
Listed below are the software items mentioned in this document
#
Item Description
1
Visual Studio Code IDE
https://code.visualstudio.com/download
2
NXP MCUXpresso SDK (SDK_2.14.1_EVK-MIMX8ULP or later)
Search by name: “8ULP-EVK” on NXP SDK builder site at:
https://mcuxpresso.nxp.com/en/select
Select MIMX8ULP-EVK then
click Build MCUXpresso SDK_2.14.1_EVK-MIMX8ULP to download
3
Avnet MaaXBoard 8ULP pre-built Boot image
and MaaXBoard 8ULP pre-built Linux BSP image
Table 2 –Software Checklist

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5 Introduction
MaaXBoard 8ULP has been engineered as two PCBs:
•a small SOM (43mm x 36mm) fitted via 2x100-pin connectors onto
•a compact Raspberry Pi form-factor baseboard (85mm x 56mm)
The baseboard supports multiple communication-, UI and vison interfaces, including:
•2x USB 2.0 Host and 1x USB 2.0 device interfaces
•1x 100M Ethernet
•Wi-Fi 5 / BT5.1 wireless M.2 module + U.FL external antenna (optional)
•MIPI DSI touchscreen display interface (4 lane)
•MIPI CSI camera interface (2 lane)
Audio and voice UI applications are supported via onboard:
•Stereo audio codec
•Stereo headphone jack and single digital microphone
Three sets of expansion headers further extend the board’s capabilities:
•a Pi-HAT compatible 40-pin header,
•a MikroE Click 16-pin header
•an ADC/DAC 6-pin header.
The board’s unique debug subsystem supports remote USB access to:
•Three UARTs (for A35 #0, A35 #1 and M33 debug interfaces)
•I/O expander-based remote control & monitoring (16 signals)
•integrated SWD/JTAG debugger interface (or external 10pin header)
On rear of the board an M.2 connector facilitates addition of a Wi-Fi 5 + Bluetooth 5.1 wireless module.
The i.MX 8ULP device on this board is architected with 3 separated processor power domains:
•Application domain includes two Arm®Cortex®-A35 (800 MHz) cores plus 3D/2D GPUs
•Real Time domain includes an Arm Cortex-M33 (216 MHz) core, plus Fusion DSP (200 MHz) core
•LPAV domain (Low Power Audio Video) has a HiFi 4 DSP (475 MHz)
The i.MX8ULP is also differentiated from other processor solutions by it’s:
•Large amount of OCRAM (896 KB)
•Advanced EdgeLock®security enclave .
Input power (+5V) is sourced via the USB-C Device connector (or the R-Pi header pins) and is managed
via NXP's PCA9460B PMIC on the SOM plus three additional voltage regulators.

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Figure 1 –MaaXBoard 8ULP Baseboard (BB) and Compute Module (SOM

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5.1 MaaXBoard 8ULP Info
•Part# to order: AES-MAAXB-8ULP-SK-G
•Product Page: http://avnet.me/MaaXBoard-8ULP
5.2 Items Included with MaaXBoard 8ULP
•MaaXBoard 8ULP board
•QuickStart Card
•Downloadable examples, reference designs and documentation
5.3 Important Reference Documents
•MaaXBoard 8ULP QuickStart Card
•MaaXBoard 8ULP Product Brief
•MaaXBoard 8ULP Hardware User Guide (this document)
•NXP MIMX8ULPRM Reference Manual
5.4 Hardware Setup for Application Development
The simplest minimal development setup is shown below
This provides +5V power, console debug interfaces and network connectivity

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The development setup below adds:
•5MP MIPI-CSI camera and
•the abilityto read-back current measurements from an external TC66 power measurement USB dongle
Tothissetupa 7-inch touch panel displaycan alsobe added via theMIPI-DSIconnector on leftsideof the board

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6 MaaXBoard 8ULP Architecture & Features
6.1 Features
NXP Processor (PIMX8UD7CVP08SC)
2x Arm®Cortex®-A35 @ 800 MHz
1x Arm®Cortex®-M33 @ 216 MHz
1x Cadence®Tensillica®Hifi 4 DSP @475 MHz for advanced audio, voice and ML processing
1x Fusion DSP @200 MHz for low-power voice and sensor hub processing
3D/2D GPU @ 317 MHz (supports Open GL®ES 3.1, OpenCLTM, Vulkan®)
EdgeLockTM security enclave
RISC-V powered Power Management Subsystem (µpower)
NXP PMIC (PCA9460BUKZ)
PCA9460B 13-channel PMIC for Ultra Low Power applications
Memory
2GB LPDDR4X (x32b)
8MB PSRAM
896KB OCRAM
32GB eMMC
4MB QSPI NOR
Camera and Display MIPI Interfaces
1x MIPI DSI (4-lane) with PHY (compatible 7-inch and 5-inch displays available from Avnet)
1x MIPI CSI (2-lane) with PHY (compatible 5MP CSI camera available from Arducam)
USB Host and Device Interfaces
2x USB 2.0 Host ports (type-A)
1x USB 2.0 Device port (type-C)
Network Connectivity
10/100 Ethernet (Microchip KSZ8081RNBCA PHY)
Wi-Fi 5 / BT5.1 wireless M.2 module + U.FL external antenna (optional add-on accessory item)
Audio Resources
Stereo audio codec (DA7212)
Stereo headphone jack
1x digital microphone (MP34DT05)
Expansion Interfaces
Pi-HAT compatible 40-pin header,
MikroE Click 16-pin header
ADC/DAC 6-pin header.
Debug Interfaces
USB-to-serial bridge to three UARTs (A35 #0, A35 #1 and M33 debug console interfaces)
USB to I/O expander for remote control & monitoring (16 signals)
Integrated USB to SWD/JTAG debugger interface
10pin SWD/JTAG header for use with external J-LINK or NXP debug probe

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6.2 Block Diagram –NXP i.MX8ULP Processor
Figure 2 –i.MX 8ULP vs i.MX 8ULP-CS Processor Block Diagram

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6.3 8ULP Architecture Diagram
Refer to lastpage of Chapter 2(page 36) in the i.MX 8ULP Reference Manual (IMX8ULPRM_Rev1_DraftA.pdf
or later) for a higher-resolution version of this 8ULP architecture diagram

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6.4 Block Diagram –MaaXBoard 8ULP
Figure 3 –MaaXBoard 8ULP Block Diagram

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6.5 MaaXBoard 8ULP SOM Component Locations
#
Ref
Component Description
Manufacturer and P/N
Domain
1
U5
NXP iMX 8ULP processor
NXP MIMX8UD7DVP10SA
A35/M33
2
U1
NXP PCA9460B PMIC
NXP PCA9460BUK
n/a
3
U6
LPDDR4X SDRAM memory
Micron MT53E512M32D1ZW-046 IT:B
A35-only
4
U7
eMMC Flash (32GB)
ISSI / Micron EMMC16G-TB29-PZ90
A35/M33
5
U8
Octal SPI NOR HyperFlash
Spansion S26KS256SDPBHI020
A35-only
6
U13
Octal SPI PSRAM
ISSI IS66WVO8M8DALL-200BLI
M33-only
7
U15
Octal SPI NOR Flash
Adesto ATXP032-CCUE-T
M33-only
8
U14
0V6 LDO for LPDDR4X (NI)
Renesas (Intersil) ISL80111RAJZ
n/a
9
U28
VDD3V3 dc/dc regulator
Richtek RT8010
n/a
10
U2
Ext. Load Switch (NI)
Onsemi NCP451AFCT2G
n/a
Table 3 –Key Components on MaaXBoard 8ULP SOM

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6.6 MaaXBoard 8ULP BaseBoard Component Locations (Top)
#
Ref
Component Description
#
Ref
Component Description
11
J30
USB-C Remote Debug interface
23
U44
EEPROM for FT4232
12
J22
USB-C Download & Power interface
24
J4
MIPI CSI camera Connector
13
J5
MIPI DSI Display connector
25
U24
RMII Ethernet PHY
14
U30
8bit 3-state buffer/driver (TSSOP48)
26
U47
4-port USB hub
15
U59
16bit 3-statebuffer/driver (TSSOP20)
27
J29
Stereo audio Jack
16
U46
3V3 LDO (for FTDI debug interface)
28
J14
Gig Ethernet RJ45 connector
17
J16
JTAG/SWD 10-pin header
29
J26
Stacked USB host connectors
18
J15
MikroE Click Shuttle 16-pin header
30
LED1
RGB LED
19
U19
3V3 dc/dc regulator
31
U1
Digital Microphone
20
J27
SS5 120-pin B2B connector (lower)
32
S1
RESET button
21
J28
SS5 120-pin B2B connector (upper)
33
S2
USER-1 button
22
U37
FT4232H FTDI 4-port USB bridge
34
S3
USER-2 button
Table 4 –Key Components on MaaXBoard 8ULP BaseBoard (top)

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6.7 MaaXBoard 8ULP BaseBoard Component Locations (Bottom)
#
Ref
Component Description
#
Ref
Component Description
35
U13
Audio Codec
39
U8
8bit IO expander
36
J10
M.2 Wi-Fi/BT module connector
40
SW3
Boot mode DIP switches
37
U42
JTAG/SWD source selector
41
MH
M.2 module mounting hole
38
U58
Debug UART source selector
42
MH
8ULP SOM mounting holes
Table 5 –Key Components on MaaXBoard 8ULP BaseBoard (bottom)

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6.8 Boot DIP-Switches, Button-Switches and LEDs
6.8.1 Boot Mode DIP Switches (SW3)
DIP switches for manual strapping of boot-mode and config settings are on back of the PCB
6.8.2 Push-Button Switches
Three pushbuttons are located near the board edge, in the bottom-right corner
Ref.
Des
Switch
Name
Button Switch
Function
I.MX 8ULP
GPIO Pin
8ULP Board
Function
S1
RESET
VDD_3V3 On/Off
(SNVS IN power domain)
n/a
System Reset, active low
S2
USER-A
WAKEUP
(SNVS ANA power domain)
PTF7
GPIO Input
S3
USER-B
WAKEUP
(SNVS ANA power domain)
PTF30
GPIO Input / ONOFF input
6.8.3 Status LEDs
Ref.
Des.
LED Status
Function
LED
Color
I.MX 8ULP
GPIO Pin
8ULP Board
Function
D15
PWR
Green
n/a
3V3 status
LED1
USER-RED
Red
PTF29
GPIO / PWM
LED1
USER-GREEN
Green
PTF20
GPIO / PWM
LED1
USER-BLUE
Blue
PTE6
GPIO / PWM
SW3
#
Signal
Name
Selected Function
Description
1
BT_CFG0
0
1
No Low-Power Boot
LP boot from M33, boot A35 on demand
2
BT_CFG1
0
1
Boot from eMMC
Boot from A35/eMMC and M33/QSPI
3
BT_CFG4
0
1
M33 boot from SPI NOR
M33 boot from eMMC
4
BT_MODE0
00
01
10
11
Boot From Fuses
Serial Downloader
Internal Boot (Development)
Reserved
5
BT_ MODE1
6
JTAG_SEL
0
1
FTDI interface (OpenOCD debugger)
10-pin header (External debugger probe)

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6.9 Memory Resources
Onboard memory resources are similar to what is available on the NXP MIMX8ULP EVK board
(For the application processor however, booting from NOR/NAND SPI flash is not supported)
Memory
Interface
MaaXBoard
8ULP SOM
Mem
Size
NXP
8ULP-EVK SOM
Mem
Size
DDR
LPDDR4X
MT53E512M32D1ZW-046 IT:B
2 GB
LPDDR4
MT53D512M32D2DS-053 WT:D
2 GB
SDHC0
eMMC
EMMC16G-TB29-PZ90
16 GB
eMMC
SDINBDA6-32G-I
32 GB
SDHC1
-not used-
n/a
-not used-
n/a
SDHC2
(Wi-Fi/BT module)
n/a
(Wi-Fi/BT module)
n/a
FlexSPI0
M33 Octal SPI NOR Flash
ATXP032-CCUE-T
4 MB
M33 Octal SPI NOR Flash
ATXP032-CCUE-T
4 MB
FlexSPI1
M33 Octal SPI PSRAM
IS66WVO8M8DALL-200BLI
8 MB
M33 Octal SPI PSRAM
APS6408L-OBM-BA
8 MB
FlexSPI2
-not used-
n/a
A35 Octal SPI NOR Flash
MX25UW51345GXDI00
64 MB
Figure 4 –MaaXBoard 8ULP Memory Compared to EVK
Memory
Type
Memory
Size
8ULP
Interface
Avnet
Supplier
Part
Number
LPDDR4X
SDRAM
2 GB
DDR
Micron
MT53E512M32D1ZW-046
IT:B
eMMC flash
32 GB
SDHC0
Micron
MTFC32GAZAQHD-IT
Octal SPI
NOR Flash
4 MB
FlexSPI1
Renesas
(Adesto)
AT25QL128A-UIUE-T
Octal SPI
PSRAM
8 MB
FlexSPI1
ISSI
IS66WVO8M8DALL-200BLI

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6.10 Wireless Connectivity
MaaXBoard 8ULP uses a Murata Type-1ZM Wi-Fi 5 and Bluetooth 5 combo module, which is based on the
NXP 88W8987 device. Both 2.4 GHz and 5 GHz Wi-Fi operation is supported
Interfaces between the NXP 88W8987 based module and the NXP I.MX 8ULP host processor include:
•Wi-Fi SDIO 3.0 (4-bit) interface (uses SDHC2)
•BT/BLE UART 4-wire interface (uses LPUART6)
•Bluetooth audio PCM interface (uses I2S5)
•M.2 USB interface (unused) (uses HUB4)
6.10.1 Wi-Fi SDIO Interface
USDHC1 interface is configured for 1.8V operation and is clocked at 200 MHz
(This is the same SDIO interface as used on the i.MX 8ULP-EVK)
6.10.2 BT/BLE UART Interface
LPUART10 includinghardware flow is routed from the i.MX8ULP via a 3.3V to1.8V level-shifter,to
the 1ZM module’s Bluetooth UART interface.(Note use of LPUART10 interfaceis different from what
used on the i.MX 8ULP-EVK, which uses LPUART2 for this interface)