Axiom CML-5485 Instructions for use

DOC-0347-010 REV. C
ٛAxiom Manufacturing •2813 Industrial Lane •Garland, TX 75041
Email: [email protected] Web: http://www.axman.com ٛ
CML-5485
Application Board for Freescale MCF5485 MCU
Hardware User Manual

CML-5485 USER MANUAL V1.0 06/22/05
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CONTENTS
CAUTIONARY NOTES...........................................................................................................................................................3
TERMINOLOGY......................................................................................................................................................................3
FEATURES................................................................................................................................................................................4
GETTING STARTED...............................................................................................................................................................5
SOFTWARE DEVELOPMENT.......................................................................................................................................................5
REFERENCE DOCUMENTATION .................................................................................................................................................5
CML-5485 STARTUP................................................................................................................................................................6
CML-5485 HARDWARE CONFIGURATION AND OPTIONS.........................................................................................6
POWER SUPPLY ...................................................................................................................................................................7
RESET AND RESET_SW........................................................................................................................................................7
INDICATORS.........................................................................................................................................................................7
ABORT SWITCH......................................................................................................................................................................7
SYSTEM CLOCK...................................................................................................................................................................8
MEMORY...............................................................................................................................................................................8
COMMUNICATION PERIPHERALS...................................................................................................................................8
CML-5485 PORTS AND CONNECTORS .............................................................................................................................8
PWR - POWER JACK.................................................................................................................................................................8
COM1 AND COM2 PORTS.......................................................................................................................................................9
COM PORT OPTIONS........................................................................................................................................................9
CAN PORT .............................................................................................................................................................................10
J4 AND J5 ETHERNET PORTS...............................................................................................................................................10
MCU_PORT..........................................................................................................................................................................11
BUS_PORT...........................................................................................................................................................................12
ADDRESS_PORT.................................................................................................................................................................13
BDM_PORT..........................................................................................................................................................................13
J1 PCI PORT...........................................................................................................................................................................14
TROUBLESHOOTING ............................................................................................................................................................16
DBUG MONITOR OPERATION..........................................................................................................................................17
DBUG COMMUNICATION:......................................................................................................................................................17
DBUG SYSTEM INITIALIZATION.............................................................................................................................................17
Interrupt Service Support ..................................................................................................................................................17
DBUG MEMORY MAP ............................................................................................................................................................18
DBUG COMMANDS ................................................................................................................................................................19
dBUG Command Table .....................................................................................................................................................19
DBUG ETHERNET SUPPORT ...................................................................................................................................................20
Configuring dBUG Network Parameters ..........................................................................................................................21
APPENDIX 1: DBUG COMMAND SET..............................................................................................................................22
ASM - ASSEMBLER...............................................................................................................................................................22
BC - BLOCK COMPARE...........................................................................................................................................................23
BF - BLOCK FILL....................................................................................................................................................................23
BM - BLOCK MOVE................................................................................................................................................................24
BR - BREAKPOINTS ................................................................................................................................................................24
BS - BLOCK SEARCH..............................................................................................................................................................25
DC - DATA CONVERSION .......................................................................................................................................................26
DI - DISASSEMBLE .................................................................................................................................................................26
DL - DOWNLOAD CONSOLE ...................................................................................................................................................27
DLDBUG – DOWNLOAD DBUG (UPDATE)............................................................................................................................28
DN - DOWNLOAD NETWORK..................................................................................................................................................28
FL – FLASH LOAD OR ERASE .................................................................................................................................................29
GO – EXECUTE USER CODE ....................................................................................................................................................30

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GT - EXECUTE TO ADDRESS ..................................................................................................................................................30
IRD - INTERNAL REGISTER DISPLAY......................................................................................................................................31
IRM - INTERNAL REGISTER MODIFY......................................................................................................................................31
HELP - HELP .........................................................................................................................................................................32
LR - LOOP READ....................................................................................................................................................................32
LW - LOOP WRITE .................................................................................................................................................................32
MD - MEMORY DISPLAY........................................................................................................................................................33
MM - MEMORY MODIFY........................................................................................................................................................34
MMAP - MEMORY MAP DISPLAY..........................................................................................................................................34
RD - REGISTER DISPLAY........................................................................................................................................................35
RM - REGISTER MODIFY........................................................................................................................................................35
RESET - RESET THE BOARD AND DBUG...............................................................................................................................36
SET - SET CONFIGURATIONS..................................................................................................................................................36
SHOW - SHOW CONFIGURATIONS .........................................................................................................................................37
STEP - STEP OVER.................................................................................................................................................................38
SYMBOL - SYMBOL NAME MANAGEMENT...........................................................................................................................38
TRACE - TRACE INTO ...........................................................................................................................................................39
UP – UPLOAD NETWORK........................................................................................................................................................39
VERSION - DISPLAY DBUG VERSION..................................................................................................................................40
TRAP #15 FUNCTIONS...........................................................................................................................................................40
OUT_CHAR.......................................................................................................................................................................40
IN_CHAR...........................................................................................................................................................................41
CHAR_PRESENT..............................................................................................................................................................41
EXIT_TO_dBUG ...............................................................................................................................................................42

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Cautionary Notes
1) Electrostatic Discharge (ESD) prevention measures should be applied whenever handling
this product. ESD damage is not a warranty repair item.
2) Axiom Manufacturing reserves the right to make changes without further notice to any
products to improve reliability, function or design. Axiom Manufacturing does not assume any
liability arising out of the application or use of any product or circuit described herein; neither
does it convey any license under patent rights or the rights of others.
3) EMC Information on the CML-5485 board:
a) This product as shipped from the factory with associated power supplies and cables, has
NOT been tested for requirements of CE and the FCC a CLASS A products.
b) This product is designed and intended for use as a development platform for hardware
or software in an educational / professional laboratory or as a component in a larger
system.
c) In a domestic environment this product may cause radio interference in which case the
user may be required to take adequate prevention measures.
d) Attaching additional wiring to this product or modifying the products operation from the
factory default as shipped may effect its performance and also cause interference with
other apparatus in the immediate vicinity. If such interference is detected, suitable
mitigating measures should be taken.
Terminology
This development board applies option selection jumpers. Terminology for application of the
option jumpers is as follows:
Jumper on, in, or installed = jumper is a plastic shunt that fits across 2 pins and the
shunt is installed so that the 2 pins are connected with the shunt.
Jumper off, out, or idle = jumper or shunt is installed so that only 1 pin holds the shunt,
no 2 pins are connected, or jumper is removed. It is recommended that the jumpers be
placed idle by installing on 1 pin so they will not be lost.
This development board applies option selections indicated CT or R designations that require a
razor knife and soldering tool to install or remove. The default closed type connection places
an equivalent Jumper Installed type option. Applying the connection can be performed by
installing a resistor component or small wire for 0 ohms between the option pads. See the
Options sections for more details.

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FEATURES
CML-5485 is a low cost development kit for the Freescale MCF5485 ColdFire®
microcontroller. Application development is quick and easy with the included Axiom CML-5485
evaluation / application board, DB9 serial cable, Ethernet cable, BDM Cable, and GNU
Software Tool Package that includes C compiler and source level debug utilities. The BDM port
is compatible with standard ColdFire®BDM / JTAG development cables.
Features:
MCF5485 CPU
o200Mhz operation
o32K Byte Ram (on chip)
o32K Byte Data and Instruction Caches
oDouble Precision Floating Point Unit (FPU)
oMemory management Unit (MMU)
oSecurity Encryption Controller (SEC)
oPCI V2.2 bus controller w/ arbitration unit
o16 Channel DMA Controller
o4 x 16 bit Timers w/ PWM
oDSPI and IIC Serial Ports
o4 x UART Ports with IRDA / DMA capability
oUSB V2.0 device transceiver, 6 endpoints
oInterrupt Controller
oBDM / JTAG Port
o3.3V / 1.5V operation
8M Byte Flash (16 bit, external)
64M Bytes DDR RAM (32 bit, external)
25Mhz Reference clock, 200Mhz core operation
2 x 10/100TX Ethernet Ports w/ RJ45 Connectors,
LNK, DUP, SPD indicators for each port
Auto Negotiation and MDIX connections
2 x COM Ports (UART0/1) w/ RS232 DB9-S Connectors
USB type B connector w/ USB device I/O
2 x CAN Ports w/ 1 M baud transceivers, 5 pin Term Block
PCI V2.2 Bus connector, 3.3V bus, 50Mhz maximum.
MCU Port, 50 pins w/ I/O port signals
ADDRESS Port, 34 pin Demultiplexed Address BUS signals
BUS Port, 50 pins, Multiplexed Address and Data signals w/ control signals
BDM / JTAG Port, 26 Pins, development port.
RESET switch and indicator
ABORT (IRQ7) switch
Regulated +5V, 3.3V, 2.5V and 1.5V power supplies w/ 3.3V indicator
Supplied with DB9 Serial Cable, Cat 5E Ethernet cable, BDM Development Cable,
Utility / Support CD, Manuals, and 12V Universal Wall Adapter power supply.
Specifications:
Board Size 4.5” x 5.0”, 8 layers
Power Input: +8 - +24VDC, 12VDC typical
Current Consumption: 200ma @ 12VDC input
CML-5485 is a low cost development system for the Freescale MCF5485 Coldfire®
microcontroller. Application development is quick and easy with the included DB9 serial cable,
Ethernet cable, Debug firmware monitor, and GNU c compiler with utilities. The BDM port is
compatible with standard Coldfire BDM / JTAG interface cables and hosting software, allowing
easy application debugging and development.
CML-5485

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GETTING STARTED
The CML-5485 single board computer is a fully assembled, fully functional application board
for the Freescale MCF5485 microcontroller. Provided with wall plug power supply, Ethernet
cable, and serial cable. Support software provided for this development board is for Windows
95/98/NT/2000/XP operating systems.
Development board users should also be familiar with the hardware and software operation of
the target MCF5485 device, refer to the provided Freescale User Guide for the device and the
Coldfire Reference Manual for details. The development board purpose is to assist the user in
quickly developing an application with a known working environment, to provide an evaluation
platform, or as a control module for an applied system. Users should be familiar with memory
mapping, memory types, and embedded software design for the quickest successful
application development.
Software Development
Application development maybe performed by applying the dBUG firmware monitor, or by
applying a compatible Coldfire BDM / JTAG cable with supporting host software. The monitor
provides an effective and low cost command line debug method.
Software development is best performed with a development tool connected to the BDM port.
This provides real-time access to all hardware, peripherals and memory on the board.
Development tool software also provides high-level (C/C++) source code debug environment.
The target development environment and procedure for best success is to place software to be
tested into RAM memory. Execute software to be tested under dBUG monitor or development
tool control, after software is tested and operational, port and program application into FLASH
memory to execute new application when power is applied.
Reference Documentation
Reference documents are provided on the support CD in Acrobat Reader®format.
CML5485UM.pdf – This user manual.
MCF5485UM.pdf – MCF5485 Device User Manual
CFPRM.pdf – Coldfire Programmers Reference Manual with instruction set
CML5485_SCH_C.pdf – CML5485 board schematics

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CML-5485 Startup
Follow these steps to connect and power on the board for the default dBUG monitor operation.
1) Carefully unpack the CML-5485 and observe ESD preventive measures while handling the
CML-5485 development board.
2) Load the ColdFire support CD into the PC and install the AxIDE terminal software from the
utilities directory, OR configure HyperTerminal for a direct connection to the PC COM port
to be applied for serial communication with the CML-5485 board. Set the baud rate to
19.2K baud, 8 data bits, 1 stop bit, and no parity. Software XON / XOFF flow control
should be enabled for flash memory support operations. Use the AxIDE ‘√’ tool bar button
to configure the COM port on the PC.
3) Connect the CML-5485 board COM1 serial port connector to the host PC COM port with
the provided 9 pin serial cable.
4) Apply power to the development board by installing the wall plug power supply between a
wall outlet and the PWR Jack on the board. The board voltage indicators should turn on at
this time. The RESET indicator will flash during power on or Reset switch press.
5) Observe the AxIDE or HyperTerminal window display for the dBUG monitor prompt.
Prompt should be similar to the following:
Hard Reset
DRAM Size: 64M
Copyright 1995-2003 Freescale, Inc. All Rights Reserved.
ColdFire MCF5485 Firmware v2e.1a.xx (Build XXX on XXX XX 20XXxx:xx:xx)
Enter 'help' for help.
dBUG>
6) The board is ready to use now. See the dBUG monitor section of the user manual for
additional monitor information. If BDM / JTAG development port interfaced tools are to be
applied, see the BDM PORT section of this manual for more details on installation.
CML-5485 Hardware Configuration and Options
The CML-5485 board provides a basic development or application platform for the MCF5485
microcontroller. Following are descriptions of the main components and options provided on
the board.

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POWER SUPPLY
Input power is applied by external connection to the PWR power jack. The input supply is
provided to the 3.3V primary supply regulator VR1 and the PCI +5V regulator VR5.
VR2 provides 2.5V peripheral and DDRAM supply from the 3.3V supply. VR3 provides the
1.5V core supply from the 3.3V supply. VR4 is the DDRAM termination supply. With +8 to
+20VDC applied at the PWR jack, the POWER Indicator should be ON. External fuse of 1A
and optional ON / OFF switch should be applied in system applications to the PWR jack input
supply.
RESET and RESET_SW
External reset is provided by the RESET switch, LV1 low voltage detector, or user applied
connection to the RESET* signal on the BUS_PORT. These external Reset sources activate a
150ms minimum pulse duration to the MCF5485 RSTI* input. If the main 3.3V supply is below
operating level, the LV1 voltage detector will cause the MCF5485 to stay in the RESET
condition.
The BDM port provides a direct connection to the MCF5485 RSTI* for Reset application by
development tools.
Application of RESET will cause the dBUG monitor or user application to initialize the
MCF5485. Previous DDRAM memory content and operating state of the MCF5485 will be lost.
INDICATORS
Indication is provided for power supply status, CPU Reset status, and Ethernet status. The
indications may be applied to determine proper operation of the development board.
Indicator Summary
INDICATOR COLOR OPERATION DEFAULT CONDITION
POWER Green +3.3V power present ON
RESET RED CPU is in RESET state OFF
LNK Green Ethernet channel has Link ON with Network connected
100 Green Ethernet channel is operating
100 base ON if 100 base network, OFF if 10 base network
DUP Green Ethernet channel is operating
full duplex ON if full duplex network
ABORT Switch
The ABORT switch provides for manual application of the IRQ7 interrupt signal. This
operation will allow the dBUG monitor to stop execution of a user program and maintain the
CPU operating state for user examination. After application of the ABORT switch, dBUG will
prompt the current program instruction pending. Display is similar to a breakpoint operation.

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SYSTEM CLOCK
The system clocks are provided by U2 with 25MHz reference oscillator Y2. U2 provides
separate 50MHz primary clocks to the MCF5485, PCI Bus and connector J1, and the
BUS_PORT if R63 is installed. A 25Mhz clock from U2 is also provided to the Ethernet PHY
device U12. The MCF5485 local bus operates at the 50Mhz primary clock frequency. Internal
PLL clock generation of the MCF5485 provides 100MHz DDRAM clock and 200MHz core
clock. The MCF5485 USB reference clock of 12MHz is provided by crystal oscillator Y1.
MEMORY
Memory is provided in the MCF5485 device and externally on the development board. The
MCF5485 provides 64K bytes of SRAM memory internally. Board memory consists of 64M
Bytes of DDRAM on the SDRAM bus and 8M bytes of Flash memory on the FLEX Bus. The
debug monitor occupies the first or lower 256K bytes of the board Flash memory. User should
refer to the dBUG memory map for default memory allocation and physical locations.
The BUS and ADDRESS Ports maybe applied for Flex Bus expansion off board.
Note: The MCF5485 DDRAM controller must be configured prior to application of the memory
space when BDM or JTAG tools are applied.
COMMUNICATION PERIPHERALS
The CML-5485 provides 7 conditioned communication ports, 2 x 10/100TX Ethernet, 2 x
RS232 Serial COM, 2 x CAN, and a USB port. User should refer to the respective manual
chapter for details of operation and connection of each port.
CML-5485 PORTS AND CONNECTORS
PWR - Power Jack
PWR provides the default power input to the board. The power jack accepts a standard 2.0 ~
2.1mm center barrel plug connector (positive voltage center) to provide the +V supply of +8 to
+20 VDC (+12VDC typical).
+Volts, 2mm center

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COM1 and COM2 Ports
The COM1 and 2 ports provide standard 9 pin serial connection with RS232 type interface to
the MCF5485 UART0 and UART1 peripherals respectfully. The COM1 port is applied by the
dBUG monitor at 19.2K baud default. Both ports will connect to a standard PC COM port with
a straight through type 9 pin serial cable. Following is the DB9S connection reference.
COM1 or COM2
11X
TXD 2 6 6
RXD 3 7 7 CTS
44 8 8 RTS
GND 5 9 9
The COM-1or 2 port is a DB9 socket connector with RS232
signal levels.
RXD maybe isolated from port by option, see chart below.
CTS / RTS are enabled by options, see chart below.
1,4,6 connected for status null to host
The 1, 4, 6 and 9 pins provide RS232 status signals. These DB9 connector locations are
provided access pads behind the connector.
COM PORT OPTIONS
The following table provides COM options and default connections to the MCF5485
Programmable Serial Controllers (PSC).
Port Signal Option Default MCF5485 Signal
COM1 RXD RXD0 Closed PSC0RXD
COM1 RTS RTS0 Open PSC0RTS
COM1 CTS CTS0 Open PSC0CTS
COM2 RXD RXD1 Closed PSC1RXD
COM2 RTS RTS1 Open PSC1RTS
COM2 CTS CTS1 Open PSC1CTS
Notes:
1) All options are SMT 0805 component size pads.
2) Default closed options must be opened by cutting trace between option pads.
3) To close an option a SMT 0805 resistor of 0 ohms maybe applied.

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CAN Port
The CAN port provides two physical interface layers for the two channels of MCF5485
FlexCAN Controller Area Network version 2.0B peripheral. The FlexCAN transmit and receive
signals are connected to a 3.3V CAN transceivers capable of 1M baud communication
(SN65HVD230). Transceiver differential CAN network signals are provided a 62 ohm
termination by components RC1 and RC2, and applied to the CAN port connector.
Each CAN transceiver has CAN signal drive control via the RS0 / 1 test pad on the
development board. The RS signal is provided a 1K Ohm pull-down resistor for the maximum
signal rate setting. User may refer to the SN65HVD230 data sheet and apply additional signal
control at the RS test pad.
The CAN Port connector is a 5 position screw terminal block that will accept discreet wiring for
CAN Bus connections.
CAN Port Term Block
1 2 3 4 5
CAN PORT Connection and Options Table
CAN Port Port Signal MCF5485 Signals OPTION Default
1 CAN_HI_0 CANTX0 CT1 Closed
2 CAN_LO_0 CANRX0 CT2 Closed
3 Ground
4 CAN_HI_1 CANTX1 CT3 Closed
5 CAN_LO_1 CANRX1 CT4 Closed
Notes:
1) All options are SMT 0805 component size pads.
2) Default closed options must be opened by cutting trace between option pads.
3) To close an option a SMT 0805 resistor of 0 ohms maybe applied.
J4 and J5 ETHERNET Ports
These ports provide the 10/100TX Ethernet physical interface connections to the MCF5485
FEC0 and 1 respectfully. Port configuration applies a dual PHY device, the Intel LXT973
10/100TX physical layer transceiver (PHY) for a complete IEEE802.3 interface. Features of
the port include Auto MDX cable or connection configuration type detection, 3 status indicators
per port, and integrated magnetics RJ45 connectors.
Refer to the LXT973 data sheet for register and operation details.

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Ethernet Status Indicators
LNK Green Ethernet has Link ON with Network connected
100 Green Ethernet is operating 100 base ON if 100 base network, OFF if 10 base
network
DUP Green Ethernet is operating full duplex ON if full duplex network
Note: Ethernet port must be initialized and operating for status indications.
Refer to the CML5485_SCH_C.pdf drawing for details on hardware connections to this port.
MCU_PORT
The MCU PORT provides access to the MCF5485 I/O ports. Ports applied on the board are
noted.
DACK0* 1 2 DACK1*
DREQ0* 3 4 DREQ1*
(Note 1) CANRX1 5 6 CANTX1 (Note 1)
(Note 1) CANRX0 7 8 CANTX0 (Note 1)
TIN2 910 TOUT2
TIN1 11 12 TOUT1
TIN0 13 14 TOUT0
PSC3RTS* 15 16 PSC3CTS*
PSC3RXD 17 18 PSC3TXD
PSC2RXD 19 20 PSC2TXD
(Note 2) PSC1RTS 21 22 PSC1CTS* (Note 2)
(Note 2) PSC1RXD 23 24 PSC1TXD (Note 2)
(Note 3) PSC0RTS* 25 26 PSC0CTS* (Note 3)
(Note 3) PSC0RXD 27 28 PSC0TXD (Note 3)
DSPISOUT 29 30 DSPISIN
DSPISCK 31 32 DSPICS5
DSPICS3 33 34 DSPICS2
DSPICS0 35 36 SDA
SCL 37 38 PCIBG0*
PCIBG1* 39 40 PCIBG2*
PCIBG3* 41 42 PCIBR0* (Note 4)
PCIBR1* 43 44 PCIBR2*
PCIBR3* 45 46 IRQ7*
IRQ6* 47 48 IRQ5*
GND 49 50 +3.3V
Notes:
1) These signals have peripheral connection on the CML-5485 board CAN Port.
2) These signals have peripheral connection on the CML-5485 board COM2 Port.
3) These signals have peripheral connection on the CML-5485 board COM1 Port.
4) This signal has peripheral connection on the CML-5485 board J1 PCI Port.

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BUS_PORT
The BUS PORT provides access to the MCF5485 FLEX Bus data and control signals. Most
signals on the BUS PORT have a peripheral connection on the CML-5485 board. The FBCS0*
chip select is dedicated to the on board flash memory. The board must boot from the on board
flash.
AD30 1 2 AD31
AD28 3 4 AD29
AD26 5 6 AD27
AD24 7 8 AD25
AD22 910 AD23
AD20 11 12 AD21
AD18 13 14 AD19
AD16 15 16 AD17
AD14 17 18 AD15
AD12 19 20 AD13
A10 21 22 AD11
AD8 23 24 AD9
AD6 25 26 AD7
AD4 27 28 AD5
AD2 29 30 AD3
AD0 31 32 AD1
RSTO* 33 34 RESET* IN
(Note 1) CLKOUT 35 36 FBCS1*
FBCS2* 37 38 FBCS3*
FBCS4* 39 40 FBCS5*
BWE0* 41 42 BWE1*
BWE2* 43 44 BWE3*
R/W* 45 46 TS*
TA* 47 48 OE*
+3.3V 49 50 GND
Notes:
1) The CLKOUT signal must be enabled by installing option resistor R63. The value of R63 should be selected
to reduce connection reflections of the 50MHz signal.
2) The default bus size of FBCS0* is 16 bits data on AD16 – AD31.
3) The FLEX BUS operates in Multiplexed address and data mode by default. The address port provides de-
multiplexed address signals.

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ADDRESS_PORT
The ADDRESS PORT provides access to the MCF5485 FLEX Bus latched address signals.
This port may be applied for bus expansion.
A0 1 2 A1
A2 3 4 A3
A4 5 6 A5
A6 7 8 A7
A8 910 A9
A10 11 12 A11
A12 13 14 A13
A14 15 16 A15
A16 17 18 A17
A18 19 20 A19
A20 21 22 A21
A22 23 24 A23
A24 25 26 A25
A26 27 28 A27
A28 29 30 A29
A30 31 32 A31
+3.3V 33 34 GND
BDM_PORT
The BDM PORT provides a standard Coldfire BDM / JTAG development port. The BDM_EN
option provides for the development port mode selection between BDM or JTAG.
Development Cable Installation
BDM_EN
INSTALLED = BDM_PORT is in BDM Mode (Development mode = BDM).
OPEN = BDM_PORT is in JTAG Mode (Development mode = JTAG).
To Host PC
CML5485 board Pin 1
BDM Port

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BDM /JTAG Port Connection 1 2 BKPT*
GND 3 4 DSCLK
GND 5 6 TCLK
(Note 1) RSTI* 7 8 DSI
+3.3V 910 DSO
GND 11 12 PST3
PST2 13 14 PST1
PST0 15 16 DDATA3
DDATA2 17 18 DDATA1
DDATA0 19 20 GND
21 22
GND 23 24 CLKOUT
+3.3V 25 26 TA*
J1 PCI Port
J1 provides a single 3.3V standard 32 bit PCI bus connector, slot 4 connection (0 – 3 slots not
applied). The MCF5485 PCI bus is applied to this connector with arbitration signals and
external master support. Due to the fixed system frequency only 66Mhz PCI cards should be
applied for an operating PCI bus frequency of 50Mhz. Following is the connector and signal
detail:

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J1 PCI Bus Connector
Notes PCI Signal J1 PIN Number PCI Signal Notes
From -12V TP connection -12V B1 A1 TRST* Not applied, 4.7K ohm pull-down
Not applied, 4.7K ohm pull-down TCK B2 A2 +12V From +12V TP connection
GND B3 A3 TMS Not applied
Not applied TDO B4 A4 TDI Not applied
+5V B5 A5 +5V
+5V B6 A6 INTA* MCF5485 IRQ6*
MCF5485 IRQ6* INTB* B7 A7 INTC* MCF5485 IRQ6*
MCF5485 IRQ6* INTD* B8 A8 +5V
.1UF connect only PRSNT1* B9 A9 Reserved
Reserved B10 A10 +3.3V
.1UF connect only PRSNT2* B11 A11 Reserved
Card slot Key B12 A12 Card slot Key
Card slot Key B13 A13 Card slot Key
Reserved B14 A14 Reserved
GND B15 A15 PCI_RST*
50MHz PCICLK B16 A16 +3.3V
GND B17 A17 PCI_BG4*
PCI_BR4* B18 A18 GND
+3.3V B19 A19 Reserved
PCI_AD31 B20 A20 PCI_AD30
PCI_AD29 B21 A21 +3.3V
GND B22 A22 PCI_AD28
PCI_AD27 B23 A23 PCI_AD26
PCI_AD25 B24 A24 GND
+3.3V B25 A25 PCI_AD24
PCI_BE3* B26 A26 IDSEL PCI_AD17 applied, base 0x20000
PCI_AD23 B27 A27 +3.3V
GND B28 A28 PCI_AD22
PCI_AD21 B29 A29 PCI_AD20
PCI_AD19 B30 A30 GND
+3.3V B31 A31 PCI_AD18
PCI_AD17 B32 A32 PCI_AD16
PCI_BE2* B33 A33 +3.3V
GND B34 A34 PCI_FRAME*
PCI_IRDY* B35 A35 GND
+3.3V B36 A36 PCI_TRDY*
PCI_DEVSEL* B37 A37 GND
GND B38 A38 PCI_STOP*
LOCK not applied B39 A39 +3.3V
PCI_PERR* B40 A40 SDONE not applied
+3.3V B41 A41 SB0* not applied
PCI_SERR* B42 A42 GND
+3.3V B43 A43 PCI_PAR
PCI_BE1* B44 A44 PCI_AD15
PCI_AD14 B45 A45 +3.3V
GND B46 A46 PCI_AD13
PCI_AD12 B47 A47 PCI_AD11
PCI_AD10 B48 A48 GND
PCI_BR0* applied MCGEN B49 A49 PCI_AD9
GND B50 A50 GND
GND B51 A51 GND
PCI_AD8 B52 A52 PCI_BE0*
PCI_AD7 B53 A53 +3.3V
+3.3V B54 A54 PCI_AD6
PCI_AD5 B55 A55 PCI_AD4
PCI_AD3 B56 A56 GND
GND B57 A57 PCI_AD2
PCI_AD1 B58 A58 PCI_AD0
+3.3V B59 A59 +3.3V
4.7kK ohm pull-up only ACK64* B60 A60 REQ64* 4.7K Ohm pull-up only
+5V B61 A61 +5V
+5V B62 A62 +5V

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TROUBLESHOOTING
The CML5485 is fully tested and operational before shipping. If it fails to function properly,
inspect the board for obvious physical damage first. Verify the communications setup as
described under GETTING STARTED.
The most common problems are improperly configured options or communications
parameters.
1. Verify default option settings and RESET the board.
2. Make sure that the RSTI* line is not being held low or the RESET indicator is not on
constantly.
3. Verify that your COM communications port is working by substituting a known good serial
device or by doing a loop back diagnostic. if you applied a different baud rate with the
dBUG SET command, make sure the terminal software is set correctly.
4. Verify the power source, +3.3V and +2.5V Indicators are ON? You should measure a
minimum of 9 volts between the GND and +V test pad and GND test pad near the power
jack with the standard power supply provided.
5. If no power indications or voltage is found, verify the wall plug connections to AC outlet
and the PWR jack power connector.
6. Disconnect all external connections to the board except for COM1 to the PC and the wall
plug and check operation again.
7. Contact [email protected] by email for further assistance. Provide board name and
describe problem.

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dBUG MONITOR OPERATION
dBUG is a firmware resident development environment operated by the MCF5485 as a primary
control program. The monitor provides serial and Ethernet communication for loading and
controlling the execution of software under test. User should note that the monitor occupies the
first or lower address 256K bytes of the external flash memory. Caution should be applied in
the user application not to corrupt the monitor flash memory space. If the monitor is corrupted,
a development port tool will be required to restore operation.
dBUG Communication:
Primary user interface to the dBUG monitor is by command lines that are entered into the
serial port. These commands are defined in the following table “dBUG Commands”. For serial
communications, dBUG requires eight data bits, no parity, and one stop bit, 8N1 with
XON/XOFF soft flow control. The default baud rate is 19200 however, this rate can be
changed by the user with a “set” command. The command line prompt is “dBUG> “. Any dBUG
command may be entered from this prompt. dBUG does not allow command lines to exceed
80 characters. Wherever possible, dBUG displays data in 80 columns or less. dBUG echoes
each character as it is typed, eliminating the need for any “local echo” on the terminal side. In
general, dBUG is not case sensitive. Commands may be entered either in upper or lower case,
depending upon the user’s equipment and preference. Only symbol names require that the
exact case be used.
See the dBUG Ethernet Support section in this manual for details on operating this port.
dBUG System Initialization
The act of powering up the board will initialize the system. The processor is reset and dBUG is
invoked. dBUG performs the following configurations of internal resources during the
initialization:
MCF5485 clock is initialized to 200MHz.
The instruction cache is invalidated and disabled.
The Software Watchdog Timer is disabled and internal timers are placed in a stop condition.
dBUG memory map is configured.
Interrupt Service Support
Interrupt controller register is initialized with unique interrupt level/priority pairs. Please refer to
the dBUG source files on the ColdFire support CD for the complete initialization code
sequence.

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The Vector Base Register, VBR, points to the dBUG Flash memory space. However, a copy
of the exception table is made at address $00000000 in SDRAM memory space. To take over
an exception vector, the user places the address of the exception handler in the appropriate
vector in the vector table located at 0x00000000, and then points the VBR register to
0x00000000. See the MCF5485 User Guide and ColdFire Programmers Reference Manual
for more details on applying interrupts.
dBUG Memory Map
0x00000000
0x000003FF
External DDRAM Memory: User Vector table if applied.
See Interrupt Support for more information.
1K bytes
0x00000400
0x0001FFFF
External DDRAM Memory: dBUG reserved ram space.
128K bytes
0x00020000
0x03FFFFFF
External DDRAM Memory: User ram or development
memory space
64M bytes, 32 bits wide, 100Mhz
0x04000000 - 0x3FFFFFFF Not applied memory space. reserved
0x40000000
0x7FFFFFFF
ISBAR: MCF5485 Internal register and peripheral
space. Includes internal ram space.
Refer to MCF5485 User Manual for details.
0x80000000 - 0xFF7FFFFF Not applied memory space. reserved
0xFF800000
0xFF83FFFF
DBUG Monitor Flash Memory Space. reserved
256K bytes
0xFF840000
0xFFFFFFFF
User External Flash Memory Space
7.8M bytes, 16 bits wide
Note: Applying BDM / JTAG development port tools does not require applying the dBUG
memory map.

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dBUG Commands
After the system initialization, the dBUG waits for a command-line input from the user terminal.
When a proper command is entered, the operation continues in one of the two basic modes. If
the command causes execution of the user program, the dBUG firmware may or may not be
re-entered, at the discretion of the user’s program. For the alternate case, the command will be
executed under control of the dBUG firmware, and after command completion, the system
returns to command entry mode.
dBUG Command Table
MNEMONIC SYNTAX DESCRIPTION
ASM asm <<addr> stmt Assemble
BC bc addr1 addr2 length Block Compare
BF bf <width> begin end data <inc> Block Fill
BM bm begin end dest Block Move
BR br addr <-r> <-c count> <-t trigger> Breakpoint
BS bs <width> begin end data Block Search
DC dc value Data Convert
DI di <addr> Disassemble
DL dl <offset> Download Serial
DLDBUG dldbug Download dBUG Update
DN dn <-c> <-e> <-i> <-s> <-o offset>
<filename> Download Network
FL fl <command> dest <src> size Flash write or erase
GO go <addr> Execute
GT gt addr Execute To
HELP help <command> Help
IRD ird <module.register> Internal Internal Register Display
IRM irm module.register data Internal Register Modify
LR lr <width> addr Loop Read
LW lw <width> addr data Loop Write
MD md <width> <begin> <end> Memory Display
MM mm <width> addr <data> Memory Modify
MMAP mmap Memory Map Display
RD rd <reg> Register Display (core)
RM rm reg data Register Modify (core)
RESET reset Reset
SD sd Stack Display (contents)
SET set <option value> Set Configurations
SHOW show <option> Show Configurations
STEP step Step (Over)
SYM symbol <symb> <-a symb value> <-r symb>
<-C| l |s> Symbol Management
TRACE trace <num> Trace (Into)
UP up begin end filename Upload binary data
VER version Show dBUG Version
During command execution, additional user input may be required depending on the command
function. For commands that accept an optional <width> to modify the memory access size,
the valid values are:
• B = 8-bit (byte) access • W = 16-bit (word) access • L = 32-bit (long) access