Casio DT-700 User manual

Service Manual for
DT-700(PX-790)
DT-760 I/O Box (PX-905)
Date: July 1995
DT-710(PX-797)
Date: February 1997
DT-700 DT-710
DT-760
INDEX

CONTENTS
DT-700 (PX-790) / DT-710 (PX-797)
Page
1. Specification 1
2. Option 2
3. Mac operation 5
4. Main components 5
5. Block diagram 6
6. Disassembly/Assembly 10
7. Diagnostic program 15
8. Error code 16
9. IC data 18
10. Circuit diagram 20
11. Parts list 30
DT-760 I/O Box (PX-905)
Page
1. Each part name and a work 34
2. Specification 35
3. A method of connection 36
4. Circuit diagram 37
5. Parts list 38
Software Page
OS Dump 41

Page 1
1. Specification
CPU 32 bit RISC CPU
RAM
512K byte / 1M byte
Display
Type: FSTN semi-transparent LCD
Resolution: 96 X 48 dots
Font sizes / screen:
6 dots mode: ANK: 6 X 7 dots 16 Columns X 4 Lines
Normal: 6 X 12 dots 16 Columns X 8 Lines
Double: 12 X 12 dots 8 Columns X 4 Lines
8 dots mode: ANK: 8 X 8 dots 12 Columns X 6 Lines
Normal: 8 X 16 dots 12 Columns X 3 Lines
Double: 16 X 16 dots 6 Columns X 3 Lines
Indication character type: ANK, Kanji character, JIS first & second standard,
129 of Optional character
Back light: LED
Contrast: 16 phases by Electronic volume
Scanner System: Semiconductor laser
Wavelength: Approx. 670 nm
light output: J.I.S. Class 2 laser
Scanning Speed: 100 scan/sec.
Resolution: 0.15 mm (Min.)
Readable PCS: More than 0.45
(more than 51% of reflection rate for space & margin)
Readable range: 0 to 380mm(as of 1.0 mm of the resolution ability)
Readable bar code width: Direct contact: 65mm (max)
From 380 mm: 250 mm (max)
Activity luminance: 3,000 Lux ~ 8,000 Lux
Readable code: WPC, NW7, CODE39, ITF, CODE93, CODE128, MSI
Confirmation: One 2-color LED
Number of keys DT700 (Ten) DT710(Full)
Input key: 11 18
Control key: 6 (Included readable Trigger & power Key)
Function key: 8 (F1~F8)
External Interface
Type: Serial
(14-3 pin cable: FP-120, FA-50)
14-14 pin cable: DT-700
14-9 pin cable: DT-9000
Speed: 150 k bps (Between H/Ts units) 1200 bps to 190.2 Kbps

Page 2
Optical Interface
Type: Infrared Casio original protocol
Speed: 1,200 bps to 19.2 k bps (maximum)
Main power supply
Two AA-size alkaline batteries
Memory backup
One CR2032 battery
Low power warning Separate warnings for main and back up power supplies.
Low power function
Resume sleep mode
Operating duration
Approximately 100 hours of intermittent operation
Dimensions
Approximately 174(L) X 58.8(W) X 25.4(H) mm
Weight
Approximately 190 g
Environmental data
Drop durability: 1 m
Operating temperature: -5 to 50 Centigrade
temperature
Water standard: Conforms with IPXII
Soft ware Basic data collection Casio data entry tool (for parameter setting
by editor
Copiler SHC (Hitachi)
M. T. B. F. Stroke key: over 300,000 times
14 pin connector: over 5,000 times
Battery cover: over 5,000 times
Scanner: over 5,000 hours
Model M20E 512 KB
M30E 1.0 MB
2. Option
1) Cable
DT-782/783RSC
DT-782RSC (Cross cable)
(14 pin) (25 pin male)
Signal Pin Pin Signal
FG 1 1 FG
SD 3 2 SD
RD 5 3 RD
RS 7 4 RS
CS 9 5 CS
CD 13 8 CD
ER 8 20 ER
DR 11 6 DR
SG 14 7 SG
FG case 1 FG
DT-783RSC (Cross cable)
(14 pin) (25 pin female)
Signal Pin Pin Signal
FG 1 1 FG
SD 3 2 SD
RD 5 3 RD
RS 7 4 RS
CS 9 5 CS
CD 13 8 CD
ER 8 20 ER
DR 11 6 DR
SG 14 7 SG
FG case 1 FG

Page 3
DT-786RSC(Bt DT-700 & DT-700)
DT-787AX(Cross)
DT-788RSC(6-6pin Modular cable)
LVC-71
Level converter straight cable (14 pin - 25 pin Male)
LVC-72
Level converter cross cable (14 pin -25 pin Female)
Carrying Case
DT-70CASE-01
(14 pin) (14 pin)
Signal Pin Pin Signal
CMOS SD 55 CMOS SD
CMOS RD 10 10 CMOS RD
CMOS RS 44
CMOS RS
CMOS CS 88
CMOS CS
CMOS CD 99
CMOS CD
CMOS ER 33
CMOS ER
CMOSDR 77
CMOSDR
GND 6 6 GND
GND 11 11 GND
GND 14 14 GND
FG shield shield FG
(14 pin) (9 pin female)
Signal Pin Pin Signal
FG 1 case FG
SD 3 3 SD
RD 5 2 RD
RS 7 7 RS
CS 9 8 CS
CD 13 1 CD
ER 8 4 ER
DR 11 6 DR
SG 14 5 GND
FG case case FG
Signal Pin Pin Signal
TRUE(INVERT) 33
TRUE(INVERT)
INVERT(TRUE) 44
INVERT(TRUE)

Page 4
AC Adaptors
DT-9020ADOG (230 V)
DT-9020ADPU (120 V)
2) I/O box DT-760 IOE (PX-905)

Page 5
3. Mac operation
3-1. Reset key
In power off: Reset flag and NMI is going to be on.
Initialization of
Hardware.
In Power on: Compulsion electric power
supply off This switch is covered
by filler.
3-2. Boot switch
4--2-1. Init key
Electric power supply ON is done with compulsion menu boot from OFF status.
Even electric power supply ON status does compulsion menu boot.
In reset operation, invalid.
4-2-2. PW key
It boots with hardware suppress.
3-3. The other switch
4-3-1. Battery lid switch
When battery cover is opened, power supply is off.
3-4. The detection of battery consumption
Power supply Level Description Voltage Handling of Hardware
Main Battery Replacement battery voltage LB1 2.1 V IRQ6 (INT3)
Operating limits voltage LB0 1.6 V NMI
Sub Battery Replacement battery voltage LB2 2.6 V IRQ6 (INT3)
Back-up Voltage Back-up limits voltage LB-1 2.0 V Flag reset, RTC
Note: In LB°1 status, there is the possibility that memory and resistor could be destroyed.
4. Main components
CPU HD6437020U01X 32 bit RISC CPU
ROM E28F200BL-B150 (Flash ROM)
MB838200BLPF TN-12A (Mask ROM)
RAM HM65W8512L PS-RAM 512kb/1mMb
Gate array SLA912SF3S
LCD FSTN semi-transparent LCD 96 X 48 dots
Scanner VLM-1600 Semiconductor laser
External Interface
Infrared ray: DT-760 I/O
14-3 pin cable: FP-120, FA-50
14-14 pin cable: DT-700
14-9 pin cable: DT-9000

Page 6
5. Block Diagram
SH7020 Bus Controller Laser Unit
CPU Interrupt Controller
Buzzer
Ram 1k Watching Timer
LED (Red/Green)
M Rom 16k Timer Pulse Unit
I/O Port
DMA Controler Serial Controler
IR I/F
Sd/Rd/Ctrl
3 pin I/F
Bios 256k Sd/Rd/Gnd
Flash Rom GA CMOS I/F
Sd/Rd/Er/Dr
Bios 512k Clock Unit
Mask Rom 4.9/2.5/1.2 MHz
9.8304M Hz
Bios/KCG 512k
Mask Rom
Key Register On Key
Trigger Key
Real Time Clock Stroke Key:23Key
Main Ram 512k/1M Init Sw,
PS Ram 32.768M Hz AM3 Box Sw,
I/O Box Sw,Frst
Contrl Unit
Back Light LED
Power Unit
LCDD
AM3X2 CR2032 Segment: 102 ch
Main Li Common: 48+1ch
Ram 10k bit
LCD
96 X 48 dots

Page 7
CPU (HD6437020U01X) Pin Description
No. Signal In/Out Description No. Signal In/Out Description
1 AD0 In/Out Data bus 51 (CS4) Out Chip select 4
2 AD1 In/Out Data bus 52 (RAS) Out Low address strobe
3 AD2 In/Out Data bus 52 (CS5) Out Chip select 5
4 Vss In Gnd 53 (CS6) Out Chip select 6
5 AD3 In/Out Data bus 54 (WAIT) In Wait
6 AD4 In/Out Data bus 55 (WR) Out Write
7 AD5 In/Out Data bus 56 (PA5) Out Gnd
8 AD6 In/Out Data bus 57 (RD) Out Read
9 AD7 In/Out Data bus 58 (BACK) Out Acknowledge of Bus right Request
10 AD8 In/Out Data bus 59 Vss In Gnd
11 AD9 In/Out Data bus 60 (BREQ) In Bus right Request
12 AD10 In/Out Data bus 61 (IRQOUT) Out IRQ Request
13 Vcc In Power 62 DPL In/Out Parity for D7 ~ D0
14 AD11 In/Out Data bus 63 Vcc In Power
15 Vss In Gnd 64 DPH In/Out Parity for D15 ~ D8
16 AD12 In/Out Data bus 65 (IRQ0) In IRQ Request
17 AD13 In/Out Data bus 66 (IRQ1) In IRQ Request
18 AD14 In/Out Data bus 67 (IRQ2) In IRQ Request
19 AD15 In/Out Data bus 68 (IRQ3) In IRQ Request
20 A0 Out Address bus 69 CK Out System clock
21 A1 Out Address bus 70 Vss In Gnd
22 A2 Out Address bus 71 EXTAL In Exterior clock
23 A3 Out Address bus 72 XTAL In Crystal oscillator
24 Vss In Gnd 73 Vcc In Power
25 A4 Out Address bus 75 (WDTOVF) Out Watch dog timer over flow
26 A5 Out Address bus 76 (RES) In Reset
27 A6 Out Address bus 77 MD0 In Mode
28 A7 Out Address bus 78 MD1 In Mode
29 A8 Out Address bus 79 MD2 In Mode
30 A9 Out Address bus 80 Vcc In Power
31 A10 Out Address bus 81 Vss In Gnd
32 Vss In Gnd 82 Vss In Gnd
33 A11 Out Address bus 83 TIOCA2 In/Out In/Out compare (Ch 2)
34 A12 Out Address bus 84 TCOCB2 In/Out In/Out compare (Ch 2)
35 A13 Out Address bus 85 TIOCA3 In/Out In/Out compare (Ch 3)
36 A14 Out Address bus 86 TCOCB3 In/Out In/Out compare (Ch 3)
37 A15 Out Address bus 87 TIOCA4 In/Out In/Out compare (Ch 4)
38 Vcc In Power 88 Vcc In Power
39 A16 Out Address bus 89 TCOCB4 In/Out In/Out compare (Ch 4)
40 A17 Out Address bus 90 TCLKC In ITU Timer clock
41 Vss In Gnd 91 TCLKD In ITU Timer clock
42 A18 Out Address bus 92 Vss In Gnd
43 A19 Out Address bus 93 RxD0 In Receiving data
44 A20 Out Address bus 94 TxD0 Out Sending data
45 A21 Out Address bus 95 RxD1 In Receiving data
46 (CS0) Out Chip select 0 96 TxD1 Out Sending data
47 (CS1) Out Chip select 1 97 (IRQ4) In IRQ Request
48 (CS2) Out Chip select 2 98 (IRQ5) In IRQ Request
49 (CS3) Out Chip select 3 99 (IRQ6) In IRQ Request
50 Vss In Gnd 100 (IRQ7) In IRQ Request

Page 8
Gate array (SLA912SF3S) Pin Description
No. Signal In/Out Description No. Signal In/Out Description
1 A4 In Address bank 65 TEST1 In Test
2 A3 In Address bank 66 TEST2 In Test
3 A2 In Address bank 67 TEST3 In Test
4 A1 In Address bank 68 FSET In F-Set
5 A0 In Address bank 69 FVEC In V-Vec
6 VSS1 In Power 70 (V50ON) Out 50V on
7 AD7 In/Out Address bus 71 VSS1 In Power
8 AD6 In/Out Address bus 72 (POE1) Out Refresh
9 AD5 In/Out Address bus 73 (POE0) Out Refresh
10 AD4 In/Out Address bus 74 (PWE) Out Write enable
11 AD3 In/Out Address bus 75 (PCS1) Out Chip select
12 AD2 In/Out Address bus 76 (PCS0) Out Chip select
13 AD1 In/Out Address bus 77 Laser Out Laser
14 AD0 In/Out Address bus 78 LSRSIG IN L-signal
15 Vss1 In Power 79 (LZON) Out Laser on
16 IRQ7 Out IRQ request 80 GAIN Out L-gain
17 IRQ6 Out IRQ request 81 LSRTIM In L-timer
18 IRQ5 Out IRQ request 82 VSS1 In Power
19 IRQ4 Out IRQ request 83 BATSW In Battery switch
20 (MCS) Out Chip select 84 (PWIR) Out Infrared ray power
21 (RD) In Read 85 IRCTR Out Infrared ray control
22 (PWD) Out Power down 86 (INIT) In Initial
23 RES1 In/Out Reset 87 (HOLON) Out Hold
24 (FWE) Out Write enable 88 IOBOX In Hole
25 (FOE) Out Output enable 89 FRST In Reset
26 (CS3) In Chip select 90 KX4 In/Out Key common
27 (CS2) In Chip select 91 KX3 In/Out Key common
28 (CS1) In Chip select 92 KX2 In/Out Key common
29 VDD1 In Power 93 KX1 In/Out Key common
30 (CS0) In Chip select 94 KX0 In/Out Key common
31 (WAIT) In Waiting 95 VDD1 In Power
32 (CS6) In Chip select 96 (ONKEY) In On
33 (WR) In Write 97 IX10M In Crystal oscillator
34 IRQ0 Out IRQ request 98 OX10M Out Crystal oscillator
35 IRQ1 Out IRQ request 99 VSS1 In Power
36 IRQ2 Out IRQ request 100 (TRIG) In Trigger
37 IRQ3 Out IRQ request 101 KY5 In/Out key
38 NMI Out NMI request 102 KY4 In/Out key
39 (RXD1) Out Receiving data 103 KY3 In/Out key
40 TCLK Out Clock 104 KY2 In/Out key
41 VSS1 In Power 105 KY1 In/Out key
42 SCLK Out Clock 106 KY0 In/Out key
43 SCLKI In Clock 107 BLL Out Back light
44 (TXD1) In Sending data 108 BLR Out Back light
45 TCA2 In/Out In/Out compare (Ch 2) 109 (LCDWE) Out LCD W/E
46 (LBM1) In Low battery 110 (CRST) Out CPU reset
47 (V12ON) Out 12V on 111 VSS1 In Power
48 BATDMY Out Battery 112 A19 In Address
49 LLIDMY Out Lithium Battery 113 A18 In Address
50 (LB1) In Low battery 1 114 A17 In Address
51 (LB0) In Low battery 0 115 A16 In Address
52 LB2 In Low battery 2 116 A15 In Address
53 (V33ON) Out 33V on 117 A14 In Address
54 (PWCMS) Out Power 3P 118 A13 In Address