COBHAM GR716-BOARD User manual

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GR716-BOARD
LEON3FT Microcontroller
2019 User's Manual
The most important thing we build is trust
GR716-BOARD Quick Start Guide
GR716-BOARD-QSG 1 www.cobham.com/gaisler
April 2019, Version 1.0

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Table of Contents
1. Introduction ............................................................................................................................. 4
1.1. Overview ...................................................................................................................... 4
1.2. References .................................................................................................................... 4
2. Overview ................................................................................................................................. 5
3. Board Configuration .................................................................................................................. 8
3.1. Overview ...................................................................................................................... 8
3.2. Default configuration ...................................................................................................... 8
3.3. Power ........................................................................................................................... 8
3.3.1. Alternative power ................................................................................................ 9
3.4. Bootstrap ...................................................................................................................... 9
3.5. Reset .......................................................................................................................... 10
3.5.1. External Reset and break switch ........................................................................... 11
3.6. Clock .......................................................................................................................... 11
3.7. Pin multiplexing ........................................................................................................... 11
3.8. Pin properties ............................................................................................................... 11
3.9. Debug communication link ............................................................................................. 12
4. Software Development Environment ........................................................................................... 13
4.1. Overview .................................................................................................................... 13
5. GRMON hardware debugger ..................................................................................................... 14
5.1. Overview .................................................................................................................... 14
5.2. Debug links ................................................................................................................. 14
5.2.1. Connecting via the FTDI USB/UART interface ....................................................... 14
5.3. First steps .................................................................................................................... 14
5.4. Connecting to the board ................................................................................................. 14
5.5. GR716 License options .................................................................................................. 24
5.6. GR716 specific considerations ........................................................................................ 25
6. TSIM LEON simulator ............................................................................................................ 26
6.1. Overview .................................................................................................................... 26
6.2. Startup ........................................................................................................................ 26
7. Toolchains ............................................................................................................................. 29
7.1. Bare C Cross-Compiler System ....................................................................................... 29
7.1.1. Overview .......................................................................................................... 29
7.1.2. Compiling with BCC .......................................................................................... 29
7.1.3. Running and debugging with GRMON .................................................................. 29
7.1.4. Running and debugging with TSIM ....................................................................... 30
8. Software examples .................................................................................................................. 32
8.1. Overview .................................................................................................................... 32
8.1.1. BCC device driver library .................................................................................... 32
8.1.2. Custom GR716 interface examples ........................................................................ 32
8.2. Environment ................................................................................................................ 32
8.3. IO switch matrix configuration ........................................................................................ 32
8.3.1. Configuring with GRMON .................................................................................. 32
8.3.2. Configuring with the CPU ................................................................................... 33
8.4. BCC device drivers ....................................................................................................... 34
8.4.1. GPIO ............................................................................................................... 34
8.4.2. Clock gating unit ............................................................................................... 34
8.4.3. Memory protection unit ....................................................................................... 35
8.4.4. Memory scrubber ............................................................................................... 36
8.4.5. AHB status register ............................................................................................ 37
8.4.6. APBUART ........................................................................................................ 38
8.4.7. SPI master controller .......................................................................................... 39
8.4.8. I2C master controller .......................................................................................... 39
8.4.9. SpaceWire ........................................................................................................ 40
8.4.10. CAN .............................................................................................................. 41
8.5. GR716 interfaces .......................................................................................................... 43

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8.5.1. ADC ................................................................................................................ 43
8.5.2. Clock and PLL .................................................................................................. 44
8.6. Boot loader .................................................................................................................. 45
8.6.1. The ASW format ............................................................................................... 46
8.6.2. Scripts .............................................................................................................. 46
8.6.3. ASW image in SPI flash example ......................................................................... 47
8.7. IO switch validation script and configuration ..................................................................... 48
8.7.1. Scripts Sections ................................................................................................. 49
8.7.2. Usage of the pin validation script .......................................................................... 49
8.8. Board IO Configuration ................................................................................................. 49
8.8.1. Default IO configuration ...................................................................................... 49
8.8.2. Memory Board configuration ............................................................................... 50
8.9. Resources .................................................................................................................... 51
9. Expansion boards .................................................................................................................... 53
9.1. DSU UART FTDI ........................................................................................................ 53
9.2. Memory board ............................................................................................................. 53
9.3. Interface boards ............................................................................................................ 54
9.4. Resources .................................................................................................................... 54
10. Support ................................................................................................................................ 55
A. Assembly drawing .................................................................................................................. 56
B. Default configuration .............................................................................................................. 57

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1. Introduction
1.1. Overview
This document is a quick start guide for the GR716 Development Board.
The purpose of this document is to get users quickly started using the board.
For a complete description of the board please refer to the GR716 Development Board User's Manual.
The GR716 system-on-chip is described in the GR716 Data sheet and User's Manual.
This quick start guide does not contain as many technical details and is instead how-to oriented. However, to make
the most of the guide the user should have glanced through the aforementioned documents and should ideally also
be familiar with the GRMON debug monitor.
1.2. References
Table 1.1. References
RD-1 GR716 Development Board User's Manual
RD-2 GR716 Data sheet and User's Manual [https://www.gaisler.com/doc/gr716/GR716-DS-
UM.pdf]
RD-4 GRMON User's Manual [https://www.gaisler.com/doc/grmon3.pdf]
RD-5 TSIM User's Manual [https://gaisler.com/index.php/products/simulators]
RD-10 Bare C Cross-Compilation System [https://www.gaisler.com/index.php/products/operat-
ing-systems/bcc]
RD-11 BCC User's Manual [https://www.gaisler.com/doc/bcc2.pdf]
The referenced documents can be downloaded from https://www.gaisler.com.

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2. Overview
The GR716 Development Board provides a comprehensive and rapid software prototyping platform for the GR716
LEON3FTMicrocontroller.ThePC/104stylestackableheaders(2x64pin)allowforeasyexpansion,accessibility
and integration. Along with the microcontroller, the subject board supports the following features:
• Processor
• GR716 microcontroller in CQFP132 Package
• Memory
• SPI Flash (up to 512 Mbit)
• Power Supply
• Power from External supply (range 5V to 17V)
• Options for single supply operation or individual external supply
• Interfaces
• PC/104 style stackable headers (2 x 64 pin) for GPIO and interface signals
• Provides access to all GPIO/interface signals for monitoring/debug
• Provides stacking interface to User Defined modules (Memory, Digital, Analog I/F)
• Provides stacking interface to GR716-DEV development board in 6U rack or box format
• Serial debug using GRMON
• LVDS in/out (3 + 3 pairs) for 1 x SPW interface or 1 x SPI4S
• 64 GPIO pins with support for for: Digital I/O, 6 x UART, external memory interface, MIL-1553, Pack-
etWire, CAN, I2C, 3 x SPI I/F, 8 x Analog In, 4 x Analog DAC out, External digital ADC interface, 16
x PWM outputs, 1 x SpaceWire.
• 1 x TDP interface (SpaceWire time distribution protocol)
• Socket for user defined Crystal (5 MHz – 25 MHz)
• Option for External Clocks
• DIP switch for Bootstrap options
The board has the dimension of 80 x 100 mm.

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Figure 2.1. GR716-BOARD
Table 2.1. Major board items
Item Description Section
D1 Reset LED 3.5
D2 3V3 power supply LED 3.3
D2 1V8 power supply LED 3.3
J1 Power connector for standalone operation 3.3
J2 Alternative power connector 3.3.1
Y1 Socket for external crystal. 3.6
JP1 - JP9 Power supply source configuration 3.3
JP10 - JP11 Select system clock source 3.6
P1, P2 GR716-BOARD connector 9
S1 Boot configuration switch 3.4

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Figure 2.2. GR716 Development Board

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3. Board Configuration
3.1. Overview
The primary sources of information for board configuration is the GR716 Development Board User's Manual
([RD-1] and the GR716 Data sheet and User's Manual ([RD-2]). Before start using the GR716-BOARD, clock
sources have to be installed, bootstrap signals need to be set correctly and the desired interfaces have to be enabled.
GR716 shares some of its IO signals due to a limited number of package pins. For that reason, the pin multiplexing
has to be set up depending on the desired interfaces and memory configuration.
3.2. Default configuration
This guide provides a default configuration which uses
• SPI flash PROM as boot memory.
• UART over FTDI as debug link.
• General I/O, SPI flash PROM and Debug-UART are enabled.
The complete default configuration can be found in Appendix B and GR716 Development Board User's Manual.
If this is your first time using the GR716-BOARD, please use this configuration as a starting point.
Default configuration
To achieve the default configuration please follow the instructions on each box note like this one.
3.3. Power
A single supply with a +5V (minimum) / +14V (maximum) is required to power the board. All other board voltages
are derived from this input using on-board discrete power circuits.

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Default configuration
Default power configuration for stand-alone board is to supply the J2 connector with 5V.
Figure 3.1. GR716-BOARD default power configuration jumpers and unconnected terminal block (green).
The default configuration of the board uses:
• J1 should be open i.e. no connection to external supply or ground plane
• JP1 should connect pin position 1 and 2
• JP2 should connect pin position 1 and 2
• JP3 should connect pin position 1 and 2
• JP4 should connect pin position 1 and 2
• JP5 should be open i.e. no connection between any pins
• JP6 should connect pin 1 and pin 2
• JP7 should be open i.e. no connection between any pins
• JP8 should be open i.e. no connection between any pins
• JP9 should be open i.e. no connection between any pins
NOTE: Always leave JP8 open when connecting GR716-BOARD with the GR716-DEV board.
3.3.1. Alternative power
The +5V (minimum) / +14V (maximum) can be supplied via the PC/104 style stackable headers. Jumpers and
switches should remain as described for the default power configuration in Section 3.3.
NOTE:Do NOT supply the board via the the connector J2 and the PC/104 style stackable headers at the same time.
3.4. Bootstrap
Bootstrap signals configure the chip at reset and are listed in the section Bootstrap signals of GR716 Data sheet
and User's Manual. All of these signals can be controlled on the GR716-BOARD via the SPDT DIP switch S1
position 1 to 8.
Each of the DIP switches have three positions: pull-down (PD), floating (-), pull-up (PU). When GR716-BOARD
is used stand-alone, only the PD or PU positions should be used. The floating position can be useful when the
corresponding signals are defined by a carrier board.
The bootstrap signals controlled via SPDT DIP switch S1 position 1 to 8 have the following impact on the system
behaviour:
• Remote boot access (S1-8) enables remote access to the GR716 microcontroller after initialization has been
completed. Enable of remote access will force the processor to power down after initialization.

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• Disable use of internal boot ROM (S1-2) disables initialization of processor and internal memories. If internal
boot ROM is disabled, the processor will start execute software directly from selected source or power down
after a remote interface has been enabled.
• Disable internal memory test (S1-3) makes the system boot faster but will not check or initialize internal
memories.
• Select boot source (S1-6, S1-7) will together with the remote boot access (S1-8) switch select boot source.
This pin has dual functionality which deepeneds on boot strap configuration with higher precedence
• Enable use of ASW image format (S1-5). This enables the on-chip ROM application loader which can copy
application sections from external memories (SRAM, PROM, SPI flash or I2C memory) to the local RAM.
Application image integrity is verified using a CRC-16 algorithm.
• Enable use of redundant memory (S1-4). When ASW image format (S1-5) is enabled, the system can be
configured to start from redundant memory when an error occurs on the first application image.
• EDAC for external memories (S1-1) enables error detection and correction for external SRAM, PROM and
SPI memory. When this bit is enabled system expects correction codes to be stored together with application
software.
• Enable PLL (S1-2) enables internal SpaceWire frequency generation using the internal PLL. If disabled the
internal PLL is bypassed and the clock frequency is expected to be 50 MHz. I.e. internal SpaceWire frequency
divisor is set to 5 to generate a 10 MHz SpaceWire link start frqeuency.
• Select SpaceWire default frequency (S1-4, S1-5).
Default configuration
Default configuration is to start execute application software from the SPI memory after internal ROM
initialization software has executed. The ASW container format is not used by default.
Figure 3.2. GR716-BOARD default bootstrap configuration
The default configuration of the board uses:
• S1-1 PU
• S1-2 PD
• S1-3 PD
• S1-4 PD
• S1-5 PD
• S1-6 PD
• S1-7 PD
• S1-8 PD
For informatoin on how to use S1 to select other processor boot options, see [RD-1].
3.5. Reset
Default configuration
The default configuration is to use the internal Power-On-Reset functionality. The input signal
RESET_IN_N should be left floating.