COBHAM GR716 Instruction Manual

GR716
LEON3FT Microcontroller
2019 Advanced Data Sheet and User’s Manual
The most important thing we build is trust
GR716-DS-UM, May 2019, Version 1.29 www.cobham.com/gaisler
Features
• Fault-tolerant SPARC V8 processor with 31 register
windows, 192KiB EDAC protected tightly coupled
memory and support for reduced instruction set.
• Double precision IEEE-754 floating point unit
• Advanced on-chip debug support unit
• Memory protection units
• 8-bit external PROM/SRAM interface with BCH EDAC
protection
• Boot from external SRAM/PROM, SPI or I2C memory
protected by EDAC and dual memory redundancy
• SpaceWire interface with time distribution support
• SPI for Space master and slave interface
• MIL-STD-1553B interface
• CAN 2.0B controller interface
• PacketWire with CRC acceleration support
• On-chip 12-bit DAC and two 11-bit ADC
• Programmable PWM interface
• UARTs, SPI, I2C, GPIO, Timers with Watchdog, Inter-
rupt controller, Status registers, UART debug, etc.
• Configurable I/O switch matrix
Description
The GR716 device is a fault-tolerant LEON3
SPARC V8 processor with various communication
interfaces and on-chip ADC, DAC, Power-on-
Reset, Oscillator, Brown-out detection, LVDS
transceivers, regulators to support single 3.3V
supply, ideally suited for space and other high-rel
applications.
Specification
• System frequency up-to 50 MHz
• SpaceWire links up-to 100 Mbps
• CQFP132 hermetically sealed ceramic package
• Total Ionizing Dose (TID) up to 100 krad (Si)
• Single-Event Latch-up Immunity (SEL) to LETTH
> 118 MeV-cm2mg
• Single-Event Upset (SEU) below 10-6 errors per
device and day in space environment (TBC)
• Support for single 3.3V supply
Applications
The GR716 microcontroller is an advanced microcontrol-
ler, targeting high reliability space and aeronautics appli-
cations.
Support for many different standard interfaces makes
the GR716 microcontroller ideal for supervision, monitor-
ing and control in a satellite, such as:
• propulsion system control
• sensor bus control
• robotics applications control
• simple motor control
• mechanism control
• power control
• particle detector instrumentation
• radiation environment monitoring
• thermal control
• antenna pointing control
• AOCS / GNC (Gyro, IMU, MTM)
• remote terminal unit control
• simple instrument control
• wireless networking
Availability
The GR716 microcontroller is currently available as engi-
neering samples. Contact Cobham Gaisler for informa-
tion on flight model schedule.
FTMCTRL
AHB2AHB
Bridge
SPIMCTRL
AHB2AHB
Bridge
Debug bus
DMA bus
Main bus
Floating
Point
Unit
Integer
Unit
AMBA
Interface
Debug
Support
Unit
On-chip
LDO
On-chip
Oscillator
PLL Power-on
reset
Brownout
Detector
Memory
Scrubber
AHBROM
Local
Dual-port
Data
RAM
Local
Dual-port
Instruction
RAM
UART
I2CMST /
I2CSLV
SPICTRL
GRGPIO
GRPULSE
GRPWM
1553B
SpaceWire
I2C to AHB
SPI to AHB
GRPWRX
(MAP)
GRPWTX
GRCAN
AHB
UART
MEMPROT
CLKGATE
GPREG
LSTAT
APBCTRL
Bridges
DMA
Controller
IRQ Control
Timers
AHBSTAT
GRADCDAC
On-chip DAC
On-chip ADC
AHB
Trace
UART
Dbg Link
LEON3
Statistics
Unit

GR716-DS-UM, May 2019, Version 1.29 2 www.cobham.com/gaisler
GR716
1 Introduction.............................................................................................................................. 9
1.1 Scope ....................................................................................................................................................... 9
1.2 Data sheet limitations .............................................................................................................................. 9
1.3 Updates and feedback.............................................................................................................................. 9
1.4 Software support...................................................................................................................................... 9
1.5 Reference documents .............................................................................................................................. 9
1.6 Document revision history .................................................................................................................... 10
1.7 Acronyms .............................................................................................................................................. 13
1.8 Definitions ............................................................................................................................................. 14
1.9 Register descriptions ............................................................................................................................. 15
2 Architecture............................................................................................................................ 16
2.1 Key features........................................................................................................................................... 17
2.2 Digital Architecture Overview .............................................................................................................. 20
2.3 Analog Architecture Overview.............................................................................................................. 28
2.4 Signal Overview.................................................................................................................................... 32
2.5 I/O switch matrix overview................................................................................................................... 32
2.6 I/O switch default configurations for bootstraps................................................................................... 35
2.7 I/O switch matrix options, considerations and limitations .................................................................... 38
2.8 I/O switch matrix pin validation script.................................................................................................. 39
2.9 I/O switch matrix scenario examples .................................................................................................... 42
2.10 Cores...................................................................................................................................................... 48
2.11 Memory map ......................................................................................................................................... 49
2.12 Interrupts ............................................................................................................................................... 54
3 Signals.................................................................................................................................... 56
3.1 Bootstrap signals ................................................................................................................................... 56
3.2 Configuration for flight ......................................................................................................................... 63
3.3 Complete signal list ............................................................................................................................... 64
4 Clocking................................................................................................................................. 66
4.1 PLL Configuration and Status ............................................................................................................... 67
4.2 Clock Source and divisor ...................................................................................................................... 67
4.3 System clock.......................................................................................................................................... 68
4.4 SpaceWire clock .................................................................................................................................... 68
4.5 MIL-STD-1553B clock ......................................................................................................................... 68
4.6 PacketWire RX Clock ........................................................................................................................... 68
4.7 ADC Clock ............................................................................................................................................ 68
4.8 DAC Clock ............................................................................................................................................ 69
4.9 PWM Clock........................................................................................................................................... 69
4.10 Clock gating unit ................................................................................................................................... 69
4.11 Debug AHB bus clocking...................................................................................................................... 69
4.12 Test mode clocking................................................................................................................................ 69
5 Reset....................................................................................................................................... 70
5.1 IO Reset................................................................................................................................................. 70
6 Technical notes....................................................................................................................... 71
6.1 GRLIB AMBA plug&play scanning ..................................................................................................... 71
6.2 Software portability............................................................................................................................... 71
7 System Startup Status and General Configuration................................................................. 72
7.1 Configuration Registers......................................................................................................................... 72
7.2 Boot Strap information register............................................................................................................. 77

GR716-DS-UM, May 2019, Version 1.29 3 www.cobham.com/gaisler
GR716
7.3 Special Configuration Registers ............................................................................................................ 78
8 Reset Generation and Brownout Detection............................................................................ 86
8.1 Overview ............................................................................................................................................... 86
8.2 Operation ............................................................................................................................................... 86
8.3 Registers ................................................................................................................................................ 87
9 Crystal (XO) Oscillator.......................................................................................................... 91
9.1 Overview ............................................................................................................................................... 91
9.2 Operation ............................................................................................................................................... 91
10 PLL......................................................................................................................................... 93
10.1 Overview ............................................................................................................................................... 93
10.2 Operation ............................................................................................................................................... 93
10.3 Registers ................................................................................................................................................ 94
11 Voltage and Current References........................................................................................... 100
11.1 Overview ............................................................................................................................................. 100
11.2 Operation ............................................................................................................................................. 100
12 ADC, Pre-Amplifier and Analog MUX ............................................................................... 101
12.1 Overview ............................................................................................................................................. 101
12.2 Operation ............................................................................................................................................. 102
12.3 Registers .............................................................................................................................................. 107
13 LDO ..................................................................................................................................... 112
13.1 Overview ............................................................................................................................................. 112
13.2 Operation ............................................................................................................................................. 112
14 Temperature Sensor.............................................................................................................. 113
14.1 Overview ............................................................................................................................................. 113
14.2 Operation ............................................................................................................................................. 113
15 DAC ..................................................................................................................................... 114
15.1 Overview ............................................................................................................................................. 114
15.2 Operation ............................................................................................................................................. 115
15.3 Registers .............................................................................................................................................. 116
16 LEON3/FT - High-performance SPARC V8 32-bit Processor ............................................ 119
16.1 Overview ............................................................................................................................................. 119
16.2 LEON3 integer unit ............................................................................................................................. 120
16.3 Local instruction and data RAM ......................................................................................................... 128
16.4 Floating-point unit............................................................................................................................... 128
16.5 AMBA interface .................................................................................................................................. 129
16.6 Configuration registers ........................................................................................................................ 130
16.7 Software considerations ...................................................................................................................... 136
17 IEEE-754 Floating-Point Unit ............................................................................................. 137
17.1 Overview ............................................................................................................................................. 137
17.2 Functional Description ........................................................................................................................ 137
18 UART Serial Interface ......................................................................................................... 140
18.1 Overview ............................................................................................................................................. 141
18.2 Operation ............................................................................................................................................. 141
18.3 Baud-rate generation ........................................................................................................................... 142
18.4 Loop back mode .................................................................................................................................. 143
18.5 FIFO debug mode................................................................................................................................ 143

GR716-DS-UM, May 2019, Version 1.29 4 www.cobham.com/gaisler
GR716
18.6 Interrupt generation ............................................................................................................................. 143
18.7 Registers .............................................................................................................................................. 144
19 Hardware Debug Support Unit ............................................................................................ 147
19.1 Overview ............................................................................................................................................. 147
19.2 Operation ............................................................................................................................................. 147
19.3 AHB trace buffer ................................................................................................................................. 148
19.4 Instruction trace buffer ........................................................................................................................ 150
19.5 Using the DSU trace buffer ................................................................................................................. 151
19.6 DSU memory map............................................................................................................................... 151
19.7 DSU registers ...................................................................................................................................... 152
20 On-chip Dual-port Memory with EDAC Protection............................................................ 158
20.1 Overview ............................................................................................................................................. 158
20.2 Local Memory memory map and register ........................................................................................... 161
21 Fault Tolerant PROM/SRAM Memory Interface ................................................................ 165
21.1 Overview ............................................................................................................................................. 165
21.2 PROM access ...................................................................................................................................... 166
21.3 SRAM access ...................................................................................................................................... 168
21.4 Memory EDAC ................................................................................................................................... 168
21.5 Bus Ready signalling........................................................................................................................... 169
21.6 Access errors ....................................................................................................................................... 171
21.7 Registers .............................................................................................................................................. 172
22 Fault Tolerant NVRAM Memory Interface ......................................................................... 176
23 MIL-STD-1553B / AS15531 Interface ................................................................................ 177
23.1 Overview ............................................................................................................................................. 177
23.2 Electrical interface............................................................................................................................... 178
23.3 Operation ............................................................................................................................................. 178
23.4 Bus Controller Operation .................................................................................................................... 180
23.5 Remote Terminal Operation ................................................................................................................ 185
23.6 Bus Monitor Operation........................................................................................................................ 189
23.7 Registers .............................................................................................................................................. 190
24 ADC / DAC Interface .......................................................................................................... 202
24.1 Overview ............................................................................................................................................. 202
24.2 Operation ............................................................................................................................................. 204
24.3 Registers .............................................................................................................................................. 206
25 CAN 2.0 Controller.............................................................................................................. 211
25.1 Overview ............................................................................................................................................. 211
25.2 Interface............................................................................................................................................... 213
25.3 Protocol ............................................................................................................................................... 213
25.4 Status and monitoring.......................................................................................................................... 214
25.5 Transmission........................................................................................................................................ 214
25.6 Reception............................................................................................................................................. 217
25.7 Global reset and enable ....................................................................................................................... 220
25.8 Registers .............................................................................................................................................. 221
25.9 Memory mapping ................................................................................................................................ 230
26 Clock gating unit (Primary) ................................................................................................. 232
26.1 Overview ............................................................................................................................................. 232
26.2 Operation ............................................................................................................................................. 232

GR716-DS-UM, May 2019, Version 1.29 5 www.cobham.com/gaisler
GR716
26.3 Registers .............................................................................................................................................. 233
27 Clock gating unit (Secondary) ............................................................................................. 236
27.1 Overview ............................................................................................................................................. 236
27.2 Operation ............................................................................................................................................. 236
27.3 Registers .............................................................................................................................................. 237
28 DMA Controller with internal AHB/APB bridge ................................................................ 240
28.1 Overview ............................................................................................................................................. 240
28.2 Configuration....................................................................................................................................... 241
28.3 Operation ............................................................................................................................................. 250
28.4 AHB transfers...................................................................................................................................... 252
28.5 Interrupts ............................................................................................................................................. 252
28.6 Errors ................................................................................................................................................... 252
28.7 Internal Buffer Readout Interface........................................................................................................ 253
28.8 Registers .............................................................................................................................................. 253
28.9 DMA Transfer Example ...................................................................................................................... 259
29 General Purpose I/O Port ..................................................................................................... 263
29.1 Overview ............................................................................................................................................. 264
29.2 Operation ............................................................................................................................................. 264
29.3 Pulse command.................................................................................................................................... 264
29.4 Pulse sequencer ................................................................................................................................... 264
29.5 Pulse sampler...................................................................................................................................... 266
29.6 Registers .............................................................................................................................................. 266
30 Pulse Width Modulation Generator ..................................................................................... 277
30.1 Overview ............................................................................................................................................. 278
30.2 Operation ............................................................................................................................................. 278
30.3 Registers .............................................................................................................................................. 280
31 PacketWire Receiver............................................................................................................ 285
31.1 Overview ............................................................................................................................................. 285
31.2 PacketWire interface............................................................................................................................ 285
31.3 Operation ............................................................................................................................................. 286
31.4 Operation ............................................................................................................................................. 286
31.5 Registers .............................................................................................................................................. 288
32 PacketWire Transmitter........................................................................................................ 291
32.1 Overview ............................................................................................................................................. 291
32.2 PacketWire interface............................................................................................................................ 291
32.3 Operation ............................................................................................................................................. 292
32.4 Registers .............................................................................................................................................. 293
33 SpaceWire Interface and RMAP target................................................................................ 296
33.1 Overview ............................................................................................................................................. 296
33.2 Operation ............................................................................................................................................. 297
33.3 Link interface ...................................................................................................................................... 298
33.4 Time-code distribution ........................................................................................................................ 301
33.5 Interrupt distribution............................................................................................................................ 302
33.6 Receiver DMA channels...................................................................................................................... 304
33.7 Transmitter DMA channels ................................................................................................................. 310
33.8 RMAP.................................................................................................................................................. 313
33.9 AMBA interface .................................................................................................................................. 317

GR716-DS-UM, May 2019, Version 1.29 6 www.cobham.com/gaisler
GR716
33.10 SpaceWire Plug-and-Play.................................................................................................................... 318
33.11 Registers .............................................................................................................................................. 324
34 SpaceWire - Time Distribution Protocol.............................................................................. 342
34.1 Overview ............................................................................................................................................. 342
34.2 Protocol ............................................................................................................................................... 342
34.3 Functionality........................................................................................................................................ 342
34.4 Data formats ........................................................................................................................................ 348
34.5 Reference documents .......................................................................................................................... 348
34.6 Registers .............................................................................................................................................. 349
35 General Purpose Timer Unit with Watchdog ....................................................................... 365
35.1 Overview ............................................................................................................................................. 365
35.2 Operation ............................................................................................................................................. 365
35.3 Registers .............................................................................................................................................. 367
36 General Purpose Timer Unit (Secondary)............................................................................ 371
36.1 Overview ............................................................................................................................................. 371
36.2 Operation ............................................................................................................................................. 371
36.3 Registers .............................................................................................................................................. 372
37 I2C to AHB bridge ............................................................................................................... 376
37.1 Overview ............................................................................................................................................. 376
37.2 Operation ............................................................................................................................................. 377
37.3 Registers .............................................................................................................................................. 381
38 I2C master............................................................................................................................ 384
38.1 Overview ............................................................................................................................................. 384
38.2 Operation ............................................................................................................................................. 385
38.3 Registers .............................................................................................................................................. 388
39 I2C slave .............................................................................................................................. 391
39.1 Overview ............................................................................................................................................. 391
39.2 Operation ............................................................................................................................................. 392
39.3 Registers .............................................................................................................................................. 394
40 Interrupt Controller .............................................................................................................. 398
40.1 Overview ............................................................................................................................................. 398
40.2 Operation ............................................................................................................................................. 399
40.3 Registers .............................................................................................................................................. 403
41 LEON3 Statistics Unit ......................................................................................................... 415
41.1 Overview ............................................................................................................................................. 415
41.2 Using the LEON3 statistics unit.......................................................................................................... 417
41.3 Registers .............................................................................................................................................. 417
42 Memory Scrubber and Status Register ................................................................................ 420
42.1 Overview ............................................................................................................................................. 421
42.2 Operation ............................................................................................................................................. 421
42.3 Registers .............................................................................................................................................. 423
43 SPI to AHB bridge ............................................................................................................... 428
43.1 Overview ............................................................................................................................................. 428
43.2 Transmission protocol ......................................................................................................................... 429
43.3 System clock requirements and sampling ........................................................................................... 430
43.4 SPI instructions.................................................................................................................................... 430

GR716-DS-UM, May 2019, Version 1.29 7 www.cobham.com/gaisler
GR716
43.5 Registers .............................................................................................................................................. 432
44 SPI Controller ...................................................................................................................... 434
44.1 Overview ............................................................................................................................................. 434
44.2 Operation ............................................................................................................................................. 435
44.3 Registers .............................................................................................................................................. 438
45 SPI for Space Slave Controller ............................................................................................ 445
45.1 Overview ............................................................................................................................................. 445
45.2 Implementation of SPI protocols......................................................................................................... 446
45.3 Transmission........................................................................................................................................ 446
45.4 Operation ............................................................................................................................................. 447
45.5 SPI 2 Protocol Handler........................................................................................................................ 447
45.6 Message Header - Command Token.................................................................................................... 448
45.7 Redundancy ......................................................................................................................................... 454
45.8 Registers .............................................................................................................................................. 455
46 SPI Memory Controller........................................................................................................ 460
46.1 Overview ............................................................................................................................................. 461
46.2 Operation ............................................................................................................................................. 461
46.3 Registers .............................................................................................................................................. 464
47 AMBA Protection Unit ........................................................................................................ 467
47.1 Overview ............................................................................................................................................. 467
47.2 Operation ............................................................................................................................................. 468
47.3 Registers .............................................................................................................................................. 468
47.4 Example of configure and use the Memory protection ....................................................................... 484
48 Serial Debug and remote access Interface ........................................................................... 486
48.1 Overview ............................................................................................................................................. 487
48.2 Operation ............................................................................................................................................. 487
48.3 Registers .............................................................................................................................................. 488
49 AHB Status Registers .......................................................................................................... 490
49.1 Overview ............................................................................................................................................. 490
49.2 Operation ............................................................................................................................................. 490
49.3 Registers .............................................................................................................................................. 491
50 Trace buffer.......................................................................................................................... 493
50.1 Overview ............................................................................................................................................. 493
50.2 Operation ............................................................................................................................................. 494
50.3 Using the AHB trace buffer................................................................................................................. 495
50.4 Registers .............................................................................................................................................. 496
51 Boot ROM............................................................................................................................ 499
51.1 Overview ............................................................................................................................................. 499
51.2 ROM Architecture ............................................................................................................................... 500
51.3 Loader description............................................................................................................................... 505
51.4 Standby description ............................................................................................................................. 505
51.5 State at handover to application software............................................................................................ 506
51.6 Boot source requirements.................................................................................................................... 507
51.7 Protection schemes.............................................................................................................................. 507
52 Electrical description ........................................................................................................... 510
52.1 Absolute maximum ratings ................................................................................................................. 510
52.2 Recommended operating conditions ................................................................................................... 512

GR716-DS-UM, May 2019, Version 1.29 8 www.cobham.com/gaisler
GR716
52.3 Power supplies characteristics............................................................................................................. 513
52.4 Input voltages, leakage currents and capacitances .............................................................................. 514
52.5 Output voltages, leakage currents and capacitances ........................................................................... 515
52.6 Simplified IO buffer schematics.......................................................................................................... 517
52.7 DAC Electrical Characteristics ........................................................................................................... 519
52.8 ADC Electrical Characteristics ........................................................................................................... 520
52.9 Reference Voltages and Currents Electrical Characteristics ............................................................... 524
52.10 Reset and Brownout-Detector Electrical Characteristics .................................................................... 524
52.11 AC characteristics................................................................................................................................ 526
53 Mechanical description ........................................................................................................ 540
53.1 Component and package ..................................................................................................................... 540
53.2 Pin assignment..................................................................................................................................... 540
53.3 Mechanical package drawings............................................................................................................. 544
54 Ordering information ........................................................................................................... 546
55 Errata.................................................................................................................................... 547
55.1 Overview ............................................................................................................................................. 547
55.2 Errata description ................................................................................................................................ 547
56 Features ................................................................................................................................ 549
56.1 Overview ............................................................................................................................................. 549
56.2 Feature description .............................................................................................................................. 549

GR716-DS-UM, May 2019, Version 1.29 9 www.cobham.com/gaisler
GR716
1 Introduction
1.1 Scope
This document is the advanced data sheet and user’s manual for the GR716 LEON3FT microcontrol-
ler. The GR716 microcontroller has been developed in an activity initiated by the European Space
Agency under ESTEC contract 40001117749/14/NL/AK.
1.2 Data sheet limitations
Note that this document is an advanced data sheet:
• Advanced data sheet - Product in development
• Preliminary data sheet - Shipping prototype
• Data sheet - Shipping space-grade product
1.3 Updates and feedback
Feedback can be sent to:
Cobham Gaisler AB support: [e-mail]
1.4 Software support
The GR716 LEON3FT microcontroller design is supported by standard toolchains provided by
Cobham Gaisler. Toolchains can be downloaded from http://www.cobham.com/gaisler.
1.5 Reference documents
[AMBA] AMBA Specification, Rev 2.0, ARM Limited
[GRLIB] GRLIB IP Library User's Manual, Cobham Gaisler, www.cobham.com/gaisler
[GRIP] GRLIB IP Core User's Manual, Cobham Gaisler, www.cobham.com/gaisler
[SPARC] The SPARC Architecture Manual, Version 8, SPARC International Inc.
[LEON-REX] LEON-REX Instruction Set Extension, Cobham Gaisler
[GRMON3] GRMON3 User's Manual, Cobham Gaisler

GR716-DS-UM, May 2019, Version 1.29 10 www.cobham.com/gaisler
GR716
1.6 Document revision history
Change record information is provided in table 1.
Table 1. Change record
Version Date Note
1.29 May 2019 First public release