Crown XLS 1000 Series User manual

XLS1000 – 2500
Service Manual
142195-1 4/10

XLS3 Tech Support.doc
XLS-3 MENU:
The XLS main menu structure communicates functionalit of the amplifier in terms
of its input routing (MODE), filter selection (FILTER), and frequenc of the filter
(FREQ)…when available.
MODE: Amplifier audio routing.
STEREO: Channel 1 input to Channel 1 output, Channel 2 input to Channel 2
output.
BRID E: Channel 1 input to Channel 1, with the inverted Channel 1 input to
Channel 2. B taking the two positive outputs of the amplifier, twice the output
voltage (twice the power) is realized. In BRIDGE mode, Crossover (XOVER)
filters are not allowed since the same audio is required for both output channels.
INPUT Y: Channel 1 input to both Channel 1 and Channel 2’s processing and
output. Switching occurs pre-pot and pre-filter.
FILTER: Audio filtering.
BYPASS: Both channels are full spectrum audio (20Hz – 20KHz). In BYPASS
mode, no FREQ choice is allowed.
LOWPASS: Both channels are 4
th
order Linkwitz-Rile filters with frequenc
breakpoint determined b the FREQ choice.
HI HPASS: Both channels are 4
th
order Linkwitz-Rile filters with frequenc
breakpoint determined b the FREQ choice.

XOVER: When XOVER is selected, the MODE choice is automaticall changed
to INPUT Y. Channel 1 is fed to both channels’ processing with Channel 1 being
Lowpass and Channel 2 being Highpass. The crossover frequenc is determined
b the FREQ choice.
CLIP COMPRESSOR: Allows the clip compressor for each channel to be either
turned on or off. The Clip compressor is a proprietar algorithm that limits clipping
on a real-time basis.
DIA NOSTIC MENU:

A set of diagnostic menus can be accessed at an time b pushing all three menu
buttons at the same time. The amplifier continues to pass audio, but the diagnostic
menus are displa ed until the MODE/MENU button is pushed and normal amplifier
functionalit returns.
MODEL & VOLTA E TYPE: Displa s the Model and voltage t pe.
POWER SUPPLY TEMP & LOW VOLTA E RAIL: Displa s the Power
Suppl Heatsink Temperature and the Low Voltage rail (in volts).
AMPLIFIER CHANNEL TEMP: Displa s the heatsink temperature for the power
devices of each channel.
HI H VOLTA E RAILS: Indicates the Amplifier voltage rails, Positive (VP) and
Negative (VN).
FIRMWARE VERSION: Shows the firmware version.
FAULT STATUS: Indicates the latest fault that the amplifier has had and the
number of instances of that fault. Refer to the Error Codes section for specific
Fault/Error codes.

ERROR CODES:
The amplifier’s processor runs through a series of Power On Self Tests (POST) when
the amplifier is first powered up. If the processor encounters an error, it will
communicate the error via the front panel Thermal LED’s.
These error codes are unique and based upon a Major and Minor element. The Major
element is determined b which portion of the amplifier failed POST, while the
Minor portion is which part of the Major element failed. The are displa ed b CH1
Thermal LED = MAJOR, CH2 Thermal LED = MINOR. The MAJOR is blinked 1
st
,
then the MINOR.
MAJOR MINOR ERROR COMMENT
0 1 Processor POST Fail Internal MCU error (PLL, etc)
0 2 Processor Assert Fail Something catastrophic in the
firmware.
0 3 Processor Watchdog Fail Firmware error where
watchdog timeout has not
been attended.
0 4 Power Fail Power Sequencing of the
Power Suppl has failed.
1 1 LCD POST Fail Initialization of LCD failed
1 2 LCD Communications Fail MCU unable to communicate
with LCD. Can occur
an time as opposed to POST
2 1 DSP Boot Fail MCU is unable to boot the
DSP via I2C
2 2 DSP POST Fail MCU was able to boot the
DSP, but not able to
communicate and control.
2 3 DSP Communications Fail Can happen an time. Would
have been found via Boot or
POST failure if full time I2C
problem
3 1 RUBY POST Fail Unable to communicate with
Rub on amplifier board
initiall .
3 2 RUBY Communications Fail I2C communications failure
for some reason. Not caught
at POST
3 3 RUBY ADC Sensor Fail An illegal ADC value was
encountered b MCA via
Rub
4 1 MFGTEST Result B te Failure APM’s MFGTEST b te
indicates test failure or not

tested.
4 2 MFGTEST GPIO Comm Fail APM is unable to
communicate with the MFG
Test fixture’s I2C GPIO
registers.
4 3 MFGTEST ADC Comm Fail APM is unable to
communicate with the MFG
Test fixture’s I2C ADC
registers.
CHASSIS LEVEL SELF-TEST:
This test is used to ensure the functionalit of the LCD, Buttons, and Fan once the
amplifier is assembled. The self-test is initiated b holding down the PREVIOUS
(middle) button during power up. The amplifier enters a test mode where all of the
front panel LED’s except the SPI indicators are lit. Additionall , the fan is at full
speed and the LCD indicates which of the three front panel buttons are pushed. Once
all three buttons have been pushed and released, the test completes and the amplifier
returns to normal operation.

APM SECTION THEORY OF OPERATION
ANALO INPUTS:
The input to the APM can accept 1.4Vrms input and drive the resultant APM output
to a level that drives the amplifier to full rated power into 8Ω. The differential analog
inputs come from J700 which connects to the MAIN board of the amplifier. The
input XLR, ¼”, and RCA connectors tie directl to this point on the MAIN board.
The following will be for CH2, with CH1 being identical except for the analog Y
input switch (U601).
U600-A,B form a differential to single ended gain stage with a gain of -3.54dB. See
Gain Block Diagrams below. The output of U600B drives the input of U601, which
is a unit gain amplifier that selects either the ‘A’ input (CH2) or ‘B’ input (CH1)
dependent upon the INPUT_Y drive from the microprocessor (Q600 to U601-1).
U601 provides the Input Y audio routing. The output of U601 drives front panel pot
R610 that feeds single ended amplifier section U600-C. This stage has a maximum
gain of +13.86dB as shown.
For CH2, the output of U601-5,6 drives a comparator, U700-B, that lights the front
panel SPI LED when the input signal is >-40dBu. R600/601 provides the DC bias

that provides the comparator reference point. For CH1, the input to the SPI indicator
comes from U500-7.
U600-D acts as a unit gain inverter that creates a differential signal (+6dB gain) to
feed the attenuator for either the TI DSP’s ADC (XLS1000) or Cirrus Codec
(XLS1500, 2000, 2500). For the XLS1000, R618-619, R621-623 form a voltage
divider and bias network into the TI DSP (CH2±_DSP_AD). In the case of the
XLS1500 – 2500, R613-614, R617, R620 form the voltage divider and bias network
into the Cirrus codec (CH2±_AD).
As ou can see, the major difference between the XLS1000 and XLS1500 – 2500
APM’s resides in the use of an external Cirrus Codec (U702) for the larger amplifiers.
This results in ~4dB better S/N, but at an additional cost of $2.

ANALO OUTPUTS:
The output of the APM is driven b a differential gain stage (U701-C,D) that receives
its input from the DAC. In the case of the XLS1000, the DAC resides within the TI
DSP (CH2±_DSP_DA), while in the case of the XLS1500 – 2500, the DAC is part of
the Cirrus codec (CH2±_DA). This gain stage matches the output of the DAC to the
amplifier’s input requirement of 5.66Vrms to drive the amplifier’s output to full rated
power.
DI ITAL PROCESSIN :
The TAS3202 is an integrated converter and DSP that provides all of our signal
processing at an affordable cost. The IC is powered from +3.3V and uses ~200mA.
Clock eneration:
The amplifier runs from a single clock that is generated b the TAS3202 (U703)
using the 24.576MHz cr stal, Y700. This clock is divided b 2 internall b the
DSP and sent to the microprocessor (MCLK_UP) and Cirrus codec
(MCLK_CODEC). The fundamental clock is divided internall in the DSP to
768KHz and sent to Divide-b -2 (U704-B) to provide differential 384KHz to the
MAIN board’s Rub PWM IC and the 384KHz is then divided b U704-A to
provide 192KHz to the MAIN SMPS via J700.
Digital Audio:

The DSP runs at 48KHz sampling rate and also requires that the external codec
also samples at 48KHz. The DSP utilizes I2S digital audio to get audio to/from
the external codec (DSP_SDIN, DSP_SDOUT). The timing diagram below
shows the relationship between serial clock (SCLK), channel clock (LRCK), and
digital audio (SDIN, SDOUT).
CLIP Inputs:
The Rub IC (U1) on the MAIN PWA supplies individual channel clip
indications via J700. In order to get these clip indications directl into the TI DSP
(U703) as an input for the clip compressor, a 2
nd
I2S input is used. The channel
clip indications (CLIP1 & CLIP2) are gated into their own I2S channel using the
LRCK signal and U708. CLIP1 events are gated onto the ‘L’ I2S channel and the
CLIP2 events are gated onto the ‘R’ I2S channel. This provides 48KHz sampling
of the Rub clip events into the DSP for the clip compressor.
Serial Communications:
The TAS3202 has two I2C channels: I2C1 and I2C2 for external communications
and booting. The DSP initiall tries to use I2C2 to access an external EEPROM
to boot itself. In this design, an external EEPROM is not used and the DSP is
booted from the microprocessor (U706) via I2C1. The DSP acts as a slave with
the processor being the master. Control for filter selection, frequenc setting,
input level monitoring, clip events, and other control and monitoring functions are
handled thru this serial communications port.
NOTE: Don’t confuse I2C with I2S. Both are used in this device. I2C is a 2-
wire serial communications protocol that allows an external processor to boot,
monitor, and control the TAS3202. I2S is a 3-wire serial digital audio
protocol that supports 2 channels of real-time audio and allows digital audio to
move in and out of the TAS3202.

Thermal Limiter Compressor (TLC):
There are thermistors that monitor each of the amplifier channel’s heatsinks as
well as one that monitors the heatsink for the secondar diodes (±Vcc) of the
power suppl . The TLC adjusts the gain at a rate of 1.25dB/°C at temperatures
greater than 75°C. The TLC takes the worst case of the three thermistor readings
and adjusts both channels at the same rate.
compressor threshold
0
5
10
15
20
25
30
35
70 80 90 100
Temp (C )
Gain reduction (dB)
Series1
Bridge Mode:

As can be seen b the DSP signal flow, when the amplifier is placed in Bridge
mode, CH1 signal is taken post-crossover, inverted, and sent to CH2 output. This
ensures that the gains are matched and that the same signal is on both outputs
(CH2 = -CH1). When in Bridge mode, both channel’s clip signals are or’ed
together and the output clip indicators are driven from the same signal.

MICROPROCESSOR CONTROL:
Boot & POST:
The microprocessor boots from its internal FLASH and does a variet of Power
On Self-Tests (POST). See the Error Codes section of the manual for a
description of all of the error codes and their meanings.
RUBY Interface:
Part of the processor’s POST involves interface with Rub and ensuring that it is
up and working. The processor has two separate I2C interfaces: One for Rub
(I2C1) and one for the TI DSP (I2C2).
DSP Interface:
As discussed previousl , the processor boots the DSP via the dedicated I2C port.
Processor interfacing for various controls and monitoring is via this interface.
LCD Interface:
The LCD is purchased as a module and has an interface composed of an Enable,
Read/Write, Register Select, and Data Lines. The module works in nibble mode
where onl Data Lines LCD_D[7:4] are used. The module has an internal
character register that generates the correct letter in the correct position based
upon the processor’s inputs. While the LCD module runs from +5V, the
processor utilizes +3.3V. The interface works due to the processor’s LCD’s I/O
lines using open drain outputs with +5V pullups.
Bias for the LCD’s contrast is provided via the processors PWM output that is
filtered b R725/C761. The module’s LED backlight is set b R730 from +5V.

Front Panel LED’s & Switches:
The processor monitors the (3) front panel control switches and provides the
necessar interface to the displa and amplifier. In addition, the processor
monitors the thermal sensors from Rub and provides thermal LED lights during
over temperature. The processor lights the output -20dB, -10dB, and CLIP LED’s
as required.
PWM DeadTime Control:
Although not presentl used, the processor has the capabilit of changing the
switching deadtime of the PWM amplifier channels through the use of the
processors PWM outputs and filtering.
Fan Control:
The processor monitors the thermal sensors as discussed earlier and controls the
fan speed using a PWM output and filter R704/C721. The curve below shows the
relationship of temperature to fan speed.

PWM as a function of temp
0.0
10.0
20.0
30.0
40.0
50.0
60.0
70.0
80.0
90.0
100.0
0 20 40 60 80 100
Temp ( C )
PWM register
raw equation
fan speed
BOM: 141558-4 XLS1500/2000/2500 APM
REF.
ES. CPN
ESCRIPTION
MAP
LOC.
C500 139719-1 CAP 1.0UF 25V X7R 10% 0805 F 2
C501 A11369-220J1 CAP 22PF 50V 5% 0603 NPO B 2
C502 A11369-220J1 CAP 22PF 50V 5% 0603 NPO B 2
C503 A11369-101J1 100PF 50V 5% NPO 0603 B 2
C504 126623-1 47UF 16V 6.3X5.5MM 20% SMT C 2
C505 A11369-101J1 100PF 50V 5% NPO 0603 A 2
C506 A11369-101J1 100PF 50V 5% NPO 0603 A 2
C507 A11369-472J2 CAP 4700PF 5% 50V SMT 0805 A 3
C508 126623-1 47UF 16V 6.3X5.5MM 20% SMT B 3
C509 126623-1 47UF 16V 6.3X5.5MM 20% SMT A 3
C511 OPEN B 3
C512 A11369-101J1 100PF 50V 5% NPO 0603 A 2
C513 A11369-101J1 100PF 50V 5% NPO 0603 A 2
C514 A11369-681F2 CAP 680PF 50V 1% NPO 0805 B 1
C515 A11369-222F2 CAP 2200PF 50V NPO 1% 0805 B 1
C516 A11369-222F2 CAP 2200PF 50V NPO 1% 0805 B 2
C517 A11369-681F2 CAP 680PF 50V 1% NPO 0805 B 2
C518 126623-1 47UF 16V 6.3X5.5MM 20% SMT A 1

C519 126623-1 47UF 16V 6.3X5.5MM 20% SMT A 2
C600 139719-1 CAP 1.0UF 25V X7R 10% 0805 F 2
C601 A11369-220J1 CAP 22PF 50V 5% 0603 NPO G 1
C602 A11369-220J1 CAP 22PF 50V 5% 0603 NPO G 2
C603 A11369-101J1 100PF 50V 5% NPO 0603 G 2
C604 126623-1 47UF 16V 6.3X5.5MM 20% SMT G 2
C605 A11369-101J1 100PF 50V 5% NPO 0603 G 2
C606 A11369-101J1 100PF 50V 5% NPO 0603 G 2
C607 A11369-472J2 CAP 4700PF 5% 50V SMT 0805 B 3
C608 126623-1 47UF 16V 6.3X5.5MM 20% SMT F 3
C609 126623-1 47UF 16V 6.3X5.5MM 20% SMT E 3
C611 OPEN D 4
C612 A11369-101J1 100PF 50V 5% NPO 0603 B 2
C613 A11369-101J1 100PF 50V 5% NPO 0603 B 2
C614 A11369-681F2 CAP 680PF 50V 1% NPO 0805 B 2
C615 A11369-222F2 CAP 2200PF 50V NPO 1% 0805 B 2
C616 A11369-222F2 CAP 2200PF 50V NPO 1% 0805 B 1
C617 A11369-681F2 CAP 680PF 50V 1% NPO 0805 B 1
C618 126623-1 47UF 16V 6.3X5.5MM 20% SMT C 2
C619 126623-1 47UF 16V 6.3X5.5MM 20% SMT B 1
C620 135505-1 CAP 0.1UF 25V 10% X7R 0603 F 2
C621 135505-1 CAP 0.1UF 25V 10% X7R 0603 F 2
C700 135505-1 CAP 0.1UF 25V 10% X7R 0603 F 2
C701 135505-1 CAP 0.1UF 25V 10% X7R 0603 F 2
C702 135505-1 CAP 0.1UF 25V 10% X7R 0603 G 2
C703 135505-1 CAP 0.1UF 25V 10% X7R 0603 G 2
C704 135505-1 CAP 0.1UF 25V 10% X7R 0603 B 2
C705 135505-1 CAP 0.1UF 25V 10% X7R 0603 A 2
C706 139947-1 CAP 10UF 10V 10% X5R 1206 A 3
C707 141914-104KB CAP 100NF 16V 10% X7R 0402 A 3
C708 135505-1 CAP 0.1UF 25V 10% X7R 0603 B 2
C709 135505-1 CAP 0.1UF 25V 10% X7R 0603 B 2
C711 139719-1 CAP 1.0UF 25V X7R 10% 0805 C 2
C713 139719-1 CAP 1.0UF 25V X7R 10% 0805 B 2
C714 OPEN D 2
C715 OPEN D 2
C716 141914-104KB CAP 100NF 16V 10% X7R 0402 D 2
C717 141914-104KB CAP 100NF 16V 10% X7R 0402 D 2
C718 139719-1 CAP 1.0UF 25V X7R 10% 0805 D 3
C719 141914-104KB CAP 100NF 16V 10% X7R 0402 D 2
C720 138663-1 CAP 10UF 6.3V X5R 0805 D 2
C721 141914-104KB CAP 100NF 16V 10% X7R 0402 F 2
C722 139947-1 CAP 10UF 10V 10% X5R 1206 B 3
C723 141914-104KB CAP 100NF 16V 10% X7R 0402 B 3
C724 141914-104KB CAP 100NF 16V 10% X7R 0402 B 3
C725 139719-1 CAP 1.0UF 25V X7R 10% 0805 B 3
C726 126623-1 47UF 16V 6.3X5.5MM 20% SMT B 3
C727 141914-104KB CAP 100NF 16V 10% X7R 0402 B 3

C728 138663-1 CAP 10UF 6.3V X5R 0805 C 3
C729 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C730 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C731 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C732 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C733 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C734 141914-104KB CAP 100NF 16V 10% X7R 0402 C 4
C735 138663-1 CAP 10UF 6.3V X5R 0805 C 4
C736 A11369-220J1 CAP 22PF 50V 5% 0603 NPO C 2
C737 A11369-220J1 CAP 22PF 50V 5% 0603 NPO C 3
C738 138663-1 CAP 10UF 6.3V X5R 0805 B 3
C739 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C740 138663-1 CAP 10UF 6.3V X5R 0805 B 3
C741 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C742 138663-1 CAP 10UF 6.3V X5R 0805 C 3
C743 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C744 141914-104KB CAP 100NF 16V 10% X7R 0402 C 4
C745 138663-1 CAP 10UF 6.3V X5R 0805 C 4
C746 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C747 138663-1 CAP 10UF 6.3V X5R 0805 C 3
C748 141914-104KB CAP 100NF 16V 10% X7R 0402 D 3
C750 141914-104KB CAP 100NF 16V 10% X7R 0402 E 2
C751 141914-104KB CAP 100NF 16V 10% X7R 0402 F 3
C752 141914-104KB CAP 100NF 16V 10% X7R 0402 E 2
C753 141914-104KB CAP 100NF 16V 10% X7R 0402 F 2
C754 141914-104KB CAP 100NF 16V 10% X7R 0402 E 3
C755 141914-104KB CAP 100NF 16V 10% X7R 0402 F 2
C756 141914-104KB CAP 100NF 16V 10% X7R 0402 F 3
C757 141914-104KB CAP 100NF 16V 10% X7R 0402 F 3
C758 141914-104KB CAP 100NF 16V 10% X7R 0402 D 2
C759 141914-104KB CAP 100NF 16V 10% X7R 0402 G 3
C760 141914-104KB CAP 100NF 16V 10% X7R 0402 D 3
C761 139719-1 CAP 1.0UF 25V X7R 10% 0805 F 2
C762 139719-1 CAP 1.0UF 25V X7R 10% 0805 C 2
C763 139719-1 CAP 1.0UF 25V X7R 10% 0805 C 2
C764 141914-104KB CAP 100NF 16V 10% X7R 0402 B 3
C765 141914-104KB CAP 100NF 16V 10% X7R 0402 C 3
C766 138663-1 CAP 10UF 6.3V X5R 0805 E 2
D500 135343-1 DIODE DUAL MMBD4148SE SOT-23 B 2
D501 135343-1 DIODE DUAL MMBD4148SE SOT-23 B 2
D502 OPEN B 2
D503 OPEN B 2
D600 135343-1 DIODE DUAL MMBD4148SE SOT-23 G 1
D601 135343-1 DIODE DUAL MMBD4148SE SOT-23 G 1
D602 OPEN G 2
D603 OPEN G 2
E500 126473-1 LED GRN SMT 1206 B 2
E600 126473-1 LED GRN SMT 1206 G 2

E700 131105-1 LED RED 638NM 1206 SMT B 3
E701 131105-1 LED RED 638NM 1206 SMT B 3
E702 126473-1 LED GRN SMT 1206 B 3
E703 126473-1 LED GRN SMT 1206 B 2
E704 131105-1 LED RED 638NM 1206 SMT G 3
E705 131105-1 LED RED 638NM 1206 SMT G 3
E706 126473-1 LED GRN SMT 1206 G 3
E707 126473-1 LED GRN SMT 1206 G 2
E708 141620-1 LCD 38MMX16MM 40X16 DOT BKLIGHT E 3
FB700 125846-1 FERRITE BEAD 600 OHM .5A 0805 B 3
FB701 125846-1 FERRITE BEAD 600 OHM .5A 0805 B 3
FB702 125846-1 FERRITE BEAD 600 OHM .5A 0805 C 2
FB703 125846-1 FERRITE BEAD 600 OHM .5A 0805 C 2
HW1 OPEN D 1
HW2 OPEN E 1
HW3 OPEN F 1
HW11 141621-1 SPCR 0.098"X0.18"X0.156" NYL D 3
HW12 141621-1 SPCR 0.098"X0.18"X0.156" NYL D 2
HW13 141621-1 SPCR 0.098"X0.18"X0.156" NYL F 3
HW14 141621-1 SPCR 0.098"X0.18"X0.156" NYL F 2
J700 141746-1 CON FFC 50P ZIF LOC LTCH SM HOR C 2
J702 OPEN F 3
J703 141668-1 HDR 6POS TH G 3
PWB1 141557-4 PWB XLS3 DISPLAY
Q600 C 7448-1 MMBT3904 CHIP NPN F 2
R500 A11371-2250 RES 2.2 MOHM 1/16W 5% 0603 F 2
R501 A11368-49910 RES 4.99 KOHM 1/16W 1% 0603 F 2
R502 A11368-10020 RES 10.0 KOHM 1/16W 1% 0603 F 2
R503 A11371-2223 2.2K 0.25W 5% 1210 T/R F 2
R504 140467-10020 RES 10KOHM 0.063W 0.1% 0603 THNF B 2
R505 140467-10020 RES 10KOHM 0.063W 0.1% 0603 THNF B 2
R506 140467-10020 RES 10KOHM 0.063W 0.1% 0603 THNF B 2
R507 140467-10020 RES 10KOHM 0.063W 0.1% 0603 THNF B 2
R508 A11368-10000 RES 100 OHM 1/16W 1% 0603 B 2
R509 A11368-66511 RES 6.65 KOHM 1/16W 1% 0603 B 2
R510 138593-1 POT ALPHA RV110T-40E1-125A-B10K-0E C 3
R511 A11368-20010 RES 2.0 KOHM 1/16W 1% 0603 C 2
R512 A11368-10020 RES 10.0 KOHM 1/16W 1% 0603 A 2
R513 A11368-82500 RES 825 OHM 1/16W 1% 0603 A 3
R514 A11368-82500 RES 825 OHM 1/16W 1% 0603 A 3
R515 A11368-24910 RES 2.49 KOHM 1/16W 1% 0603 A 2
R516 A11368-24910 RES 2.49 KOHM 1/16W 1% 0603 A 2
R517 A11368-15000 RES 150 OHM 1% 1/16W 0603 A 3
R518 OPEN B 3
R519 OPEN B 3
R520 A11368-15000 RES 150 OHM 1% 1/16W 0603 A 3
R521 OPEN B 3
R522 OPEN B 3