CSS Laboratories SB-6862 User manual

iSB-6862
Technical Reference
SB-6862
Dual Pentium® Pro Single Board Computer
with Natoma Chipset
1641 McGaw Avenue
Irvine, California 92614
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iiiSB-6862
Features
 Intel Pentium® Pro processor, upgradeable through 180 or
200 MHz; and dual Pentium® Pro upgrade
 Intel Natoma chipset
 Basic connectors provided for speakers, hard disk LED,
reset/turbo LED, keylock, PS/2 mouse and CMOS
battery
 System memory upgradeable to 1 GB using x 64 or
x 72 dual inline memory modules (DIMM)
 Processor facilitated error correcting memory (ECC)
using x 72 DIMM
Processor-based cache: 256 KB or 512 KB on-board
On-board E-IDE controller with seperate master/slave
IDE mode support for up to 4 IDE drives and support for
up to 2 floppy drives
On-board I/O: 2 serial, 2 universal serial bus (USB) and
1 parallel ports
PS/2 keyboard mini-DIN connector; extra on-board PS/2
mouse connector
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iv SB-6862
FCC Standards
The FCC (Federal Communications Commission) restricts
the amount of radiation and radio frequency emissions
coming from computing equipment.
Note: This equipment has been tested and found to comply
with the limits for a Class B digital device pursuant to Part
15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference in a
residential installation. This equipment generates, uses, and
can radiate radio frequency energy and, if not installed and
used in accordance with the instructions, may cause harmful
interference to radio communications. However, there is no
guarantee that interference will not occur in a particular
installation. If this equipment does cause harmful interference
to radioor television reception, which can be determined by
turning the equipment off and on, the use is encouraged to try
to correct the interference by one or more of the following
measures:
 Reorient or relocate the receiving antenna.
 Increase the separation between the equipment and
receiver.
 Connect the equipment into an outlet on a circuit
different from that to which the receiver is connected.
 Consult the dealer or an experienced radio/TV technician
for help.
CSS Labs is not responsible for any radio or television
interference caused by unauthorized modifications to this
equipment. Operation with non-certified peripherals is likely
to result in interference to radio and TV reception.
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vSB-6862
To ensure compliance to FCC non-interference regulations,
peripherals attached to this device require shielded I/O cables.
NOTICE: The use of a non-shielded I/O cable with this
device is in violation of U.S. Federal law and will not allow
the device to meet the maximum emission limits.
CAUTION: Any changes or modifications not expressly
approved by the grantee of this device could void the users
authority to operate the equipment.
Note: If you have purchased the miniature tower system,
please note the following...
WARNING: The system is to be installed on desk or table
tops only. The unit will become unstable if operated as a floor
standing unit and unintentional force is applied to the top of
the unit.
Turn the unit off and unplug the power cord before you
open the cover to install any cards or peripheral devices.
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vi SB-6862
WARNING
CAUTION: THERE IS A DANGER OF EXPLOSION IF
THE BATTERY IS INCORRECTLY REPLACED.
REPLACE ONLY WITH THE SAME OR EQUIVALENT
TYPE RECOMMENDED BY THE MANUFACTURER.
DISCARD USED BATTERIES ACCORDING TO THE
MANUFACTURERS INSTRUCTIONS.
ATTENTION:IL Y A DANGER DEXPLOSION SIL Y A
REMPLACEMENT INCORRECT DE LA BATTERRIE.
REMPLACER UNIQUEMENT AVEC UNE BATTERI DU
MEME TYPE OU DUN TYPE RECOMMENDE PAR LE
CONSTRUCTEUR. ETTERAU REBUT LES
BATTERRIES USAGEES CONFORMEMANT AUX
INSTRUCTIONS DU FABRICATANT.
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viiSB-6862
NOTICE
The information within this manual is subject to change
without notice.
CSS Laboratories, Incorporated shall not be held liable for
technical or editorial errors or omissions contained in herein;
nor for incidental or consequential damages resulting from the
furnishing, performance or use of this material.
All rights reserved. No part of this publication may be
reproduced, stored in a retrieval system, or transmitted, in
any form or by any means, mechanical, photocopying,
recording or otherwise, without the prior written permission
of CSS Laboratories, Inc.
Product names mentioned herein are for identification
purposes only, and may be trademarks and/or registered
trademarks of their respective companies.
© 1997 CSS Laboratories, Inc. All rights reserved.
P/N MS-SBC-6862-DOC Revision 1 August, 1997
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ixSB-6862
Table of Contents
Overview ............................................................................... 1
The Microprocessor .............................................................. 2
The Board ............................................................................. 3
Voltage Regulator..................................................... 4
Board Connectors ................................................................. 5
Keyboard Connector K1 ......................................... 5
Primary IDE Drive Header J11 ............................... 5
Secondary IDE Drive Header J12 ........................... 6
Parallel Port DB1 ................................................... 6
Serial Port 1 Connector J98 .................................... 6
Serial Port 2 Connector J97 .................................... 6
Floppy Drive Connector J8 ..................................... 6
Universal Serial Bus Connectors J3, J4 .................. 6
Fan Connectors JP18, JP45 .................................... 7
Jumpers ................................................................................. 8
Processor Bus Clock Speed JP4, JP3 ..................... 8
Processor Bus Frequency JP26, JP27 .................... 9
Processor Speed Ratio JP32, JP31, JP30, JP29 .... 10
System Memory ...................................................................11
Installing and Removing DIMM ..........................................11
System Memory Configuration ........................................... 12
System Memory Map .......................................................... 15
Timers...................................................................15
System Interrupts ................................................................ 16
Direct Memory Access ........................................................ 17
The I/O Address Map ......................................................... 18
Configuration Utilities ........................................................ 19
Overview ................................................................ 19
Standard Setup ....................................................... 21
Advanced Setup ..................................................... 22
Advanced Chipset Setup ........................................ 23
Power Management Setup ..................................... 24
PCI/PnP Setup ....................................................... 25
Peripheral Setup ..................................................... 26
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xSB-6862
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