Cypress CY15FRAMKIT-002 User manual

CY15FRAMKIT-002
Serial F-RAM Development Kit User Guide
Document Number: 002-23147 Rev. *A
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
www.cypress.com

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CY15FRAMKIT-002 Serial F-RAM Development Kit User Guide, Document Number: 002-23147 Rev. *A 2
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CY15FRAMKIT-002 Serial F-RAM Development Kit User Guide, Document Number: 002-23147 Rev. *A 3
Contents
1. Introduction.................................................................................................................................................................4
1.1 Kit Contents........................................................................................................................................................4
1.2 Getting Started ...................................................................................................................................................4
1.3 Pre-requisite Software........................................................................................................................................4
1.4 Pre-requisite Hardware.......................................................................................................................................4
1.5 Additional Resources..........................................................................................................................................4
2. Kit Overview................................................................................................................................................................5
2.1 CY15FRAMKIT-002 Kit Overview.......................................................................................................................5
2.2 Kit Introduction and Configuration Guide............................................................................................................6
2.3 F-RAM and MCU Kit Connection......................................................................................................................10
3. Kit Operation.............................................................................................................................................................11
3.1 Programming the NUCLEO-433LC-P Evaluation Board...................................................................................11
3.2 Quad SPI Configuration for STM32L433RC.....................................................................................................17
4. Firmware Details.......................................................................................................................................................20
A. Appendix...................................................................................................................................................................24
CY15FRAMKIT-002 Kit Block Diagram......................................................................................................................24
CY15FRAMKIT-002 Kit Component Placements .......................................................................................................25
CY15FRAMKIT-002 Kit Schematic.............................................................................................................................26
Pin Assignment Table.................................................................................................................................................27
Use of Zero-ohm and No-Load Resistors...................................................................................................................30
Bill of Materials (BOM)................................................................................................................................................31
CY15FRAMKIT-002 Board - Jumper Details..............................................................................................................31
B. Appendix...................................................................................................................................................................33
GUI Menu...................................................................................................................................................................33
Revision History................................................................................................................................................................37

CY15FRAMKIT-002 Serial F-RAM Development Kit User Guide, Document Number: 002-23147 Rev. *A 4
1. Introduction
Thank you for your interest in the CY15FRAMKIT-002 F-RAM™Kit (DVK). The kit (shield) is designed as an easy-to-use
and inexpensive development kit as well as evaluation platform for Cypress’s latest Quad SPI enabled Serial F-RAM. This
kit works in conjunction with the NUCLEO-L433RC-P MCU Evaluation Board, a starter kit for Arm®Cortex®-M4-based ST
Microelectronics devices. You will need both kits to demonstrate the operation described in this guide. This board features
a 4-Mbit Quad SPI F-RAM, associated circuitry, and provides both Arduino and Morpho connectivity. This kit supports 3.3-V
or 1.8-V power supplies.
1.1 Kit Contents
The CY15FRAMKIT-002 Kit includes the following contents:
•CY15FRAMKIT-002 DVK board with CY15B104QSN-108SXI, 108-MHz 4-Mbit Quad SPI F-RAM
•Quick Start Guide
•Arduino Stackable Headers for connector expansion
1.2 Getting Started
This guide helps you to get acquainted with the CY15FRAMKIT-002 DVK. The Pre-requisite Software section describes the
software required to use the driver set provided for this kit. The Kit Overview chapter explains the features of the kit. The
Kit Operation chapter explains how to program and run the kit. The Appendix B explains the GUI to test out the QSPI F-
RAM features. The Firmware Details chapter the F-RAM access API and a link to download the example project. Appendix
Aprovides the kit block diagram, schematics, pin assignment, and the bill of materials (BOM)
1.3 Pre-requisite Software
•Keil µVision 5 software (for development and programming)
•STSW-LINK009 - ST-LINK, ST-LINK/V2, ST-LINK/V2-1 USB driver signed for Windows 7, Windows 8, Windows 10
•STSW-LINK007 - ST-LINK, ST-LINK/V2, ST-LINK/V2-1 firmware upgrade
1.4 Pre-requisite Hardware
•NUCLEO-L433RC-P: STM32 Nucleo64 Evaluation Board (details)
•CY15FRAMKIT-002 DVK board
1.5 Additional Resources
•Details about the ST Micro-electronics Kit can be found here.
•Details about Keil µVision installation can be found here (download MDK-Arm tool chain).
•The example project and firmware files are part of the compressed folder downloaded from the Cypress Community.
•The datasheet for Cypress Quad SPI F-RAM mounted on the kit can be downloaded from here.

CY15FRAMKIT-002 Serial F-RAM Development Kit User Guide, Document Number: 002-23147 Rev. *A 5
2. Kit Overview
2.1 CY15FRAMKIT-002 Kit Overview
The CY15FRAMKIT-002 kit can be used to understand the features of serial F-RAMs (SPI and QSPI). The DVK is an add-
on board, which contains a 4-Mbit Excelon™-Ultra QSPI F-RAM. It has four connectors that are Arduino UNO-compatible
and connect to either an ST NUCLEO-L433RC-P MCU Evaluation Board or an Arduino UNO R3 compatible board for SPI
evaluation. It also provides two 19x2 Morpho headers (J9 and J10) compatible with an ST NUCLEO-L433RC-P MCU
Evaluation Board for QSPI evaluation. The kit operates using a 1.8-V/3.3-V power supply. The 3.3-V supply comes from
the base board and the 1.8-V supply is generated by an on-board regulator. The CY15FRAMKIT-002 Kit consists of the
following blocks.
•4-Mbit (512Kx8), Excelon-Ultra Quad SPI F-RAM
•ST NUCLEO-L433RC-P MCU Evaluation Board with compatible Morpho headers (J9, J10)
•Arduino-compatible I/O Headers (J1, J2, J3, J4)
•Headers (J8 (1A-8A), J8 (1B-8B), J8 (1C-8C)) to select Arduino or Morpho connector signal connectivity to the
F-RAM device
•J5 header for 1.8-V/3.3-V F-RAM device VDD power supply selection
•J6 header for 1.8-V/3.3-V selection for level shifters. Set this to the base board's power supply value.
•J7 debug header for probing SPI/QSPI signals
•Test points for the supported voltage (F-RAM_VDD and BASE_VDD) and ground signals (VSS)
•Do Not Install (DNI) footprint for the Excelon-Ultra Quad SPI F-RAM in 8-pin Grid-Array Quad Flat No-Lead GQFN
package
4-Mbit (512Kx8), ExcelonTM -
Ultra Quad SPI F-RAM, SOIC
J5, F-RAM Device VDD
power select jumper J6, ST controller VCC power select jumper
J10, ST NUCLEO-L433RC-P
MCU Evaluation Board
compatible Morpho headers J9, ST NUCLEO-L433RC-P
MCU Evaluation Board
compatibleMorpho headers
J3, Arduino
Compatible I/O Header
J4, Arduino
Compatible I/O Header
J1, Arduino
Compatible I/O Header
J2, Arduino
Compatible I/O Header
Test points Test points
J7, Debug
Header
4-Mbit (512Kx8),
ExcelonTM -Ultra Quad
SPI F-RAM, GQFN (DNI)
Headers (J8 (1A-8A), J8
(1B-8B), J8 (1C-8C) to
select Arduino or Morpho
connector signal
connectivity to F-RAM
device

Kit Overview
CY15FRAMKIT-002 Serial F-RAM Development Kit User Guide, Document Number: 002-23147 Rev. *A 6
2.2 Kit Introduction and Configuration Guide
The following sections describe various aspects of the kit hardware and the kit setup.
2.2.1 F-RAM Device Power Supply Jumper
The CY15FRAMKIT-002 Board hardware operates at 1.8 V/3.3 V, selected through header J5, as shown in Figure 1. The
factory default jumper setting is 3.3 V (short pins 1 and 2 of J5). You can short pins 2 and 3 of J5 for 1.8-V operation.
CAUTION
•Do not power the CY15FRAMKIT-002 board through an external power source. The board is designed to be powered
by the ST NUCLEO-L433RC-P MCU Evaluation base board or other Arduino UNO R3-compatible base board.
•The CY15FRAMKIT-002 board operates with 1.8 V or 3.3 V supply. Max operating voltage of the device is 3.6 V.
Exceeding the maximum voltage limit (3.6 V) may damage the board.
Figure 1. F-RAM Device VDD (F-RAM_VDD) Selection Jumper
2.2.2 ST Controller Device Power Supply Jumper
The ST NUCLEO-L433RC-P MCU Evaluation Board hardware operates at 1.8 V/3.3 V. The value selected on the base
board must be selected on the shield to enable appropriate level shifters through header J6, as shown in Figure 2. The
factory default jumper setting is 3.3 V (short pins 1 and 2 of J6). You can short pins 2 and 3 of J6 for the 1.8 V selection.
CAUTION
•Do not power the ST NUCLEO-L433RC-P MCU Evaluation board through an external power source. The board is
designed to be powered by the Regulator output on the board.
•The ST NUCLEO-L433RC-P MCU Evaluation operates with 1.8 V or 3.3 V supply. Exceeding the maximum voltage
limit (3.6 V) may damage the board.
Figure 2. ST Controller Device VDD (BASE_VDD) Selection Jumper
2.2.3 Valid Power Selection for Voltage Level Translator (BASE_VDD) and F-RAM Device
VDD (F-RAM_VDD)
Table 1 shows the valid power selection for voltage level translator (BASE_VDD) and F-RAM supply (FRAM_VDD) for a
proper operation of the board.

Kit Overview
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Table 1. Valid Power Selection for Voltage Level Translator through Jumpers
BASE_VDD (J6)
F-RAM_VDD (J5)
1V8
1V8
1V8
3V3
3V3
3V3
2.2.4 Excelon-Ultra Quad SPI F-RAM
Figure 3 shows the 4-Mbit (512Kx8), 3.3 V, Excelon-Ultra Quad SPI F-RAM part in the 8-pin SOIC package option.
Figure 3. Cypress Serial Quad SPI F-RAM Device on the Board
2.2.5 Morpho Headers to ST NUCLEO-L433RC-P MCU Evaluation Board
Figure 4 shows the Morpho headers to the ST NUCLEO-L433RC-P MCU Evaluation Board for QSPI interface evaluation –
J9 and J10. You can plug the CY15FRAMKIT-002 board onto the ST NUCLEO-L433RC-P MCU Evaluation Board through
these connectors. For the schematic, see Appendix.
Figure 4. Morpho Headers to ST NUCLEO-L433RC-P MCU Evaluation Board

Kit Overview
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2.2.6 Arduino Headers to ST NUCLEO-L433RC-P MCU Evaluation Board
Figure 5 shows the Arduino headers to the ST NUCLEO-L433RC-P MCU Evaluation Board for SPI Interface evaluation –
J1, J2, J3 and J4. You can plug the CY15FRAMKIT-002 board onto the ST NUCLEO-L433RC-P MCU Evaluation Board
through these connectors. For the schematic, see Appendix.
Figure 5. Arduino Headers to ST NUCLEO-L433RC-P MCU Evaluation Board
2.2.7 Headers to Select Arduino or Morpho Connector Signal Connectivity to F-RAM
Device
Figure 6 shows the headers –J8 (1A-8A), J8 (1B-8B) and J8 (1C-8C). You can short F-RAM device signals to the Arduino
connectors by shorting the pins of J8 (1A-8A) to the corresponding pins of J8 (1B-8B) or to the Morpho connectors by
shorting J8 (1B-8B) pins to J8 (1C-8C) pins. For the schematic, see Appendix.
Figure 6. Headers to Select Arduino or Morpho Connector Signals
2.2.8 Debug Header
Debug header J7 is provided for easy access to the Quad SPI F-RAM communication pins as shown in Figure 7. For the
schematic, see Appendix.

Kit Overview
CY15FRAMKIT-002 Serial F-RAM Development Kit User Guide, Document Number: 002-23147 Rev. *A 9
Figure 7. Debug Header
2.2.9 Test Points
The CY15FRAMKIT-002 board provides FRAM_VDD, VSS, and BASE_VDD test points as shown in Figure 8.
Figure 8. Test Points
Table 2. Test Points
Test Points
Description
BASE_VDD
Test point for the Voltage Level Translator to match the
base board power supply
VSS
Test point for the kit board ground
F-RAM_VDD
Test point for the F-RAM device (U1, U2) power supply
CAUTION:
Power supply test points are only for probing and measurement purposes. Do not power the kit using this test point to avoid
damage to the board.
2.2.10 8-pin Grid-Array Quad Flat No-Lead GQFN package –Not Populated by Default
The CY15FRAMKIT-002 board provides a footprint option for the Excelon-Ultra Quad SPI F-RAM in 8-pin GQFN package.
You can mount a 4-Mbit (512Kx8), Excelon-Ultra Quad SPI F-RAM device to evaluate the GQFN package in addition to the
default 8-pin SOIC option on the CY15FRAMKIT-002 board. An independent chip select control is provided for the 8-pin
GQFN package, which enables access to the second device on the board with an appropriate firmware modification.

Kit Overview
CY15FRAMKIT-002 Serial F-RAM Development Kit User Guide, Document Number: 002-23147 Rev. *A 10
Figure 9. 8-pin GQFN –Not Populated by Default
2.3 F-RAM and MCU Kit Connection
The CY15FRAMKIT-002 is plugged into the ST MCU Evaluation Board through Arduino (J1, J2, J3 and J4) and Morpho
(J9, J10), connectors as shown in Figure 10.
Figure 10. CY15FRAMKIT-002 Mounted on ST MCU Evaluation Board
CAUTION:
The CY15FRAMKIT-002 board is plugged into the ST MCU Evaluation Board through its compatible headers J1, J2, J3, J4,
J9 and J10. Because J9 and J10 are high pin-count connectors, removing the CY15FRAMKIT-002 board can be difficult
and may lead to bending on the connector pins. Therefore, take care when removing the CY15FRAMKIT-002. Sliding the
CY15FRAMKIT-002 board out of the connectors slowly and evenly will reduce the risk of bending the connector pins.

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3. Kit Operation
This section describes the setup needed to program the base board (NUCLEO-L433RC-P) to access the Quad SPI F-RAM
on the CY15FRAMKIT-002 DVK.
3.1 Programming the NUCLEO-433LC-P Evaluation Board
The NUCLEO-L433RC-P board is an STM32 development board based on the Nucleo-64 platform. The boardoffers several
features including Arduino and Morpho connectivity. The controller is supported in a wide variety of Integrated Development
Environments (IDEs) including IAR™, Keil®, and other GCC-based IDEs for Arm®architectures. Details about this platform
can be found here.
Figure 11. NUCLEO-L433RC-P Evaluation Board
The STM32L433RC MCU on the board supports an industry-standard, high-speed Quad SPI interface. This interface is
routed on to the Morpho connectors of the NUCLEO board. Drivers and example project have been written with the
STM32L433RC controller as the target, but they can be easily modified to be compatible with any other ST microcontroller
with a Quad SPI interface. In the firmware section of this document, appropriate sections will be highlighted to ensure
compatibility with other ST microcontrollers.

Kit Operation
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3.1.1 System Requirements
Ensure that all the prerequisite from Section 1.3 are installed on the system. Download the latest example project from
Cypress community.
Establish the connection with the STM32 Nucleo board by connecting CN1 of the Nucleo board to the USB port of the PC.
The board should be detected correctly under Device Manager.
Refer to the guide here to resolve issues related to installation of Nucleo 64 board drivers.
Figure 12.Connector CN1 for Nucleo 64 Board
3.1.2 Compiling the Example Project
This user guide is accompanied by a example project (Excelon_QSPI.zip) that can be quickly compiled and programmed
on to the Nucleo board to evaluate the Quad SPI F-RAM features. The Excelon_QSPI folder contains an MDK-Arm project
along with the required source/include files. The contents of the zip file are shown here:
The Excelon_QSPI/Inc and Excelon_QSPI/Src folders contain header files critical for initializing the QSPI and LPUART
modules of the ST controller. Function declarations for accessing Cypress’s QSPI F-RAM are also provided in this folder.

Kit Operation
CY15FRAMKIT-002 Serial F-RAM Development Kit User Guide, Document Number: 002-23147 Rev. *A 13
1. The qspiFRAM(.h/.c) files provide all the functions to access the QSPI F-RAM device. Include these (with the
appropriate code modification) in your project to access the QSPI F-RAM.
2. The guiMENU(.h/.c) files are provided to allow evaluation of the F-RAM by sending commands over a UART
terminal (115200 bps, 8-NoParity-1). These files need not be included in the final project.
Open the µVision project from the MDK-Arm folder. If the tool (Keil) looks for a board support package, press the
ESC key (There is no native package for the NUCLEO-L433RC-P board in the Keil library).
Your workspace should have following structure at this stage:
3. Before compiling, appropriate properties for the target must be selected. Press ALT+F7 or select Project >
Options for Target, or click the button circled in the figure above.

Kit Operation
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4. Update the clock speed to 80.00MHz in the Target tab under Xtal (MHz).
5. On the Debug tab, ST-Link Debugger should be populated automatically if the Nucleo board is plugged into a
USB port on the computer and the drivers are installed correctly.
6. Click Settings on the Debug tab to select the appropriate Flash Programming Algorithm for this device.

Kit Operation
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1. Enable the Reset and Run option on Target Driver Setup window to ensure that the device resets on
successful program.
2. By default, there will be no Programming Algorithm on first time selection of this controller. Click Add to open a
list of available algorithms.
3. Select the appropriate programming algorithm as shown below, and click Add. The STM32L433RC MCU has
256 KB On-Chip flash.
4. Add the qspiFRAM.c file in the Application/User space. Add the guiFRAM.c file if you are evaluating the device
features using a UART terminal.

Kit Operation
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5. Press F7 to build the project. There should be no errors or warning at this stage.
6. Press F8 to program the controller with the test program. Open a terminal emulator program of your choice
(PuTTY, uCON, etc.) and establish a UART connection at 115200 bps with 8 data bits, no parity, and 1 stop bit.
Look under Ports (COM & LPT) to determine the COM port number to use.
The controller will be waiting for the appropriate GUI command. See Appendix B for GUI commands.

Kit Operation
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3.2 Quad SPI Configuration for STM32L433RC
The Arduino/Morpho QSPI F-RAM Kit is designed interface with both the SPI port on the Arduino interface as well as the
Quad SPI port on the Morpho interface. You can use either interface with the help of jumper selections. The drivers/API
provided with example project are for using the Quad SPI port of controller only.
Figure 13. Complete Setup
3.2.1 Quad SPI Initialization
The initialization of the Quad SPI block in the ST controller is done by calling the QUADSPI_Init() function. The function is
defined in quadspi.c but can be added to your main application file for a smaller project. The QUADSPI_Init() function
initializes the hqspi structure.
hqspi.Instance = QUADSPI;
hqspi.Init.ClockPrescaler = 32;
hqspi.Init.FifoThreshold = 4;
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
hqspi.Init.FlashSize = 24;
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
hqspi.Init.FlashID = QSPI_FLASH_ID_1;
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
For details on the Quad SPI interface of this controller, refer to AN4760 from STMicroelectronics. The critical variables for
evaluating the QSPI F-RAM are “ClockPrescaler” and “FlashSize”
ClockPrescaler: The default value in the example project is 32, which corresponds to approximately a 5-MHz clock
frequency on the QSPI interface. You should modify this variable for achieving the required clock frequency. The controller
on the Nucleo board supports a maximum of 48 MHz on the Quad SPI Clock, while the Morpho connecter is expected to
support up to 30 MHz.
Note: The limitation on clock speed is due to the low-speed connectors used on the Nucleo board as well as the DVK kit.
The Cypress F-RAM can run at up to 108 MHz in Quad SPI mode.
FlashSize: The default value in the example project is 24, which corresponds to the total number of address bits needed to
address the memory attached to the interface. The Cypress F-RAM on the kit is a 4-Mbit device but has 3-byte addressing.
The default value of 24 should remain unchanged in your application.

Kit Operation
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3.2.2 Quad SPI Interface on STM32L433RC
The Quad SPI interface for this controller is routed to the following GPIOs:
Sr. No.
Quad SPI Interface Pin
STM32L433RC Pin
1
QUADSPI_CS#
PB11
2
QUADSPI_CLK
PB10
3
QUADSPI_IO0
PB1
4
QUADSPI_IO1
PB0
5
QUADSPI_IO2
PA7
6
QUADSPI_IO3
PA6
Figure 14. Quad SPI Pin Assignment on Morpho Connector
QUADSPI_IO1
QUADSPI_CS
QUADSPI_IO0
QUADSPI_IO2
QUADSPI_IO3
QUADSPI_CLK

Kit Operation
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The CY15FRAMKIT-002 board plugs into the Nucleo board. Both Arduino and Morpho connectors need to be plugged in.
In addition to initializing the Quad SPI block as described earlier, the QSPI_Init() function also ensures initialization of the
controller pins as Quad SPI pins.
Figure 15. Pin Initialization as Quad SPI

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4. Firmware Details
This section summarizes the functions written in the qspiFRAM (.h/.c) file along with the µVision example project provided
by Cypress Semiconductor. Each function has been supplemented with comments to help understand the usage. Revision
1.0 of the functions covers limited features of the device. The detailed feature set of Cypress’ Quad SPI F-RAM can be
found in the device datasheet. The functions listed here are for enabling easy usage of the Quad SPI F-RAM features and
are not an official release of driver support from Cypress Semiconductor. You can leverage the API for building your end
applications.
The example project is stored in the Excelon_QSPI folder and has following structure:
Project Files
Description
\Excelon_QSPI\MDK-ARM
Example project in µVISION 5
\Excelon_QSPI\Inc
Include files for Example project.
\Excelon_QSPI\Src
Source files for Example project
\Excelon_QSPI\Drivers
HAL Drivers for the STM32
QSPI F-RAM functions are declared in \Excelon_QSPI\Inc\qspiFRAM.h; implemented in \Excelon_QSPI\Src\qspiFRAM.c.
The following table provides a summary of all the supported functions for Revision 1.0 of the API. Unless specified explicitly
the description is applicable only for the Quad SPI F-RAM device on the kit.
No.
Function Name
Description
Notes
1
bool FRAM_Interface_Reset (void)
This function resets the operating mode
of the F-RAM to SPI. All registers are
reset to their default values.
The F-RAM device can be configured in
several operating modes (SPI, DPI, or
QPI) and can have several register
settings. This function is written
specifically to implement a “Go Home”
feature in case the controller faces a
mismatch of the operating mode. For
example, during a sudden power cycle,
the F-RAM device will retain its state but
the controller will execute a power-up
routine and will not be able to
communicate with the F-RAM device. It
is recommended to implement a similar
function in the end application.
2
void Read_Device_Status(void)
This function reads the register values
of the F-RAM and stores them in a
runtime structure variable.
Assumes that the controller is in a known
operating mode with respect to the F-
RAM.
3
bool Read_ID(uint8_t IOMode,
uint8_t Reg_lat)
This function reads the ID register and
compares it with the default value of
0x50518206000000.
This function is used internally by the
FRAM_Interface_Reset (void)
function.
Read_ID () returns a success or a fail
status based on whether the ID read
from device matches the default value.
The end user can leverage this function
to identify the device operating mode
(SPI, DPI, or QPI).
4
Void FRAM_WREN(void)
Issues the WREN (0x06) opcode.
5
Void FRAM_WRDI (void)
Issues the WRDI (0x04) opcode.