Datapoint 3300 Guide

Datapoint 3300/ Maintenance

TABLE OF CONTENTS
INTRODUCTION . . . . . . . . . . •. . . . . . • . 1-1
DIAGRAM SYMBOLISM . . . . . . . . . . . • 1-4
SCHEMATIC AND LOGIC
DIAGRAMS . . . . . . . . . . . . •. . . . . . . . 1-4
BLOCK DIAGRAMS............... 1-5
ILLUSTRATIONS................. 1-5
THEORY OF OPERATION . . • . . . . . . •. 2-1
DATA LOGIC . . . . . . . . . . • . . . . . . . . 2-1
TRANSMIT FUNCTION............ 2-1
RECEIVE FUNCTION . . . . . . . . . . . . . 2-2
KEYBOARD . . . . . . . . . . . . . . . . . . • . 2-7
ANSWER -BACK .................. 2-13
Programming the Answer - Back .... 2-13
INTERFACE 1 ................... 2-20
INTERFACE 2 ................... 2-27
Speed Buffer .................... 2-28
MOS ........................... 2-37
DEFLECTION AMPLIFIER ......... 2-43
LOGIC POWER SUPPLY . . . . . . . . . . 2-53
DEFLECTION POWER SUPPLY . . . . 2-61
HIGH VOLTAGE POWER
SUPPLY. . . . . . . . . . . . . . . . . . . . . . . . 2-69
CONTROL LOGIC . . . . . . . . . . . . . . . 2-69
Horizontal Deflection Timing . . . . . 2-69
Vertical Deflection Timing . . . . . . . 2-69
Cursor Positioning . . . . . . . . . . . . . . 2-70
Carriage Return . . . . . . •. . . . . . . . 2-72
Home Up . . . . . . . . . . . . . . . . . . . . 2-72
Home Down . . . . . . . . . . . . . . . . . . 2-73
Line Feed and Reverse . . . . . . . . . . 2-73
Roll Up . . . . . . . . . . . . . . . . . . . . . . 2-73
Roll Advance . . . . . . . . . . . . . . . . . . 2-74
Roll Down . . . . . . . . . . . . . . . . . . . 2-74
MAINTENANCE................... 3-1
REMOVAL . . . . . . . . . . •. . . . . . . . . . 3-1
APPENDIX ....................•.. 1A-1

LIST OF ILLUSTRATIONS
FIGURE 1-1. NAND GATE ..........
1-4
FIGURE 1-2. NOR GATES .
..........
1-4
FIGURE 1-3. D FLIP -FLOP
.........
1-4
FIGURE 1-4.
JK FLIP -FLOP
........ 1-5
FIGURE 1-5.
TYPICAL WAVEFORMS ..
1-5
FIGURE 1-6. KEYBOARD
AND
ANSWER - BACK CARDS ........... 1-6
FIGURE 1-7. INTERFACE 1 AND
INTERFACE 2 CARDS . . . . . . . . . . . . . 1-7
FIGURE 1-8. CONTROL LOGIC
AND MOS CARDS................. 1-8
FIGURE 1-9. DEFLECTION
AMPLIFIER CARD ...... 1-9/(1-10 blank)
FIGURE 2-1. DATAPOINT 3300
(1 of 2) . . . . . . . . . . . . . . . . . 2-3/(2-4 blank)
FIGURE 2-1. DATAPOINT 3300
(2 of 2) .................. 2-5/(2-6 blank)
FIGURE 2-2. TYPICAL SWITCH
CIRCUIT . . . . . . . . . . . . . . . 2-7/(2-8 blank)
FIGURE 2-3. BLOCK DIAGRAM,
KEYBOARD ............ 2-9/(2-10 blank)
FIGURE 2-4. SCHEMATIC DIAGRAM,
KEYBOARD ............ 2-11/(2-12 blank)
FIGURE 2-5. BLOCK DIAGRAM,
ANSWER· BACK ....... 2-15/(2-16 blank)
FIGURE 2-6. SCHEMATIC DIAGRAM,
ANSWER -BACK . . . . . . 2-17/(2-18 blank)
FIGURE 2-7. BLOCK DIAGRAM,
INTERFACE 1 . . . . . . . . . 2-23/(2-24 blank)
FIGURE 2-8. SCHEMATIC DIAGRAM,
INTERFACE 1 ........ 2-25/(2-26 blank)
FIGURE 2-9. BLOCK DIAGRAM,
INTERFACE 2......... 2-29/(2-30 blank)
FIGURE 2-10. B~ OCK DIAGRAM,
SPEED BUFFER . . . . . . . 2-31/(2-32 blank)
ii
FIGURE 2-11. SCHEMATIC DIAGRAM,
INTERFACE 2 .......... 2-33/(2-34 blank)
FIGURE 2-12. SCHEMATIC DIAGRAM,
INTERFACE 2 WITHOUT SPEED
BUFFER .............. 2-35/(2-36blank)
FIGURE 2-13. BLOCK DIAGRAM,
MOS .................. 2-39/(2-40 blank)
FIGURE 2-14. SCHEMATIC DIAGRAM,
MOS . . . . . . . . . . . . . . . . . 2-41/(2-42 blank)
FIGURE 2-15. DOT MATRIX
GENERATION......... 2-45/(2-46 blank)
FIGURE 2-16. MOS
LOCATOR . . . . . . . . . . . . 2-47/(2-48 blank)
FIGURE 2-17. CHARACTER
DISPLAY .............. 2-49/(2-50 blank)
FIGURE 2-18. DRIVER CONNEC-
TION ........................... 2-51
FIGURE 2-19. TYPICAL POWER SUPPLY
BLOCK DIAGRAM ...... 2-53/(2-54 blank)
FIGURE 2-20. BLOCK DIAGRAM, DEFLEC-
TION AMPLIFIER ....... 2-55/(2-56 blank)
FIGURE 2-21. SCHEMATIC DIAGRAM, DE-
FLECTION AMPLIFIER .. 2-57/(2-58 blank)
FIGURE 2-22. +14VDC POWER
SUPPLY . . . . . . . . . . . . . . . . . . . . . . . . 2-60
FIGURE 2-23. SCHEMATIC DIAGRAM,
LOGIC POWER SUPPLY .. 2-63/(2-64 blank)
FIGURE 2-24. +40VDC
CIRCUIT . . . . . . . . . . . . . 2-65/(2-66 blank)
FIGURE 2-25. +120VDC AND +450VDC
CIRCUIT . . . . . . . . . . . . . 2-65/(2-66 blank)
FIGURE 2-26. SCHEMATIC DIAGRAM,
DEFLECTION POWER
SUPPLY ............... 2-67/(2-68 blank)
FIGURE 2-27. BLOCK DIAGRAM,
CONTROL LOG IC . . . . . . 2-75/(2-76 blank)
FIGURE 2-28. SCHEMATIC DIAGRAM,
CONTROL LOG IC ....... 2-77/(2-78 blank)

FIGURE 3-1. DATAPOINT 3300 WITH
COVER REMOVED ................. 3-4
FIGURE 3-2. DATAPOINT 3300, TOP
VIEW ............................ 3-5
FIGURE 3-3. DATAPOINT 3300, REAR
VIEW ............ , . . . . . . . . . . . . . . 3-6
FIGURE 3-4. DATAPOINT 3300,
BOTTOM PANEL .................. 3-'7
FIGURE 3-5. LOGIC AND DEFLECTION
POWER SUPPLIES ................. 3-8
FIGURE 3-6. DELETED .... 3-9/(3-10 blank)
FIGURE 3-7. KEYBOARD
ASSEMBLY (1of2) ..... 3-11/(3-12 blank)
FIGURE 3-7. KEYBOARD
ASSEMBLY (2 of 2) ...... 3-13/(3-14 blank)
FIGURE 3-8. ANSWER -BACK
ASSEMBLY (1of2) ..... 3-15/(3-16 blank)
FIG.URE 3-8. ANSWER -BACK
ASSEMBLY (2 of 2) ..... 3-17/(3-18 blank)
FIGURE 3-9. INTERFACE 1
ASSEMBLY (1 of 2) ..... 3-19/(3-20 blank)
FIGURE 3-9. INTERFACE 1
ASSEMBLY (2 of 2) ..... 3-21/(3-22 blank)
FIGURE 3-10. INTERFACE 2 ASSEMBLY
(1 of 5) ................ 3-23/(3-24 blank)
FIGURE 3-10. INTERFACE 2 ASSEMBLY
(2 of 5) ................ 3-25/(3-26 blank)
FIGURE 3-10. INTERFACE 2 ASSEMBLY
(3 of 5) ................ 3-27/(3-28 blank)
FIGURE 3-10. INTERFACE 2 ASSEMBLY
(4 of 5) ................ 3-29/(3-30 blank)
FIGURE 3-10. INTERFACE 2 ASSEMBLY
(5 of 5) ................ 3-31 /(3-32 blank)
FIGURE 3-11. MOS
ASSEMBLY ............ 3-33/(3-34 blank)
FIGURE 3-12. DEFLECTION AMPLIFIER
ASSEMBLY (1 of 2) ..... 3-35/(3-36 blank)
FIGURE 3-12. DEFLECTION AMPLIFIER
ASSEMBLY (2 of 2) ...... 3-37/(3-38 blank)
FIGURE 3-13. LOGIC POWER SUPPLY
ASSEMBLY ............ 3-39/(3-40 blank)
FIGURE 3-14. REAR PANEL ASSEMBLY
(1of3)............... 3-41/(3-42 blank)
FIGURE 3-14. REAR PANEL ASSEMBLY
(2 of 3) . . . . . . . . . . . . . . . 3-43/(3-44 blank)
FIGURE 3-14. REAR PANEL ASSEMBLY
(3 of 3) . . . . . . . . . . . . . . . 3-45/(3-46 blank)
FIGURE 3-15. SCHEMATIC DIAGRAM MOS
CONTROL LOGIC ...... 3-49/(3-50 blank)
FIGURE 3-16. SCHEMATIC DIAGRAM
REAR PANEL 3300 ..... 3-51/(3-52 blank)
iii/(iv blank)

INTRODUCTION
This manual is for use by persons with the
responsibility to repair and maintain the
Datapoint 3300.
The manual is arranged to provide a detailed
explanation of the Theory of Operation in a
log ica I sequence.
The theory of operation details all functions
within the Datapoint 3300. Review of this
section in conjunction with the associated
diagrams should thoroughly acquaint the techni-
cian with the designed operational character-
istics of the equipment.
Extreme caution must be used in replacing a
component on any of the printed circuit cards.
Recommended tools and techniques to preclude
serious damage to the cards are provided in
the maintenance section of this manual.
1-1

DESCRIPTION
The Datapoint 3300 is a data terminal, incor-
porating the most advanced electronic en-
gineering, modern design and compatibility
with all time sharing services.
To become familiar with the functions of the
Datapoint 3300, refer to the Operators Instruc-
tion MBnual supplied with the equipment.
Table 1-1 provides a listing of dimensions,
electrical and interface specifications for
the Datapoint 3300.
Table 1-1. Specifications
DIMENSIONS
Width ....................... 18 inches
Height ....................... 13 inches
Depth ....................... 18 inches
Weight ...................... 48 pounds
ELECTRICAL
Power Input ......... 200Watts, 115VAC,
Single Phase, 60 HZ
Heat Dissipation ............ 683 BTU/hr.
Operating Temperature Range. 40°F to 100°F
Humidity Limits .............. 0% to 95%
Display Size ............. 10 1 /8" to 7 5/8"
Active Display Size ............... 8" x 6"
Spot Diameter ................ 0.01 inches
Repeatability ............... ±0.001 inches
Characters per Line ................... 72
Number of Lines .................... 25
Number of Characters Displayable ..... 1800
Intensity .................... Adjustable
Brightness ........... 75 ft. Lamberts/Min.
Contrast Ratio ..................... 12:1
Types of Phosphor .................. P31
Character Size ............. 0.11" x 0.18"
Character Generation
Method 5 x 7 . . . . . . . . . . . . . . Dotmatrix
Deflection Type ................ Magnetic
Deflection Method ........ Modulated Scan
Character Generator .... Read Only Memory
Type of Memories .................. MOS
Memory Size:
ROM ...................... 2240 Bits
Circulating ................. 10,800 Bits
1800 Characters
Display Refresh Rate ......... 60 Times/Sec.
Character Set ........... Upper Case ASC 11
Cursor .......... Non-Destructive, Blinking
1-2
Table 1-1. Specifications (Cont)
INTERFACE
Serial (Input and Output) ..... EIA RS-232-B
Bit Rates ......... 110, 220, 440, 880, 1760
150, 300,600, 1200, 2400
Parallel (Input Only) .......... Logic Level
SIGNAL CHARACTERISTICS:
(EIA RS-232-B Code)
1. RECEIVE
a. MARK
b. SPACE -3 TO -25
VOL TS
+3T0+25VOLTS
2. TRANSMIT
a. MARK -10VOLTSWITH3KLOAD
b. SPACE +6 VOL TS WITH 3K LOAD
MAXIMUM SHORT CIRCUIT 500 MA
CURRENT
TERMINATING IMPEDANCE
CONNECTOR TYPE
3K to 7K
17-10250-1
Amphenol
(or equivalent)
PIN ASSIGNMENTS
PIN NO. FUNCTION
Protective Ground
Transmitted Data
Receive Data
Request to Send
Signal Ground
Data Carrier Detector
Reverse Channel Transmitted Data
Reverse Channel Receive Data
Read Only Data (See Note)
Data Terminal Ready
Use for Computer Terminal Test
NOTE
This data may be used to drive a
read only copy device and has the
same signal characteristics as the
normal transmitted data.
Table 1-2 provides the ASC 11 code assignments
for all of the characters and functions used in
the Datapoint 3300.

Table 1-2. ASC II Code Assignments
BIT # 7 0 0 0 0 1 1 1 1
~
6 0 0 1 1 0 0 1 1
4131211
5 0 1 0 1 0 1 0 1
0 0 0 0
SP
0 @ p
0 0 0 1
Xon
! 1 A a
0 0 1 0 " 2 B R
0 0 1 1 X
off
II
3 c s
0 1 0 0 $ 4 D T
0 1 0 1
WRU
% 5 E u
0 1 1 0 & 6 F v
0 1 1 1
BELL
' 7 G w
1 0 0 0
c-
( 8 H x
1 0 0 1
c-
) 9 I y
1 0 1 0
LINE
c f * J z
FEED
:
1 0 1 1
c~ ESC
+ I K [
1 1 0 0
HOME
I < L \
DOWN
RE-
HOME
M ]
1 1 0 1
TURN
UP
-=
1 1 1 0
SPOW
ERASE
"'
1
LATCH
EOL
>
1 1 1 1
--s-~~w ERASE
I 0 -
RUB
!LATCH
EOF
?
OUT
c Cunor
1-3

DIAGRAM SYMBOLISM
SCHEMATIC AND LOGIC DIAGRAMS
Symbols used on schematic and logic diagrams
are generally Military Specification symbols.
However, no attempt has been made to conform
to Military standards.
The 7400 series, TTL logic family is used. A
"one" is high (+5v); a "zero" is low (Ov).
Only two types of gates, NAND and NOR are
employed.
The sma 11 circle used at the input or output of
the symbols indicates that the active level is a
low.
The NAND gate is used in two, three, four, and
eight input configurations. The symbol and truth
table for the NAND gate are shown in figure 1-1.
: ______ __,Q------c
AB
00
01
10
11
c
1
1
1
0
Figure 1-1. NANO Gate
The NOR gate is used only in the two input
configuration. The symbols and truth table for
NOR gates are shown in figure 1-2.
: ______ o.__------c
OR
: ______ D------c
AB C
00 1
01 0
10 0
11 0
Figure 1-2. NOR Gates
1-4
D and J Kare the only two types of flip flops
used.
The symbol and truth table for the D flip-flops
are shown in figure 1-3. The input at D deter-
mines which state the 0 output will go on the
ascending edge of the next clock. The preset and
reset lines are not related to clock time and will
override any D input at clock time. A low going
pulse on the preset will result in a high output
at 0. A low going pulse on the reset will result
in a high output at 0.
PRESET
D
CLOCK t
RESET
D
0
1
1
J
ATt
Q
0
1
Q
Q
1
0
Figure 1-3. D Flip-Flop
The symbol and truth table for the JK flip-flops
are shown in figure 1-4. The JK flip-flop utilizes
the descending edge of the clock to provide two
inputs for control. The J input controls the next
state of the 0 output and the K input controls
the next state of the Q output. The J and K
inputs are usually complements of each other,
however, this is not a requirement. When the J
and K inputs are both low, no change will occur
at the outputs at clock time. When the J and K
inputs are both high, the outputs will comple-
ment at clock time. Two variations are used for

inputs to the JK flip-flops. The first provides for
one J input and one K input while the second
variation provides for three J inputs and three
K inputs. The three inputs function as an AND
gate and all three J inputs or all three K inputs
must be high to reflect a high on the output
being controlled.
J Q
CLOCKt
~
"'1
K Q
RESET
J
AT t (DESCENDING EDGE OF CLOCK)
JK
01
10
11
00
Q
0
1
Q
Q
1
0
g
Q
Figure 1-4. JK Flip-Flop
Other special circuits used, such as dividers,
counters and one-shots are symbolized by a rec-
tangle with all of the inputs and outputs marked.
BLOCK DIAGRAMS
The functional block diagrams are composed of
circuit elements connected by lines to indicate
the direction of information flow. The elements
are represented by rectangles with no signifi-
cance to size. Each rectangle contains a letter
designator which represents the general type of
circuit. The letter designators are:
G ................................ Gate
L ............................... Latch
D ........................... D flip-flop
JK .......................... JK flip-flop
The most significant waveforms are shown ad-
jacent to appropriate pins. Figure 1-5 is typical
of pulses and levels generally shown in wave-
forms.
PULSES
LEVELS, TRANSITION SHOWS DIRECTION OF
INITIAL MOVEMENT. LEVEL REMAINS UNTIL
OTHER ACTION IS TAKEN.
Figure 1-5. Typical Waveforms
ILLUSTRATIONS
Figures 1-6 through 1-9 show the printed circuit
cards used in the Datapoint 3300.
1-5

ANSWERBACK
v
\:a
T y
SE LL
G H
B I
N
Figure 1-6. Keyboard and Answer-Back Cards