Diodes AP63300-EVM User manual

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
1 of 11
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September 2019
© Diodes Incorporated
DESCRIPTION
The AP63300/AP63301 is 3A, synchronous buck
converter with a wide input voltage range of 3.8V
to 32V. The device fully integrates a 75mΩ high-
side power MOSFET and a 40mΩ low-side power
MOSFET to provide high-efficiency step-down DC-
DC conversion.
The AP63300/AP63301 device is easily used by
minimizing the external component count due to its
adoption of peak current mode control along with
its integrated loop compensation network.
FEATURES
VIN 3.8V to 32V
3A Continuous Output Current
0.8V ± 1% Reference Voltage
22µA Ultralow Quiescent Current (Pulse
Frequency Modulation)
500kHz Switching Frequency
Supports Pulse Frequency Modulation (PFM)
oAP63300
oUp to 88% Efficiency at 5mA Light Load
Pulse Width Modulation (PWM) Regardless of
Output Load
oAP63301
Proprietary Gate Driver Design for Best EMI
Reduction
The AP63300/AP63301 design is optimized for
Electromagnetic Interference (EMI) reduction. The
device has a proprietary gate driver scheme to
resist switching node ringing without sacrificing
MOSFET turn-on and turn-off times, which reduces
high-frequency radiated EMI noise caused by
MOSFET switching. AP63300 also features
Frequency Spread Spectrum (FSS) with a switching
frequency jitter of ±6%, which reduces EMI by not
allowing emitted energy to stay in any one
frequency for a significant period of time.
The device is available in a TSOT26 package.
Frequency Spread Spectrum (FSS) to Reduce
EMI
oAP63300
Low-Dropout (LDO) Mode
Precision Enable Threshold to Adjust UVLO
Protection Circuitry
oUndervoltage Lockout (UVLO)
oOutput Overvoltage Protection (OVP)
oCycle-by-Cycle Peak Current Limit
oThermal Shutdown

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
2 of 11
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September 2019
© Diodes Incorporated
APPLICATIONS
5V, 12V, and 24V Distributed Power Bus Supplies
FPGA, DSP, and ASIC Supplies
Flat Screen TV Sets and Monitors
White Goods and Small Home Appliances
Home Audio
Network Systems
Consumer Electronics
Cordless Power Tools
Optical Communication and Networking Systems
General Purpose Point of Load
FUNCTIONAL BLOCK
0.88VOVP
+
SE= 0.84V/T
RT= 0.2V/A
FB
SW
VIN
ON
3
0.8V
VCC
+
-
1
+
+
-
+
-
+
-
CLK
VSUM Control
Logic
0.8V
Ref
PWM
Comparator
OCP
5
6
4
OVP
+
-
CSA
BST
GND
EN 2
Error
Amplifier
500kHz
Oscillator
Internal
SS
Thermal
Shutdown
TSD
COMP
VCC
Regulator
Internal
Reference
1.18V
I1
1.5μA
I2
4μA
20kΩ
+
–
Figure 1. Functional Block Diagram

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
3 of 11
www.diodes.com
September 2019
© Diodes Incorporated
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Rating
Unit
VIN
Supply Pin Voltage
-0.3 to +35.0 (DC)
V
-0.3 to +40.0 (400ms)
VFB
Feedback Voltage
-0.3V to +6.0
V
VEN
Enable/UVLO Pin Voltage
-0.3 to +35.0
V
VSW
Switch Node Voltage
-0.3 to VIN + 0.3 (DC)
V
-2.5 to VIN + 2.0 (20ns)
V
VBST
Bootstrap Pin Voltage
VSW - 0.3 to VSW + 6.0
V
TST
Storage Temperature
-65 to +150
°C
TJ
Junction Temperature
+160
°C
TL
Lead Temperature
+260
°C
ESD Susceptibility (Note 5)
HBM
Human Body Mode
2000
V
CDM
Charged Device Model
1000
V
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VIN
Supply Voltage
3.8
32
V
VOUT
Output Voltage
0.8
31
V
TA
Operating Ambient Temperature
Range
-40
+85
°C
TJ
Operating Junction Temperature
Range
-40
+125
°C

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
4 of 11
www.diodes.com
September 2019
© Diodes Incorporated
EVALUATION BOARD
Figure 2. Top Picture of EV Board
QUICK START GUIDE
The AP63300-EVM has a simple layout and allows access to the appropriate signals through test points.
To evaluate the performance of the AP63300, follow the procedure below:
1. For evaluation board configured at VOUT=5V, connect a power supply to the input terminals VIN and
GND. Set VIN to 12V.
2. Connect the positive terminal of the electronic load to VOUT and negative terminal to GND.
3. For Enable, place a jumper to “H” position to enable IC. Jump to “L” position to disable IC.
4. The evaluation board should now power up with a 5V output voltage.
5. Check for the proper output voltage of 5V (±1%) at the output terminals VOUT and GND. Measurement
can also be done with a multimeter with the positive and negative leads between VOUT and GND.
6. Set the load to 3A through the electronic load. Check for the stable operation of the SW signal on the
oscilloscope. Measure the switching frequency.

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
5 of 11
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September 2019
© Diodes Incorporated
MEASUREMENT/PERFORMANCE GUIDELINES:
1) When measuring the output voltage ripple, maintain the shortest possible ground lengths on the
oscilloscope probe. Long ground leads can erroneously inject high frequency noise into the
measured ripple.
2) For efficiency measurements, connect an ammeter in series with the input supply to measure the
input current. Connect an electronic load to the output for output current.
Setting the Output Voltage of AP63300
1) Setting the output voltage
The AP63300 features external programmable output voltage by using a resistor divider network
R3 and R1 as shown in the typical application circuit. The output voltage is calculated as below,









1
31
8.0 RRR VOUT
First, select a value for R1 according to the value recommended in the table 1. Then, R3 is
determined. The output voltage is given by Table 1 for reference. For accurate output voltage, 1%
tolerance is required.
2) Output feed-forward capacitor selection
The AP63300 has the internal integrated loop compensation as shown in the function block
diagram. The compensation network includes a 18k resistor and a 7.6nF capacitor. Usually, the
type II compensation network has a phase margin between 60 and 90 degree. However, if the
output capacitor has ultra-low ESR, the converter results in low phase margin. To increase the
converter phase margin, a feed-forward cap C4 is used to boost the phase margin at the converter
cross-over frequency
C
f
. The feed-forward capacitor is given by Table 1 for reference. The feed-
forward capacitor is calculated as below,
3
2
1
R
CfC
ff 


Table 1. Resistor selection for output voltage setting
Vo
R3
R1
C4
C6-C8
1.8V
77.5 KΩ
62 KΩ
100pF
22uFx2
2.5V
131 KΩ
62 KΩ
100pF
22uFx2
3.3V
182 KΩ
62 KΩ
100 pF
22uFx2
5V
157 KΩ
30 KΩ
100 pF
22uFx2
12V
249 KΩ
18 KΩ
56 pF
22uFx4

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
6 of 11
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September 2019
© Diodes Incorporated
EXTERNAL COMPONENT SELECTION:
1) Input & output Capacitors (Cin, Cout)
(1) For lower output ripple, low ESR is required.
(2) Low leakage current needed, X5R/X7R ceramic recommend, multiple capacitor parallel
connection.
(3) The Cin and Cout capacitances are greater than 22uF and 44uF respective.
2) Bootstrap Voltage Regulator
(1) An external 0.1uF ceramic capacitor is required as bootstrap capacitor between BST and SW
pin to work as high side power MOSFET gate driver.
3) Inductor (L)
(1) Low DCR for good efficiency
(2) Inductance saturate current must higher than the output current
(3) The recommended inductance is shown in the table 2 below.
EVALUATION BOARD SCHEMATIC
VIN
BS
LX
FB
6.8mH
CIN
VIN= 12V GND
COUT
22mF*2
VOUT=5.0V
AP63300
0.1uF
10mF
EN
157K
1mF
OFF
Floating
100pF
30K
Figure 3. Typical Application Circuit

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
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PCB TOP LAYOUT
Figure 4. AP63300/1-EVM –Top Layer
PCB BOTTOM LAYOUT
Figure 5. AP63300/1 -EVM –Bottom Layer

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
8 of 11
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© Diodes Incorporated
BILL OF MATERIALS for AP63300/1-EVM
Item
Value
Type
Rating
Description
Description
C2
22uF
X5R/X7R,
Ceramic/1206
35V
Input CAP
C3
0.1uF
X5R/X7R,
Ceramic/0603
50V
Input CAP
Würth PART
885 012 206 095
C4
100pF
0603
100V
Feedback CAP
Würth PART
885 012 206 102
C5
0.1uF
X5R/X7R,
Ceramic/0603
50V
Bootstrap CAP
Würth PART
885 012 206 095
C6 & C7
22uF
X5R/X7R,
Ceramic/1206
25V
Output CAP
L1
6.8uH
6060
6.5A
Inductor
Würth PART
744 393 690 68
R1
30K
0603
1%
Voltage set RES*
R3
162K
0603
1%
R4 & R7
0
0603
1%
Bootstrap RES
U1
AP63300
TSOT23-6
Diodes BCD
*Note: The present value of R3/R1 are based on Vout=5.0V

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
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September 2019
© Diodes Incorporated
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 5. AP63300 Efficiency vs. Output Current
Figure 6. AP63301 Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0.001 0.010 0.100 1.000 10.000
Efficiency (%)
IOUT (A)
VIN = 12V, VOUT = 5V, L = 6.8μH VIN = 12V, VOUT = 3.3V, L = 4.7μH
VIN = 24V, VOUT = 5V, L = 6.8μH VIN = 24V, VOUT = 3.3V, L = 4.7μH
0
10
20
30
40
50
60
70
80
90
100
0.001 0.010 0.100 1.000 10.000
Efficiency (%)
IOUT (A)
VIN = 12V, VOUT = 5V, L = 6.8μH VIN = 12V, VOUT = 3.3V, L = 4.7μH
VIN = 24V, VOUT = 5V, L = 6.8μH VIN = 24V, VOUT = 3.3V, L = 4.7μH

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
10 of 11
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September 2019
© Diodes Incorporated
Figure 7. AP63301 Vin=12 Vout=5V Output Voltage Ripple, IOUT = 50mA
Figure 8. AP63301 Vin=12 Vout=5V Output Voltage Ripple, IOUT = 3A

AP63300/1-EVM
3.8V TO 32V INPUT, 3A LOW IQ SYNCHRONOUS BUCK WITH
ENCHANCED EMI REDUCTION
AP63300/AP63301
Document number: DS42002 Rev. 3 - 2
11 of 11
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September 2019
© Diodes Incorporated
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