eInfochips Eragon 624 SOM Quick user guide

Hardware Reference Manual SOM
Version 1.0 - ii - eInfochips Confidential
Confidentiality Notice
Copyright (c) 2019 eInfochips. - All rights reserved
This document is authored by eInfochips and is eInfochips intellectual property, including the copyrights
in all countries in the world. This document is provided under a license to use only with all other rights,
including ownership rights, being retained by eInfochips. This file may not be distributed, copied, or
reproduced in any manner, electronic or otherwise, without the express written consent of eInfochips.
FCC ID: 2ATUP-Q624300
IC: 25301-Q624300

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Version 1.0 - iii - eInfochips Confidential
Contents
1 Document Details..................................................................................................................................7
1.1 Document History .........................................................................................................................7
1.2 Definition, Acronyms and Abbreviations......................................................................................7
1.3 References ..................................................................................................................................10
2 License Agreement..............................................................................................................................11
3 Preface ................................................................................................................................................12
Intended Audience......................................................................................................................12
Intended Use...............................................................................................................................12
4 Overview .............................................................................................................................................13
Key Features................................................................................................................................14
Applications.................................................................................................................................15
5 Getting Started....................................................................................................................................16
Prerequisites ...............................................................................................................................16
Starting the Eragon624 SOM for the first time with Eragon624 Carrier ....................................16
6 System Block Diagram.........................................................................................................................17
ERAGON624 BOARD IMAGE........................................................................................................18
Major Blocks of ERAGON624 SOM Module................................................................................31
6.2.1 Processor APQ8053 - Features and interfaces....................................................................31
6.2.2 Memory Interface ...............................................................................................................32
6.2.3 Wi-Fi + BT Interface.............................................................................................................32
6.2.4 GPS Interface.......................................................................................................................32
6.2.5 PMIC Interface ....................................................................................................................33
6.2.6 System LEDs ........................................................................................................................33
6.2.7 Shielding..............................................................................................................................33
Guidelines to Design Carrier Board............................................................................................. 34
6.3.1 Power Supply ......................................................................................................................34
6.3.2 Boot Configuration..............................................................................................................34
6.3.3 General Purpose Keys (as per Eragon624 Carrier Board) ...................................................35
6.3.4 USB Interface ......................................................................................................................35

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6.3.5 Audio Interface....................................................................................................................35
6.3.6 Sensors................................................................................................................................39
6.3.7 Micro SD Card .....................................................................................................................39
6.3.8 DSI to HDMI.........................................................................................................................40
6.3.9 HDMI to CSI Audio interface ...............................................................................................41
6.3.10 WiFi + BT chip antenna .......................................................................................................42
6.3.11 GPS chip antenna ................................................................................................................43
6.3.12 M.2 (4G LTE) connector ......................................................................................................43
6.3.13 RTC ......................................................................................................................................47
6.3.14 Debug Port ..........................................................................................................................47
7 Electrical Specification ........................................................................................................................48
Absolute Maximum Ratings........................................................................................................48
Operating Conditions..................................................................................................................48
8 Mechanical Specification ....................................................................................................................49
SOM Board Dimensions ..............................................................................................................49
Shields Dimensions .....................................................................................................................49
9 Special Care when using ERAGON624 SOM Board.............................................................................51
Development Device Notice .......................................................................................................51
Anti-Static Handling Procedure...................................................................................................51
10 About eInfochips.................................................................................................................................52

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List of Figures
Figure 1 –ERAGON 624 SOM Block Diagram ............................................................................................17
Figure 2 –ERAGON624 SOM Top View......................................................................................................18
Figure 3 –ERAGON624 SOM BOT View.....................................................................................................18
Figure 4 –Boot Configuration Switch (SW1) schematic............................................................................34
Figure 5 –Boot Configuration Switch (SW1) .............................................................................................35
Figure 6 –General Purpose Keys ...............................................................................................................35
Figure 7 –WCD9335 Audio Code Daughter Board (custom made by eInfochips) ...................................36
Figure 8 –Schematic-1 on Carrier Board for Audio Code Daughter Board ..............................................36
Figure 9 –Schematic-2 on Carrier Board for Audio Code Daughter Board ..............................................37
Figure 10 –Audio Headset Jack .................................................................................................................37
Figure 11 –Audio Headset Jack schematic................................................................................................37
Figure 12 –Analog and Digital Codec Headers (J17 & J18).......................................................................38
Figure 13 –Micro SD card connector schematic for carrier......................................................................40
Figure 14 –DSI to HDMI Audio Connector J26 ..........................................................................................41
Figure 15 –HDMI to CSI Audio Connector J27 ..........................................................................................42
Figure 16 –Routing of UFL cable from SOM to Carrier.............................................................................43
Figure 17 –Routing of UFL cable from SOM to Carrier.............................................................................43
Figure 18 –M.2 connector (J35).................................................................................................................44
Figure 19 –SIM card connectors (J38 & J36).............................................................................................44
Figure 20 –RTC connector (J8)...................................................................................................................47
Figure 21 –Debug Port connection (J22)...................................................................................................47
Figure 22 –SOM Module Dimension.........................................................................................................49
Figure 23 –SOM Module TOP side Shields................................................................................................49
Figure 24 –SOM Module BOT side Shield.................................................................................................50

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List of Tables
Table 1: Document History ...........................................................................................................................7
Table 2 : Definition, Acronyms and Abbreviations .......................................................................................9
Table 3 : References....................................................................................................................................10
Table 4: ERAGON 624 BOOT Configuration options ...................................................................................34
Table 5: Headset (J19) Pinout .....................................................................................................................38
Table 6: Audio Header (J17) Pinout ............................................................................................................39
Table 7: Audio Header (J18) Pinout ............................................................................................................39
Table 8: HDMI Audio Connector (J26) Pinout.............................................................................................41
Table 9: HDMI Audio Connector (J27) Pinout.............................................................................................42
Table 10: M.2 connector (J35) Pinout.........................................................................................................46
Table 11: SIM CARD_1 connector (J38) Pinout...........................................................................................46
Table 12: SIM CARD_2 connector (J36) Pinout...........................................................................................46
Table 13: Debug Port Connector (J22) Pinout ............................................................................................ 47
Table 14 : Absolute Maximum Ratings .......................................................................................................48
Table 15 : Operating Conditions .................................................................................................................48

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1Document Details
1.1 Document History
Version
Author
Reviewer
Approver
Description
Of Changes
Name
Date
Name
Review
Comment
ID
Name
Date
1.0
eInfochips
18-July 19
eInfochi
ps
Initial release
Table 1: Document History
1.2 Definition, Acronyms and Abbreviations
Definition/Acronym/Abbreviation
Description
BLE
Bluetooth Low Energy
BOM
Bill of Material
BT
Bluetooth
CPU
Central Processing Unit
CSI
Camera Serial Interface
DC
Direct Current
DDR
Double Data Rate
DSI
Display Serial Interface
eI
eInfochips
GB
Giga Byte
GPIO
General Purpose Interface
GPS
Global Positioning System
HD
High Definition

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HDMI
High Definition Multimedia Interface
I2C
Inter-Integrated Circuit
IC
Integrated Circuit
Inc.
Incorporated
JTAG
Joint Test Application Group
KB
Kilo Byte
LAN
Local Area Network
LPDDR
Lower Power DDR
MIPI
Mobile protocol working Alliance (not an Acronym)
MISO
Master In Slave Out
MMC
Multi Media Card
MOSI
Master Out Slave In
MP
Mega Pixel
OTG
On The Go
PLL
Phase Loop Locked
PMIC
Power Management IC
RAM
Random Access Memory
RF
Radio Frequency
RoHS
Restriction of Hazardous Substances
Rx
Receive
SOM
System On Module
SPI
Serial peripheral Interface
Tx
Transmit

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UART
Universal Asynchronous Interface
USB
Universal Serial Bus
ADB
Android Debug Bridge
WLAN
Wireless LAN
Table 2 : Definition, Acronyms and Abbreviations

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1.3 References
No.
Document
Version
Remarks
1
ERAGON624 SOM Schematic File
1.3
2.
ERAGON624 Carrier Schematic File
1.3
Table 3 : References

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2License Agreement
The use of this document is subject to and governed by those terms and conditions in the eInfochips Ltd.
Purchase and Software License Agreement for the APQ8053 based development platform, which you or
the legal entity you represent, as the case may be, accepted and agreed to when purchasing ERAGON624
development platform from eInfochips Ltd. (“Agreement”). You may use this document, which shall be
consider as a part of the defined term “Documentation” for purposes of the Agreement, solely in support
of your permitted use of the ERAGON624 development platform under the Agreement. Distribution of
this document is strictly prohibited without the express written permission of eInfochips Ltd. and its
respective licensors, which they can withhold, condition or delay in its sole discretion.
eInfochips is a trademark of eInfochips Ltd., registered in India, USA and other countries.
Qualcomm is a trademark of Qualcomm Inc., registered in the United States and other countries. Other
product and brand names used herein may be trademarks or registered trademarks of their respective
owners.
This document contains technical data that may be subject to U.S. and international export, re-export, or
transfer (“export”) laws. Diversion contrary to U.S. and international law is strictly prohibited.

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3Preface
This document provides an overview of the ERAGON624 SOM based on Qualcomm’s APQ8053 SoC. It
provides step-by-step information about hardware components and associated software release Android
8.1.0 (Oreo) used with Carrier KIT.
Intended Audience
This document is intended for technically qualified personnel. It is not intended for general audiences.
Intended Use
The development platform supports a wide range of industry interfaces and offers a comprehensive
hardware and software design. It comes with Android software packages. This platform enables
developers to evaluate and create solutions targeted at various market segments while customers and
OEMs can build their products based on these designs directly or with customizations.

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4Overview
The ERAGON624 SoM provides an ideal building block for simple integration with a wide range of products
in target markets requiring rich multimedia functionality, powerful graphics processing and video
capabilities, as well as high-processing power, in a compact, RoHS compliant, fan less, cost effective SoM
with low power consumption.
The ERAGON624 SoM leverages cutting edge mobile computing for embedded and industrial product
designs, based on the Qualcomm Snapdragon™ 624 (APQ8053) 1.8 GHz octacore CPU, high performance
Adreno™ 506 GPU and a dedicated DSP for advanced A/V processing.
The SOM is equipped with full range of interfaces available in the Qualcomm Snapdragon APQ8053 SoC,
which are routed on the 300 pins of three (100 pins each) board-to-board connectors.
The APQ8053 SOM supports Android Oreo operating system
The ERAGON624 SoM is ideal for rapid prototyping of product which can be used in customized carried
Board with same Pin-out by end customer. With support for almost all the peripherals, it reduces the
design time of innovative applications and helps to achieve early time to market. With variety of
peripherals, SOM is targeted for wide range of applications supporting bulk storage, faster connectivity,
higher through put and performance at lower power.

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Key Features
CPU
Qualcomm Snapdragon 624
Octa-core ARM® Cortex® A53 at up to
1.8 GHz per core.
Both quad’s with 512KB L2 cache
64-Bit processor
Qualcomm Adreno 506 GPU.
1920 x 1080p video encoding/ decoding
capability
Dual 14 bit ISP(Image Signal Processing)
Qualcomm Hexagon™ DSP
Audio
Input:
o6x Analog mic (WCD9335 Codec)
o3xDigital mic (WCD9335 Codec)
o2x Analog mic (PMIC Codec)
o1xDigital mic (PMIC Codec)
Output:
o1x Stereo Headset Output(WCD9335
Codec )
o2x Speaker Output(WCD9335 Codec)
o1x Earphone output(WCD9335
Codec)
o2x Lineout(WCD9335 Codec)
o1x Speaker Output(PMIC Codec)
o1x Earphone output(PMIC Codec)
o1x Lineout(PMIC Codec)
Memory
RAM:
Up to 4GB LPDDR3 at up to 933 MHz
clock
Storage:
Up to 64 GB eMMC
Connectivity
WLAN 802.11 b/g/n 2.4GHz and 802.11
a/n/ac 5GHz
Bluetooth 4.2
GPS
Camera
3xMIPI CSI 4 Lane Camera Interface
(Only two can work simultaneously).
Display
2 X MIPI DSI 4 Lane Display Interface
Resolution up to FHD 1920 x 1200, 60fps
Operating System
Android 8.1.0
Multimedia
Audio and Video as mention above
USB & SD Card Interface
1x USB 3.0 or 2.0 Port
SD Card (SDC2 - 4 bit)
Miscellaneous
2x UART, 1x I2C, 2x MI2S, 1x SPI, 2x GPIO’s on
LS-Expansion Connector.
Power Input & Consumption
Voltage In: 3.8V (VBATT+) on J4805 connector
from Carrier Board (J13)
Physical & Operating Characteristics
Dimension:
oSOM: 60mm x 35mm
Storage Temperature Range:
o-20 to 70° C
Operating Temperature Range:
o0 to 60° C

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Applications
The ERAGON624 SoM is used in a wide range of products across many different target markets. Some of
the typical applications are:
Consumer Electronics
Internet of Things
Marine
Automotive
Domestic Robot
Digital signage
Security & Surveillance
Biometric Access Control Systems
Home and Health Hub
Human-machine interface
Home energy management systems
In-flight entertainment
Intelligent industrial control systems
Portable medical

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5Getting Started
Prerequisites
Before user power up the ERAGON 624 SOM board for the first time, will need following things:
Eragon 624 Carrier Board or Carrier Board with Exact Pin-outs and mating connectors
WiFi BT U.FL connector on SOM should be connected to Antenna on Carrier Board
Power input to Custom made Carrier/ Eragon 624 Carrier Board
Display board embraces 1080p OTM1901A LCD and multi touch capacitive touch panel on Carrier
board if provision is given.
FFC Cable for connecting LCD display to the ERAGON 624 Board.
Starting the Eragon624 SOM for the first time with Eragon624 Carrier
To start the board, follow these simple steps:
Step 1. First, connect the ERAGON 624 Board to the Display board through FFC cable (DSI cable)
Step 2. Connect the Micro USB cable to connector J22 of carrier card
Step 3. Ensure that the boot switches SW1 are set to ‘000’, all in off position.
Step 4. Connect the complaint power supply to power connector J23.
Step 5. Press switch SW6 on carrier card for 2-3 seconds and then release.
Now board is in the booting process.
Please note that the first boot takes several minutes due to Androids initialization. Subsequent boot
times should be faster.

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6System Block Diagram
Figure 1 –ERAGON 624 SOM Block Diagram

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ERAGON624 BOARD IMAGE
Figure 2 –ERAGON624 SOM Top View
Figure 3 –ERAGON624 SOM BOT View

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The ERAGON 624 SOM offers a wide boost of interfaces and peripherals, including several high-speed
signals through its edge connectors.
The ERAGON624 SOM and Carrier are interfaced through three Hirose DF40C-100DP-0.4V Connectors.
The pin outs for these three connectors is described below,
SOM
Pin No.
Carrier
Board Pin
Number
Signal Name
Default Pin Function
Operating
Voltage Level
J5.1
J11.1
CSI0_CAM_GPIO_1
CSI0 Camera GPIO
1.8V
J5.2
J11.2
CSI1_CAM_GPIO_1
CSI1 Camera GPIO
1.8V
J5.3
J11.3
CSI0_CAM_GPIO_2
CSI0 Camera GPIO
1.8V
J5.4
J11.4
CSI1_CAM_GPIO_2
CSI0 Camera GPIO
1.8V
J5.5
J11.5
CSI0_PWDN
CSI0 Power Down Signal
1.8V
J5.6
J11.6
CSI2_CAM_GPIO_1
CSI2 Camera GPIO
1.8V
J5.7
J11.7
CSI0_RST
CSI0 Camera Reset Signal
1.8V
J5.8
J11.8
CSI2_CAM_GPIO_2
CSI2 Camera GPIO
1.8V
J5.9
J11.9
CSI2_PWDN
CSI2 Camera Power Down signal
1.8V
J5.10
J11.10
GND
Ground
-
J5.11
J11.11
CSI2_RST
CSI2 Camera Reset Signal
1.8V
J5.12
J11.12
MIPI_CSI2_CLK_N
MIPI CSI2 Clock Negative
-
J5.13
J11.13
GND
Ground
-
J5.14
J11.14
MIPI_CSI2_CLK_P
MIPI CSI2 Clock Positive
-
J5.15
J11.15
MIPI_CSI1_CLK_P
MIPI CSI1 Clock Positive
-
J5.16
J11.16
GND
Ground
-
J5.17
J11.17
MIPI_CSI1_CLK_N
MIPI CSI1 Clock Negative
-
J5.18
J11.18
MIPI_CSI2_LANE1_P
MIPI CSI2 Lane 1 Positive
-
J5.19
J11.19
GND
Ground
-
J5.20
J11.20
MIPI_CSI2_LANE1_N
MIPI CSI2 Lane 1 Negative
-
J5.21
J11.21
MIPI_CSI1_LANE0_N
MIPI CSI1 Lane 0 Negative
-
J5.22
J11.22
GND
Ground
-
J5.23
J11.23
MIPI_CSI1_LANE0_P
MIPI CSI1 Lane 0 Positive
-
J5.24
J11.24
MIPI_CSI2_LANE0_N
MIPI CSI2 Lane 0 Negative
-
J5.25
J11.25
GND
Ground
-

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SOM
Pin No.
Carrier
Board Pin
Number
Signal Name
Default Pin Function
Operating
Voltage Level
J5.26
J11.26
MIPI_CSI2_LANE0_P
MIPI CSI2 Lane0 Positive
-
J5.27
J11.27
MIPI_CSI1_LANE1_P
MIPI CSI1 Lane 1 Positive
-
J5.28
J11.28
GND
Ground
-
J5.29
J11.29
MIPI_CSI1_LANE1_N
MIPI CSI1 Lane 1 Negative
-
J5.30
J11.30
MIPI_CSI2_LANE2_P
MIPI CSI2 Lane 2 Positive
-
J5.31
J11.31
GND
Ground
-
J5.32
J11.32
MIPI_CSI2_LANE2_N
MIPI CSI2 Lane 2 Negative
-
J5.33
J11.33
MIPI_CSI1_LANE2_P
MIPI CSI1 Lane 2 Postive
-
J5.34
J11.34
GND
Ground
-
J5.35
J11.35
MIPI_CSI1_LANE2_N
MIPI CSI1 Lane 2 Negative
-
J5.36
J11.36
MIPI_CSI2_LANE3_P
MIPI CSI2 Lane 3 Positive
-
J5.37
J11.37
GND
Ground
-
J5.38
J11.38
MIPI_CSI2_LANE3_N
MIPI CSI2 Lane 3 Negative
-
J5.39
J11.39
MIPI_CSI1_LANE3_P
MIPI CSI1 Lane 3 Positive
-
J5.40
J11.40
GND
Ground
-
J5.41
J11.41
MIPI_CSI1_LANE3_N
MIPI CSI1 Lane 3 Negative
-
J5.42
J11.42
MIPI_DSI1_CLK_N
MIPI DSI1 Clock Negative
-
J5.43
J11.43
GND
Ground
-
J5.44
J11.44
MIPI_DSI1_CLK_P
MIPI DSI1 Clock Positive
-
J5.45
J11.45
MIPI_CSI0_CLK_P
MIPI CSI0 Clock Positive
-
J5.46
J11.46
GND
Ground
-
J5.47
J11.47
MIPI_CSI0_CLK_N
MIPI CSI0 Clock Negative
-
J5.48
J11.48
MIPI_DSI1_LANE0_N
MIPI DSI1 Lane0 Negative
-
J5.49
J11.49
GND
Ground
-
J5.50
J11.50
MIPI_DSI1_LANE0_P
MIPI DSI1 Lane0 Positive
-