Embedian SMARC-FiMX6 User manual

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SMARC-FiMX6 Computer on Module User’s Manual v.1.2
SMARC Computer on Module
Freescale i.MX6 Cortex A9
24bits Parallel LCD/LVDS/HDMI
4 x COM Ports
2 x SDHC
1 x USB Host 2.0, 1 x USB OTG
1 x 10/100/1000M Gigabit Ethernet
2 x CAN Bus, 2 x SPIs, 4 x I2Cs
1 x PCIe, 1 x SATA, 1 x MIPI
SMARC-FiMX6

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SMARC-FiMX6 Computer on Module User’s Manual v.1.2

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SMARC-FiMX6 Computer on Module User’s Manual v.1.2
Revision History
Revision Date Changes from Previous Revision
1.0 2014/11/20 Initial Release
1.2 2015/2/25 Documentation Wording Fixed and add section
2.1.8 and add Ethernet MAC EEPROM information

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USER INFORMATION
About This Manual
This document provides information about products from EMBEDIAN, INC.
No warranty of suitability, purpose, or fitness is implied. While every
attempt has been made to ensure that the information in this document is
accurate, the information contained within is supplied “as-is” and is subject
to change without notice.
For the circuits, descriptions and tables indicated, EMBEDIAN assumes
no responsibility as far as patents or other rights of third parties are
concerned.
Copyright Notice
Copyright © 2014 EMBEDIAN, INC..
All rights reserved. No part of this manual may be reproduced, transmitted,
transcribed, stored in a retrieval system, or translated into any language or
computer language, in any form or by any means (electronic, mechanical,
photocopying, recording, or otherwise), without the express written
permission of EMBEDIAN.
Trademarks
The following lists the trademarks of components used in this board.
ARM is a registered trademark of ARM Limited.
Android is a registered trademark of Google
Linux is a registered trademark of Linus Torvalds.
WinCE is a registered trademark of Microsoft
TI is a registered trademark of Texas Instruments
All other products and trademarks mentioned in this manual are
trademarks of their respective owners.
Standards
EMBEDIAN is ISO 9001:2008 and ISO14001-certified manufacturer.
SMARC is an SGET standard for ARM computer on module.
Warranty
This EMBEDIAN product is warranted against defects in material and
workmanship for the warranty period from the date of shipment. During
the warranty period, EMBEDIAN will at its discretion, decide to repair or
replace defective products.
Within the warranty period, the repair of products is free of charge as long
as warranty conditions are observed.
The warranty does not apply to defects resulting from improper or
inadequate maintenance or handling by the buyer, unauthorized
modification or misuse, operation outside of the product’s environmental
specifications or improper installation or maintenance.

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SMARC-FiMX6 Computer on Module User’s Manual v.1.2
EMBEDIAN will not be responsible for any defects or damages to other
products not supplied by EMBEDIAN that are caused by a faulty
EMBEDIAN product.
Technical Support
Technicians and engineers from EMBEDIAN and/or its subsidiaries and
official distributors are available for technical support. We are committed
to making our product easy to use and will help you use our products in
your systems.
Before contacting EMBEDIAN technical support, please consult our Web
site for the latest product documentation, utilities, and drivers. If the
information does not help solve the problem, contact us by e-mail or
telephone.

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Table of Contents
CHAPTER 1 INTRODUCTION..............................................................................................................10
1.1 FEATURES AND FUNCTIONALITY...............................................................................................10
1.2 MODULE VARIANT.........................................................................................................................12
1.3 BLOCK DIAGRAM ..........................................................................................................................13
1.4 SOFTWARE SUPPORT / HARDWARE ABSTRACTION..................................................................14
1.5 DOCUMENT AND STANDARD REFERENCES..............................................................................14
CHAPTER 2 SPECIFICATIONS............................................................................................................18
2.1 SMARC-FIMX6 GENERAL FUNCTIONS .......................................................................................18
2.2 SMARC-FIMX6 DEBUG..................................................................................................................94
2.3 MECHANICAL SPECIFICATIONS..................................................................................................94
2.4 ELECTRICAL SPECIFICATIONS..................................................................................................109
2.5 ENVIRONMENTAL SPECIFICATIONS.........................................................................................114
CHAPTER 3 CONNECTOR PINOUT..................................................................................................116
3.1 SMARC-FIMX6 CONNECTOR PIN MAPPING............................................................................ 116
CHAPTER 4 POWER CONTROL SIGNALS BETWEEN SMARC-FIMX6 MODULE AND CARRIER147
4.1 SMARC-FIMX6 MODULE POWER ..............................................................................................147
4.2 POWER SIGNALS..........................................................................................................................152
4.3 POWER FLOW AND CONTROL SIGNALS BLOCK DIAGRAM..................................................156
4.4 POWER STATES.............................................................................................................................158
4.5 POWER SEQUENCES...................................................................................................................159
4.6 TERMINATIONS ............................................................................................................................163
4.7 BOOT DEVICE SELECTION.........................................................................................................167

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Using this Manual
This guide provides information about the Embedian SMARC-FiMX6 for
Freescale i.MX6 embedded SMARC core module family.
Conventions used in this guide
This table describes the typographic conventions used in this guide:
This Convention Is used for
Italic type Emphasis, new terms, variables, and
document titles.
monospacedtypeFilenames, pathnames, and code
examples.
Embedian Information
Document Updates
Please always check the product specific section on the Embedian
support website at www.embedian.com/ for the most current revision of
this document.
Contact Information
For more information about your Embedian products, or for customer
service and technical support, contact Embedian directly.
To contact Embedian by Use
Mail Embedian, Inc.
4F-7. 432 Keelung Rd. Sec. 1,
Taipei 11051, Taiwan
World Wide Web http://www.embedian.com/
Telephone + 886 2 2722 3291
Additional Resources
Please also refer to the most recent Freescale i.MX6 processor reference

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manual and related documentation for additional information.

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Introduction
This Chapter gives background information on the
SMARC-FiMX6
Section include：
Features and Functionality
Module Variant
Block diagram
Software Support / Hardware Abstraction
Module Variant
Document and Standard References

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Chapter 1 Introduction
The SMARC® (Smart Mobility ARChitecture) FiMX6 is a versatile small form
factor Computer-On-Module with Freescale i.MX6 processor and offers a wide
range of processor scalability with single, dual and quadcore processors. The
X86 alike interfacing of SMARC-FiMX6 allows an easy integration in any kind
of application.
The module connector has 314 edge fingers that mate with a low profile 314
pin 0.5mm pitch right angle connector (this connector is sometimes identified
as an 321 pin connector, but 7 pins are lost to the key).
Featuring Freescale’s i.MX6 System-on-Chip, Embedian’s SMARC-FiMX6
offers 24-bit Parallel LCD, single- or dual-channel LVDS, Gigabit Ethernet,
HDMI, SDHC, USB 2.0, USB OTG, four UARTs support and many peripheral
interfaces in a cost effective, low power, miniature package. Embedian’s
SMARC-FiMX6 thin and robust design makes it an ideal building block for
reliable system design.
The module is the ideal choice for a broad range of target markets including
HVAC Building and Control Systems
Rear seat and in-freight entertainment system.
Smart Grid and Smart Metering
Digital Signage
HMI/ In-Home Display
Smart Toll Systems
Connected Vending Machines
Display Unit
General Control System
And more
Complete and cost-efficient Embedian evaluation kits for Yocto, Ubuntu 12.04,
Android ICS and Microsoft Windows Embedded Compact 7 allow immediate
and professional embedded product development with dramatically reduced
design risk and time-to-market.
1.1 Features and Functionality
The SMARC-FiMX module is based on the i.MX6 processor with solo, dual lite,
dual and quad core from Freescale. This processor offers a high number of
interfaces. The module has the following features:
SMARC 1.0 or 1.1 compliant in an 82mm x 50mm form factor.

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Processor: Freescale i.MX6 ARM Cortex-A9 up to 1GHz
Memory: Onboard 8GB eMMC Flash and 4MB SPI NOR Flash
Onboard 1GB or 2GB DDR3 Note 1
Networking: 1 x 10/100/1000 Mbps Ethernet
Display: 24-bit Parallel LCD
Single channel LVDS LCD 18 or 24 bit or dual channel LVDS
HDMI
Expansion: 2 x SDHC/SDIO, 1 x USB 2.0 Host
USB: 1 x USB 2.0 Host, 1 x USB 2.0 OTG, 1 x PCIe
A single 4KB EEPROM is provided on I2C0 that holds the board
information. This information includes board name, serial number, and
revision information.
Additional Interface:
4 x UARTs
2 x SPI
4 x I2C
1 x I2S
2 x CAN Bus
1 x PWM
12 x GPIOs
1 x SATA (Dual and Quad only)
WDT
SW Support: L:inux, Yocto, Ubuntu, Android ICS, Windows Embedded
Compact 7
Power Consumption (Typcal)
Solo Core (512MB DDR3): 1.55 Watts
Dual Lite Core (1GB DDR3): 2.2 Watts
Dual Core (1GB DDR3): 2.5 Watts
Quad Core (1GB DDR3): 3.6 Watts
Thermal:
Normal Temperature: 0oC ~ 60oC
Industrial Temperature: -40o ~85oC
Power Supply
3V to 5.25V (single 5V is recommended in non-battery operation)
3.3V or 1.8V module IO support
Note1:
SMARC-FiMX6-S (solo core) only has 512MB DDR3 on board
SMARC-FiMX6-U (dual lite core) only has 1GB DDR3 memory on board (no
2GB option for this variant.)

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1.2 Module Variant
The SMARC-FiMX6 module is available with various options based on
processors in this family from Freescale, DDR3 memory configuration, voltage
rail of VDDIO and operating temperature ranges.
1: “S” (solo core running up to 1GHz)
“U” (dual lite core running up to 1GHz)
“D” (dual core running up to 1GHz)
“Q” (quad core running up to 1GHz)
2: “1G” (1GB DDR3 memory)
“2G” (2GB DDR3 memory, only for dual and quad core)
3. “P” (if 1.8V VDDIO)
Leave it Blank if 3.3V VDDIO
4. “I” (Industrial temperature (-40oC~85oC), CPU running up to 800MHz)
Leave it Blank if normal temperature
For example, SMARC-FiMX-D-1G stands for dual core i.MX6 processor
running up to 1GHz with 1GB DDR3 memory in normal operating temperature.
The VDDIO voltage rail is 3.3V (SMARC spec. 1.0 compliant).

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1.3 Block Diagram
The following diagram illustrates the system organization of the
SMARC-FiMX6. Arrows indicate direction of control and not necessarily signal
flow.
Figure 1: SMARC-FiMX6 Block Diagram
Details for this diagram will be explained in the following chapters.

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1.4 Software Support / Hardware Abstraction
The Embedian SMARC-FiMX6 Module is supported by Embedian BSPs
(Board Support Package). The first SMARC-FiMX6 BSP targets Linux (Ubuntu
14.04 LTS and Yocto Project) and Android support. BSPs for other operating
systems are planned. Check with your Embedian contact for the latest BSPs.
This manual goes into a lot of detail on I/O particulars – information is provided
on exactly how the various SMARC edge fingers tie into the Freescale i.MX6
SoC and to other Module hardware. This is provided for reference and context.
Almost all of the I/O particulars are covered and abstracted in the BSP and it
should generally not be necessary for users to deal with I/O at the register
level.
1.5 Document and Standard References
1.5.1. External Industry Standard Documents
eMMC (Embedded Multi-Media Card) the eMMC electrical standard is
defined by JEDEC JESD84-B45 and the mechanical standard by
JESD84-C44 (www.jedec.org).
The I2C Specification, Version 2.1, January 2000, Philips
Semiconductor (now NXP) (www.nxp.com).
I2S Bus Specification, Feb. 1986 and Revised June 5, 1996, Philips
Semiconductor (now NXP) (www.nxp.com).
JTAG (Joint Test Action Group defined by IEEE 1149.1-2001 - IEEE
Standard Test Access Port and Boundary Scan Architecture
(www.ieee.org).
MXM3 Graphics Module Mobile PCI Express Module
Electromechanical Specification, Version 3.0, Revision 1.1, © 2009
NVIDIA Corporation (www.mxm-sig.org).
PICMG® EEEP Embedded EEPROM Specification, Rev. 1.0, August
2010 (www.picmg.org).
SD Specifications Part 1 Physical Layer Simplified Specification,
Version 3.01, May 18, 2010, © 2010 SD Group and SD Card
Association (Secure Digital) (www.sdcard.org).
SPI Bus – “Serial Peripheral Interface” - de-facto serial interface
standard defined by Motorola. A good description may be found on
Wikipedia
(http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus).
USB Specifications (www.usb.org).
Serial ATA Revision 3.1, July 18, 2011, Gold Revision, © Serial ATA

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International Organization (www.sata-io.org)
PCI Express Specifications (www.pci-sig.org)
SPDIF (aka S/PDIF) (“Sony Philips Digital Interface)- IEC 60958-3

1.5.2. SGET Documents
SMARC_Hardware_Specification_V1p0, version 1.0, December 20,
2012.
SMARC_Hardware_Specification_V1p1, version 1.1, May 29, 2014.
Smart Mobility Architecture Design Guide, version 1.0, July 9, 2013
Smart Mobility Architecture Design Guide, version 1.1, May 29, 2014
1.5.3. Embedian Documents
The following documents are listed for reference. The Module schematic is
not usually available outside of Embedian, without special permission. The
other schematics will be available. Contact your Embedian representative
for more information. The SMARC Evaluation Carrier Board Schematic is
particularly useful as an example of the implementation of various interfaces
on a Carrier board.
SMARC Evaluation Carrier Board Schematic, PDF and OrCAD
format
SMARC Evaluation Carrier Board User’s Manual
SMARC-FiMX6 User’s Manual
SMARC-FiMX6 Schematic Checklist
1.5.4. Freescale Documents
IMX6DQRM, i.MX 6Dual/6Quad Applications Processor Reference
Manual, May 2014 (rev. 2)
IMX6DQ6SDLHDG, Hardware Development Guide for i.MX 6Quad,
6Dual, 6DualLite, 6Solo Families of Applications Processors, June
2013 (rev. 1)
AN4059, i.MX 6Dual/6Quad Power Consumption Measurement, Oct
2012 (rev. 0)

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1.5.5. Freescale Development Tools
IOMUX_TOOL for ARM® i.MX6 Microprocessors
IMX_CST_TOOL, Freescale Code Signing Tool for the High Assurance
Boot library.
1.5.6. Freescale Software Documents
L3.0.101_SOURCE_BSP, i.MX 6Quad, i.MX 6Dual, i.MX 6DualLite,
i.MX 6Solo and i.MX 6Sololite Linux BSP Source Code Files. Nov 3,
2014 (Rev.# L3.0.101)
Fsl-L3.10.17_1.0.2_iMX6QDLS_BUNDLE, i.MX 6Quad, i.MX 6Dual,
i.MX 6DualLite, i.MX 6Solo Linux Binary Demo Files and Linux BSP
Documentation. Oct. 29, 2014 (Rev.# L3.10.17)
IMX6_JB43_110_ANDROID_SOURCE_BSP, i.MX 6Quad, i.MX 6Dual,
i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Android jb4.3_1.1.0 0
BSP, Documentation and Source Code for BSP and Codecs. Dec. 19,
2013 (Rev.# jb4.3_1.1.0)
IMX6_KK442_100_ANDROID_SOURCE_BSP, i.MX 6Quad, i.MX
6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Android
KK4.4.2_1.0.0 BSP, Source Code for BSP and Codecs. July 14, 2014
(Rev.# KK442.2_1.0.0)
1.5.7. Embedian Software Documents
Embedian Linux BSP for SMARC-FiMX6 Module
Embedian Android BSP for SMARC-FiMX6 Module
Embedian Linux BSP User’s Guide
Embedian Android BSP User’s Guide
1.5.8. Freescale Design Network
SABRE
Wandboard
Nucleus
QNX

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Specifications
This Chapter provides SMARC-FiMX6 specifications.
Section include：
SMARC-FiMX6 General Functions
SMARC-FiMX6 Debug
Mechanical Specifications
Electrical Specification
Environment Specification

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Chapter 2 Specifications
2.1 SMARC-FiMX6 General Functions
2.1.1. SMARC-FiMX6 Feature Set
This section lists the complete feature set supported by the SMARC-FiMX6
module.
SMARC Feature
Specification SMARC Specification
Maximum Number
Possible
SMARC-FiMX6
Feature Support SMARC-FiMX6 Feature Support
Instances
LVDS Display Support 1 Yes 1 (18 or 24 bits)Note1
Parallel LCD Support 1 Yes 1 (24 bits)
HDMI Display Support 1 Yes 1
CSI Camera Support
(Dual and Quad lanes) 2 Yes 1 (Quad Lane)
Serial Camera Support 2 Yes 1 (4 lanes)
USB Interface 3 Yes 2
PCIe Interface 3 Yes 1 (one Lane)
SATA Interface 1 Yes 1 (0 on Solo and
DualLite)
GbE Interface 1 Yes 1
SDIO Interface (4bit) 1 Yes 1 (max. 25MHz)
SDMMC Interface (8bit) 1 Yes 1 (max. 25MHz)
SPI Interface 2 Yes 2
I2S Interface 3 Yes 1
I2C Interface 5 Yes 5
Serial 4 Yes 4
CAN 2 Yes 2

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SMARC Feature
Specification SMARC Specification
Maximum Number
Possible
SMARC-FiMX6
Feature Support SMARC-FiMX6 Feature Support
Instances
AFB Yes Dual Channel LVDS
is realizedNote2
I/O Voltage (1.8V) Level
Support
Yes
I/O Voltage (3.3V) Level
Support Yes
Note:
1. Single channel LVDS interface: 1 x 18 bpp OR 1 x 24 bpp (up to 85 MHz
per interface e.g 1366x768 @ 60Hz + 35% blanking)
2. Dual channel LVDS interface: 2 x 18 bpp OR 2 x 24 bpp (up to 170 MHz
pixel clock e.g 1600x1200 @ 60 Hz + 35% blanking).
2.1.2. Form Factor
The SMARC-FiMX6 module complies with the SMARC General
Specification module size requirements in an 82mm x 50mm form factor.

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2.1.3. CPU
The SMARC-FiMX6 implements Freescale’s i.MX6 ARM processor.
Freescale CPU i.MX6 Solo i.MX6 DualLite i.MX6 Dual i.MX6 Quad
Cores 1 2 2 4
ClockNote1 1GHz 1GHz 1GHz 1GHz
Memory Speed DDR3-400 DDR3-400 DDR3-533 DDR3-533
Memory Bus 32-bit 64-bit 64-bit 64-bit
Cache 512KB L2 512KB L2 1MB L2 +
VFPv3 1MB L2 + VFPv3
GFX Vivante Vivante Vivante Vivante
GFX core
frequency 528MHz 528MHz 528MHz 528Mhz
IPUs 1 1 2 2
LVDS Single or Dual
Channel (18-bot
or 24-bit)
Single or Dual
Channel (18-bot
or 24-bit)
Single or Dual
Channel (18-bot
or 24-bit)
Single or Dual
Channel (18-bot
or 24-bit)
LVDS
Resolutions Single channel
LVDS interface :
1 x 18 bpp or 1 x
24 bpp (up to 85
MHz per
interface e.g
1366x768 @
60Hz + 35%
blanking)
Dual channel
LVDS interface:
2 x 18 bpp OR 2
x 24 bpp (up to
170 MHz pixel
clock e.g
1600x1200 @
60 Hz + 35%
blanking).
Single channel
LVDS interface :
1 x 18 bpp or 1 x
24 bpp (up to 85
MHz per
interface e.g
1366x768 @
60Hz + 35%
blanking)
Dual channel
LVDS interface:
2 x 18 bpp OR 2
x 24 bpp (up to
170 MHz pixel
clock e.g
1600x1200 @
60 Hz + 35%
blanking
Single channel
LVDS interface :
1 x 18 bpp or 1 x
24 bpp (up to 85
MHz per
interface e.g
1366x768 @
60Hz + 35%
blanking)
Dual channel
LVDS interface:
2 x 18 bpp OR 2
x 24 bpp (up to
170 MHz pixel
clock e.g
1600x1200 @
60 Hz + 35%
blanking
Single channel
LVDS interface : 1
x 18 bpp or 1 x 24
bpp (up to 85 MHz
per interface e.g
1366x768 @
60Hz + 35%
blanking)
Dual channel
LVDS interface: 2
x 18 bpp OR 2 x
24 bpp (up to 170
MHz pixel clock
e.g 1600x1200 @
60 Hz + 35%
blanking
Parallel LCD
Resolutions 1920x1080x60 1920x1080x60 1920x1080x60 1920x1080x60
HDMI
Resolutions 1920x1080x60 1920x1080x60 1920x1200x60 1920x1200x60