Endace DAG 3.7T User manual

EDM01.05-12r1
DAG 3.7T Card User Manual
2.5.5r1

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EDM01.05-12r1 DAG 3.7T Card User Manual
Copyright, all rights reserved. Version 6. 22 September 2005.
Leading Network Intelligence
Copyright © 2005.
Published by:
Endace Measurement Systems®Ltd
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PO Box 76802
Manukau City 1702
New Zealand
Phone: [phone]
Fax: [phone]
[email protected]
www.endace.com
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Endace Technology®Ltd
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www.endace.com
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United States of America
Phone: ++1 703 382 0155
Fax: ++1 703 382 0155
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United Kingdom
Phone: ++44 1223 370 176
Fax: ++44 1223 370 040
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All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in
any form or by any means electronic, mechanical, photocopying, recording, or otherwise, without the prior
written permission of the publisher. Prepared in Hamilton, New Zealand.

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EDM01.05-12r1 DAG 3.7T Card User Manual
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Typographical Conventions Used in this Document
•Command-line examples suitable for entering at command prompts are displayed in
mono-space courier font.
Results generated by example command-lines are also displayed in mono-space
courier font.
•Information relating to functions not implemented in this beta version of this product
are underlined
Protection Against Harmful Interference
When present on product this manual pertains to and indicated by product labelling, the statement "This device complies
with part 15 of the FCC rules" specifies the equipment has been tested and found to comply with the limits for a Class A
digital device, pursuant to Part 15 of the Federal Communications Commission [FCC] Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a
commercial environment.
This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be
required to correct the interference at his own expense.
Extra Components and Materials
The product that this manual pertains to may include extra components and materials that are not essential to its basic
operation, but are necessary to ensure compliance to the product standards required by the United States Federal
Communications Commission, and the European EMC Directive. Modification or removal of these components and/or
materials, is liable to cause non compliance to these standards, and in doing so invalidate the user’s right to operate this
equipment in a Class A industrial environment.

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Table of Contents
1.0 PREFACE...........................................................................................................................1
1.1 User Manual Purpose ......................................................................................................1
1.2 DAG 3.7T Card Product Description.............................................................................. 2
1.3 DAG 3.7T Architecture................................................................................................... 2
1.4 DAG 3.7T Card Extended Functions .............................................................................. 3
1.5 DAG 3.7T Card System Requirements...........................................................................3
2.0 INSTALLING DAG 3.7T CARD .....................................................................................5
2.1 Installation of Operating System and Endace Software.................................................. 5
2.2 Insert DAG 3.7T Card into PC........................................................................................ 5
2.3 DAG 3.7T Card Port Connectors .................................................................................... 6
3.0 CONFIDENCE TESTING................................................................................................7
3.1 Interpreting DAG 3.7T Card LED Status .......................................................................7
3.2 DAG 3.7T Card LED Display Functions........................................................................8
3.3 DAG 3.7T Card Capture Sessions ..................................................................................8
3.4 Configuration in WYSYCC Style.................................................................................10
3.4.1 Card E1/T1 Mode Configuration ............................................................................ 11
3.4.2 Configuring Card for Other Options....................................................................... 11
3.4.3 Change Card Individual Port Settings..................................................................... 12
3.5 Configuration Options Supported ................................................................................. 12
3.6 Inspect Interface Statistics............................................................................................. 15
3.7 Configuring HDLC Channels .......................................................................................16
3.7.1 Configuring DAG 3.7T Card for Receive and Transmit ........................................ 17
3.7.2 Timeslot Connection ['c'] ........................................................................................ 17
3.7.3 Delete Connection ['d']............................................................................................ 17
3.7.4 Hyper-channel Connection ['h'] .............................................................................. 17
3.7.5 Line Connection ['l']................................................................................................ 18
3.7.6 RAW Connection ['r'] .............................................................................................18
3.7.7 Sub-channel Connection ['s'] ..................................................................................18
3.8 Configuring HDLC RAW Connections ........................................................................ 19
3.8.1 Line RAW Connection ['lr'].................................................................................... 20
3.8.2 Channel RAW Connection ['cr'] ............................................................................. 20
3.8.3 Hyper-channel RAW Connection ['hr']................................................................... 20
3.8.4 Sub-channel Raw Connection ['sr'].........................................................................21
3.9 Configuring ATM Channels .........................................................................................21
3.9.1 Configuring DAG 3.7T Card for Receive and Transmit ........................................ 22
3.9.2 Timeslot Connection ['c'] ........................................................................................ 22
3.9.3 Delete Connection ['d']............................................................................................ 22
3.9.4 Hyper-channel Connection ['h'] .............................................................................. 23
3.9.5 Line Connection ['l']................................................................................................ 23
3.9.6 Sub-channel Connection ['s'] ..................................................................................23
3.10 Reporting Problems..................................................................................................... 25
4.0 RUNNING DATA CAPTURE SOFTWARE................................................................26
4.1 Set Capture Session....................................................................................................... 26
4.2 High Load Performance ................................................................................................27
5.0 SYNCHRONIZING CLOCK TIME..............................................................................29
5.1 Configuration Tool Usage............................................................................................. 30
5.2 Time Synchronization Configurations .......................................................................... 30
5.2.1 Single Card no Reference Time Synchronization................................................... 31

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5.2.2 Two Cards no Reference Time Synchronization .................................................... 31
5.2.3 Card with Reference Time Synchronization...........................................................32
5.3 Synchronization Connector Pin-outs............................................................................. 33
6.0 DATA FORMATS OVERVIEW....................................................................................35
6.1 Data Formats ................................................................................................................. 35
6.1.1 Generic Variable Length Record ............................................................................ 35
6.1.2 Type 5 Multi-channel HDLC Frame Record .......................................................... 37
6.1.3 Type 6 Multi-channel RAW Link Data Record...................................................... 38
6.1.4 Type 7 Multi-channel ATM Cell Record................................................................ 39
6.1.5 Type 8 Multi-channel RAW Link Data Record...................................................... 40
6.2 Timestamps ................................................................................................................... 41

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1.0 PREFACE
Introduction The installation of the Endace DAG 3.7T card on a PC begins with
installing the operating system and the Endace software. This is followed
by fitting the card and connecting the ports.
The installation process will also include confidence testing of the DAG
3.7T 16-interface T1/E1 HDLC/ATM PCI cards.
Viewing this
document This document, DAG 4.2GE Card User Manual is available on the
installation CD.
In this chapter This chapter covers the following sections of information.
•User Manual Purpose
•DAG 3.7T Card Product Description
•DAG 3.7T Architecture
•DAG 3.7T Card Extended Functions
•DAG 3.7T Card System Requirements
1.1 User Manual Purpose
Description The purpose of the DAG 3.7T Card User Manual is to identify and
explain:
•Installing DAG 3.7T Card
•Confidence Testing
•Running Data Capture Software
•Synchronizing Clock Time
•Data Formats Overview
Pre-requisite This document presumes the DAG card is being installed in a PC already
configured with an operating system.
A copy of the Debian Linux 3.1 (Sarge) is available as a bootable ISO
image on one of the CD's shipped with the DAG card.
To install on the Linux/FreeBSD operating system, follow the instructions
in the document EDM04.05-01r1 Linux FreeBSD Installation Manual,
packaged in the CD shipped with the DAG card.
To install on a Windows operating system, follow the instructions in the
document EDM04.05-02r1 Windows Installation Manual, packaged in the
CD shipped with the DAG card.

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1.2 DAG 3.7T Card Product Description
Description The DAG 3.7T cards are PCI bus cards designed for cell and packet
capture and generation on telecommunication networks. The card's key
features include:
•16 T1 or E1 Network Interfaces
•A Spartan III FPGA supporting high-performance Endace Firmware
•An Intel XScale IO Processor
•Support for receiving and sending Channelised, Unchannelised, and
Fractional T1/E1, HDLC and non-HDLC data traffic.
•Support for data traffic filtering.
Figure Figure 1-1 shows the DAG 3.7T Card.
Figure 1-1. DAG 3.7T Card.
1.3 DAG 3.7T Architecture
Description The TDM T1 or E1 data is received by the 16 RJ45 interfaces, and passed
through line interface units. The data is then fed immediately into the
FPGA for deframing and demapping into HDLC frames.
This FPGA contains an Ethernet processor and the DUCK timestamp
engine. Because of component close association, packets or cells are
time-stamped accurately. Time stamped packet records are then stored in
the lower FIFO.
Continued on next page

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1.3 DAG 3.7T Architecture, continued
Figure Figure 1-2 shows the DAG 3.7T Card major components and data flow.
Figure 1-2. DAG 3.7T Card Major Components and Data Flow.
1.4 DAG 3.7T Card Extended Functions
Description The DAG 3.7T functionality can be extended in many ways.
A physical transmit path is provided on the DAG 3.7T card. Special
FPGA images are required in order to enable the transmit function.
Contact the Endace customer support team at [email protected] to
enable effective use of extended functions.
1.5 DAG 3.7T Card System Requirements
Description The DAG 3.7T card and associated data capture system minimum
operating requirements are:
•PC, at least Intel Xeon 1.4GHz or faster
•256 MB RAM
•At least one free PCI 2.1 slot supporting 33MHz operation
•Software distribution free space of 30MB
Operating
system For convenience, the Debian 3.1 [Sarge] Linux system is included on the
Endace Software Install CD. Endace currently supports Windows XP,
Windows Server 2000, Windows Server 2003, FreeBSD, RHEL 3.0, and
Debian Linux operating systems.
Different
system For advice on using a system substantially different from that specified
above, contact Endace support at [email protected]

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2.0 INSTALLING DAG 3.7T CARD
Introduction A DAG 3.7T card can be installed in any free PCI slot. It is 5V tolerant
and operates only in 32-bit 33MHz PCI mode.
If placed into a slot rated for higher speeds the bus will automatically
change to 33MHz, including any other devices sharing the bus.
Multiple DAG 3.7T cards can be run on one bus. By default, the driver
supports up to four DAG cards in one system.
In this chapter This chapter covers the following sections of information.
•Installation of Operating System and Endace Software
•Insert DAG 3.7T Card into PC
•DAG 3.7T Card Port Connectors
2.1 Installation of Operating System and Endace Software
Description If the DAG device driver is not installed, before proceeding with the next
chapter, install the software by following the instructions in the
appropriate Endace Software Installation Manual.
Go to the next chapter of information when the DAG device driver is
installed.
2.2 Insert DAG 3.7T Card into PC
Description Inserting the DAG 3.7T card into a PC involves accessing the PCI bus
slot, fitting the card, and replacing bus slot screw.
Procedure Follow these steps to insert the DAG 3.7T card.
Step 1. Access bus Slot
Power computer down.
Remove PCI bus slot cover.
Step 2. Fit Card
Insert DAG 3.7T card into PCI bus slot.
Step 3. Replace bus Slot Screw
Secure card with screw.
Step 4. Power Up Computer
Continued on next page

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2.3 DAG 3.7T Card Port Connectors
Description There is one VHDCI connector on the PCI bracket, and there is also a
VHDCI connector on the DAG 3.7T board itself.
The connector on the board allows a DAG 3.7T Pod to be used internally
in a PC chassis in a spare 5.25 inch drive bay.
Use the connector on the bracket if the POD is to be used outside of the
chassis Only one Pod may be connected to the DAG 3.7T card at a time.
Connector
pin-out The DAG 3.7T Pod has the 16 RJ45 T1/E1 connectors. The pin-out is:
1 -
2 -
3 TX Ring
4 TX Tip
5 RX Ring
6 Rx Tip
7 -
8 -

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3.0 CONFIDENCE TESTING
Introduction The confidence testing is a process to determine the DAG 3.7T card is
functioning correctly.
The process also involves a card capture session, and demonstrates
configuration in the style of 'What You See You Can Change'.
Interface statistics are also inspected during this process.
In this chapter This chapter covers the following sections of information.
•Interpreting DAG 3.7T Card LED Status
•DAG 3.7T Card LED Display Functions
•DAG 3.7T Card Capture Sessions
•Configuration in WYSYCC Style
•Configuration Options Supported
•Inspect Interface Statistics
•Configuring HDLC Channels
•Configuring HDLC RAW Connections
•Configuring ATM Channels
•Reporting Problems
3.1 Interpreting DAG 3.7T Card LED Status
Description The DAG 3.7T has 4 status LEDs with one blue, one red, one orange and
one green.
On the DAG 3.7T card the blue LED 1 for example displays when the
FPGA is successfully programmed.
Figure Figure 3-1 shows the DAG 3.7T card status LEDs.
Figure 3-1. DAG 3.7T Card Status LEDs.

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3.2 DAG 3.7T Card LED Display Functions
Description The DAG 3.7T LED display functions indicate a number of process
conditions. When the card is powered the blue LED 1 should be lit.
Figure Figure 3-2 shows the DAG 3.7T card without network connections.
Figure 3-2. DAG 3.7T Card without Network Connections.
LED definitions The following table describes the LED display definitions:
LED Description
FPGA successfully programmed
LED 1
LED 2 Data capture in progress
LED 3 PPS Out: Pulse Per Second Out – indicates the card is
sending a clock synchronization signal
LED 4 PPS In: Pulse Per Second In – indicates the card is receiving
an external clock synchronization signal
NOTE: The LED 4 is on when the Loss of Pointer or Loss of Framing
conditions are true.
3.3 DAG 3.7T Card Capture Sessions
Description The DAG 3.7T uses two integrated Exar Octal T1/E1 Framers which
enable support for both T1 and E1 interfaces. They also enable soft
configuration of the line termination and gain, and physical layer
configuration such as the selection of B8ZS or AMI zero code suppression
options.
Because of its flexibility, the correct link layer configuration needs to be
supplied to the card to function as expected.
For both configuration and statistics of the DAG 3.7T framers the dagthree
tool is supplied. Calling dagthree without arguments will list the current
settings. dagthree -h will print a help listing on the usage of the tool.
Continued on next page

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3.3 DAG 3.7T Card Capture Sessions, continued
Procedure Follow these steps for the DAG 3.7T card capture session.
Step 1. Connect Pod
Connect the Pod to the DAG 3.7T using the supplied 68-pin VHDCI
connector.
Step 2. Connect Integrated Exar Octal T1/E1 Framers
Using a correctly wired connector, connect the T1 or E1 line to an RJ45
socket on the Pod.
NOTE: Up to 16 lines can be connected.
Step 3 Check FPGA Images
Before starting to configure the card, make sure the most recent pair of
FPGA images has been loaded onto the card. Load the newest available
PCI FPGA image.
For HDLC capture:
dag@endace:~$ dagrom -rvp –d dag0 -f xilinx/dag37tpci-hdlc-erf.bit
For ATM capture:
dag@endace:~$ dagrom -rvp –d dag0 -f xilinx/dag37tpci-atm-erf.bit
Step 4. Configure DAG 3.7T Card
Configure the card according to local settings.
Check through the physical layer statistics that the card has frame
synchronization and is locked to the T1 or E1 links.
Step 5. Display Card Configuration
Run the dagthree tool without arguments to display the card
configuration.
Continued on next page

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3.3 DAG 3.7T Card Capture Sessions, continued
Procedure,continued
dag@endace:~$ dagthree -d dag0
links 0-7 noreset E1
links 8-15 noreset E1
link 0 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 1 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 2 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 3 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 4 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 5 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 6 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 7 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 8 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 9 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 10 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 11 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 12 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 13 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 14 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
link 15 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 E1
pci 33MHz 32-bit buf=32MB rxstreams=1 txstreams=1 mem=32:0
3.4 Configuration in WYSYCC Style
Description Configuration in WYSYCC is the 'What You See You Can Change' style.
Configuration includes E1 Mode, other options, and individual port
settings.
Running the command dagthree alone shows the current configuration.
In this section This section covers the following topics of information.
•Card E1/T1 Mode Configuration
•Configuring Card for Other Options
•Change Card Individual Port Settings

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3.4.1 Card E1/T1 Mode Configuration
Description If the DAG 3.7T card is configured for E1 mode, and T1 is required, type:
dag@endace:~$ dagthree -d dag0 T1
links 0-7 noreset T1
links 8-15 noreset T1
link 0 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 1 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 2 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 3 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 4 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 5 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 6 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 7 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 8 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 9 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 10 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 11 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 12 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 13 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 14 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 15 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
pci 33MHz 32-bit buf=32MB rxstreams=1 txstreams=1 mem=32:0
3.4.2 Configuring Card for Other Options
Description For other DAG 3.7T card configuration options, removing or adding the
"no" prefix will change the setting:
dag@endace:~$ dagthree -d dag0 noeql
links 0-7 noreset T1
links 8-15 noreset T1
link 0 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 1 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 2 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 3 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 4 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 5 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 6 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 7 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 8 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 9 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 10 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 11 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 12 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 13 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 14 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 15 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
pci 33MHz 32-bit buf=32MB rxstreams=1 txstreams=1 mem=32:0

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3.4.3 Change Card Individual Port Settings
Description To change an individual port settings for the DAG 3.7T card, the
“link=<port>” option is used:
dag@endace:~$ dagthree -d dag0 link=0 term100 link=2 eql
links 0-7 noreset T1
links 8-15 noreset T1
link 0 mode=29 rxpkts txpkts nofcl noeql term100 b8zs/hdb3 T1 ESF
link 1 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 2 mode=29 rxpkts txpkts nofcl eql term120 b8zs/hdb3 T1 ESF
link 3 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 4 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 5 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 6 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 7 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 8 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 9 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 10 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 11 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 12 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 13 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 14 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
link 15 mode=29 rxpkts txpkts nofcl noeql term120 b8zs/hdb3 T1 ESF
pci 33MHz 32-bit buf=32MB rxstreams=1 txstreams=1 mem=32:0
3.5 Configuration Options Supported
Description The following is the complete list of configuration options supported.
link=<port> configure a specific line. <link> = {0 to 15}
default set line(s) to default E1, mode 0
e1 set line(s) to E1
e1_crc set line(s) to E1 CRC
t1_esf set line(s) to T1 ESF
t1_sf set line(s) to T1 D4 SF
t1 set line(s) to T1 ESF
termext line is externally terminated (for monitoring)
term75 enable 75 ohm termination
term100 enable 100 ohm termination
term120
enable 120 ohm termination
b8zs enable B8ZS/HDB3 zero code suppression
Ami enable AMI (disable B8ZS/HDB3) (un)set HDB3 zero
code suppression (E1)
Clear clear framer status
Reset reset framer
mode=<mode> set EXAR line mode
[no]fcl (un)set facility loopback
[no]eql (un)set equipment Loopback
mem=X:Y configure memory allocated to streams 0,1, …
Rxonly assign all buffer memory to receive streams.
Txonly assign all buffer memory to transmit streams.
Rxtx assign buffer memory to transmit and receive streams.
Continued on next page

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3.5 Configuration Options Supported, continued
Process The following is the complete list of EXAR line modes.Mode is defined by
the following parameters:
Process Description
Physical line E1 or T1
Signal attenuation < -15dB (short haul), < -36dB (long haul) or < -
43dB (extended long haul)
Transmit power In T1 there a different recommendations for pulse
depending of distance between equipment
(transmitter -> receiver).
Because a user is not usually transmitting traffic,
there is little to be concerned about with Transmit
LBO.
Cabling There is two options in E1:
•75ohm unbalanced coaxial cable or,
•120ohm balanced twisted pair.
In T1 only standard is 100ohm balanced
twisted pair.
Coding T1 coding is B8ZS which is called HDB3 in E1.
This is not relevant because dagthree can set
coding separately to ami or b8zs/hdb3.
Example If there is a twisted pair E1 line to be monitored,
the mode 29 can be used, which is the minimum
gain control value (signal attenuated less than
15dB).
If dagthree reports a poor signal, an increase to
amplifying can be tried by setting mode to 25
(long haul/36dB) or even to 27 (extended long
haul/43dB).
A user should try to use lowest possible gain
control value (eg. start with short haul) because if
signal is amplified too much it easily creates
signal errors.
Continued on next page

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EDM01.05-12r1 DAG 3.7T Card User Manual
Copyright, all rights reserved. 14 Version 6. 22 September 2005.
3.5 Configuration Options Supported, continued
Process, continued
Mode Type Transmit LBO Cable Coding
0 T1 Long Haul/36dB 0dB 100Ω/ TP B8ZS
1 T1 Long Haul/36dB -7.5dB 100Ω/ TP B8ZS
2 T1 Long Haul/36dB -15dB 100Ω/ TP B8ZS
3 T1 Long Haul/36dB -22.5dB 100Ω/ TP B8ZS
4 T1 Long Haul/45dB 0dB 100Ω/ TP B8ZS
5 T1 Long Haul/45dB -7.5dB 100Ω/ TP B8ZS
6 T1 Long Haul/45dB -15dB 100Ω/ TP B8ZS
7 T1 Long Haul/45dB -22.5dB 100Ω/ TP B8ZS
8 T1 Short Haul/15dB 0-133 ft./ 0.6dB 100Ω/ TP B8ZS
9 T1 Short Haul/15dB 133-266 ft./ 1.2dB 100Ω/ TP B8ZS
10 T1 Short Haul/15dB 266-399 ft./ 1.8dB 100Ω/ TP B8ZS
11 T1 Short Haul/15dB 399-533 ft./ 2.4dB 100Ω/ TP B8ZS
12 T1 Short Haul/15dB 533-655 ft./ 3.0dB 100Ω/ TP B8ZS
13 T1 Short Haul/15dB Arbitrary Pulse 100Ω/ TP B8ZS
14 T1 Gain Mode/29dB 0-133 ft./ 0.6dB 100Ω/ TP B8ZS
15 T1 Gain Mode/29dB 133-266 ft./ 1.2dB 100Ω/ TP B8ZS
16 T1 Gain Mode/29dB 266-399 ft./ 1.8dB 100Ω/ TP B8ZS
17 T1 Gain Mode/29dB 399-533 ft./ 2.4dB 100Ω/ TP B8ZS
18 T1 Gain Mode/29dB 533-655 ft./ 3.0dB 100Ω/ TP B8ZS
19 T1 Gain Mode/29dB Arbitrary Pulse 100Ω/ TP B8ZS
20 T1 Gain Mode/29dB 0dB 100Ω/ TP B8ZS
21 T1 Gain Mode/29dB -7.5dB 100Ω/ TP B8ZS
22 T1 Gain Mode/29dB -15dB 100Ω/ TP B8ZS
23 T1 Gain Mode/29dB -22.5dB 100Ω/ TP B8ZS
24 E1 Long Haul/36dB ITU G.703/Arbitrary 75Ω/ Coax HDB3
25 E1 Long Haul/36dB ITU G.703/Arbitrary 120Ω/ TP HDB3
26 E1 Long Haul/43dB ITU G.703/Arbitrary 75Ω/ Coax HDB3
27 E1 Long Haul/43dB ITU G.703/Arbitrary 120Ω/ TP HDB3
28 E1 Short Haul ITU G.703/Arbitrary 75Ω/ Coax HDB3
29 E1 Short Haul ITU G.703/Arbitrary 120Ω/ TP HDB3
30 E1 Gain Mode ITU G.703/Arbitrary 75Ω/ Coax HDB3
31 E1 Gain Mode ITU G.703/Arbitrary 120Ω/ TP HDB3

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3.6 Inspect Interface Statistics
Description Once the card has been configured as expected, the interface statistics
should be inspected to see if the interfaces are locked to the data stream.
dag@endace:~$ dagthree -d dag0 –si
if los ais lcv fls dmo clos - rx0 rx1 tx0 tx1 crc ais ferr up
0 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
1 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
2 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
3 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
4 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
5 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
6 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
7 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
8 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
9 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
10 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
11 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
12 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
13 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
14 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
15 0 0 0 0 0 0 - 1 1 1 1 0 0 0 1
Status bits
display The tool will display a number of status bits as they have occurred since
the last time read. In our example, the interval is set to one second via the -
ioption.
if Number (0-15)
los LIU Loss of signal
ais LIU Alarm Indication Signal
lcv LIU Line code violation
fls LIU FIFO limit status
dmo LIU Drive monitor output
clos LIU Cable loss (dB +/- 1dB)
rx0 Framer ever received 0
rx1 Framer ever received 1
tx0 Framer ever sent 0
tx1 Framer ever sent 1
crc Framer CRC error
ais Framer Alarm Indication Signal
ferr Framer error
up Framer up