Endace DAG 4.5 G2 User manual

DAG 4.5 G2/G4 Card User Guide
EDM01-18

EDM01-18v13 DAG_4.5_G2_G4_Card_User_Guide
©2004 - 2008 Endace Technology Ltd. Confidential - Version 13 - November 2008
Protection Against Harmful Interference
When present on equipment this manual pertains to, the statement "This device complies with part 15 of the FCC
rules" specifies the equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to Part 15 of the Federal Communications Commission [FCC] Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment.
This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in
accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will
be required to correct the interference at their own expense.
Extra Components and Materials
The product that this manual pertains to may include extra components and materials that are not essential to its
basic operation, but are necessary to ensure compliance to the product standards required by the United States
Federal Communications Commission, and the European EMC Directive. Modification or removal of these
components and/or materials, is liable to cause non compliance to these standards, and in doing so invalidate the
user’s right to operate this equipment in a Class A industrial environment.
Disclaimer
Whilst every effort has been made to ensure accuracy, neither Endace Technology Limited nor any employee of
the company, shall be liable on any ground whatsoever to any party in respect of decisions or actions they may
make as a result of using this information.
Endace Technology Limited has taken great effort to verify the accuracy of this manual, but nothing herein should
be construed as a warranty and Endace shall not be liable for technical or editorial errors or omissions contained
herein.
In accordance with the Endace Technology Limited policy of continuing development, the information contained
herein is subject to change without notice.
Website
Copyright 2004 - 2008 Endace Technology Ltd. All rights reserved.
http://www.endace.com
No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any
means electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission of the
Endace Technology Limited.
Endace, the Endace logo, Endace Accelerated, DAG, NinjaBox and NinjaProbe are trademarks or registered
trademarks in New Zealand, or other countries, of Endace Technology Limited. Applied Watch and the Applied
Watch logo are registered trademarks of Applied Watch Technologies LLC in the USA. All other product or
service names are the property of their respective owners. Product and company names used are for identification
purposes only and such use does not imply any agreement between Endace and any named company, or any
sponsorship or endorsement by any named company.
Use of the Endace products described in this document is subject to the Endace Terms of Trade and the Endace
End User License Agreement (EULA).

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©2004 - 2008 Endace Technology Ltd. Confidential - Version 13 - November 2008 i
Contents
Introduction 1
Overview .....................................................................................................................................................................1
Card Features..............................................................................................................................................................1
Purpose of this User Guide ....................................................................................................................................... 2
System Requirements................................................................................................................................................. 2
General ...................................................................................................................................................................2
Operating System ................................................................................................................................................. 2
Other Systems........................................................................................................................................................ 2
Card Description ........................................................................................................................................................ 3
Overview................................................................................................................................................................ 3
Battery removal – don’t do it! .............................................................................................................................4
Card Architecture.......................................................................................................................................................5
DAG 4.5G4............................................................................................................................................................. 5
DAG 4.5G2............................................................................................................................................................. 6
Line Types ................................................................................................................................................................... 7
Supported Line Types .......................................................................................................................................... 7
Extended Functions....................................................................................................................................................8
Data Stream Management ...................................................................................................................................8
Inline Forwarding ................................................................................................................................................. 9
Timed Release TERF (TR-TERF) ......................................................................................................................... 9
Installation 11
Introduction .............................................................................................................................................................. 11
DAG Software package ........................................................................................................................................... 11
Inserting the DAG Card .......................................................................................................................................... 11
Port Connectors ........................................................................................................................................................ 12
DAG 4.5G4 Port Connector ............................................................................................................................... 12
DAG 4.5G2 Port Connector ............................................................................................................................... 12
Pluggable Optical Transceivers .............................................................................................................................. 13
Overview.............................................................................................................................................................. 13
Optical modules .................................................................................................................................................. 13
Power Input ......................................................................................................................................................... 14
Splitter Losses...................................................................................................................................................... 14
Pluggable Copper Transceivers.............................................................................................................................. 14
Configuring the DAG card 15
Introduction .............................................................................................................................................................. 15
Before configuring the DAG card..................................................................................................................... 15
Firmware images ................................................................................................................................................ 15
Setting up the FPGA ................................................................................................................................................ 16
Programming the FPGA .................................................................................................................................... 16
dagrom ................................................................................................................................................................. 17
Loading new firmware images onto a DAG Card ......................................................................................... 18
Preparing the DAG card for use............................................................................................................................. 18
DAG 4.5G2 output .............................................................................................................................................. 18
DAG 4.5G4 output .............................................................................................................................................. 18
Configuring the DAG card...................................................................................................................................... 19
Display Current Configuration......................................................................................................................... 19
dagconfig tokens explained............................................................................................................................... 21
dagconfig options ............................................................................................................................................... 28
Viewing the DAG card status ................................................................................................................................. 29
Interface Status.................................................................................................................................................... 29
Using your DAG card to capture data 31
Introduction .............................................................................................................................................................. 31

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Basic data capture .................................................................................................................................................... 31
Starting a capture session .................................................................................................................................. 31
dagsnap................................................................................................................................................................ 32
Capturing data at high speed ........................................................................................................................... 33
Viewing captured data ............................................................................................................................................ 34
dagbits.................................................................................................................................................................. 34
Converting captured data....................................................................................................................................... 36
Dagconvert .......................................................................................................................................................... 37
Using third party applications ............................................................................................................................... 38
Configuring DSM..................................................................................................................................................... 38
Transmitting captured data.................................................................................................................................... 38
Configuration...................................................................................................................................................... 38
Explicit Packet Transmission ............................................................................................................................ 38
Trace Files............................................................................................................................................................ 39
TR TERF............................................................................................................................................................... 39
Synchronizing Clock Time 43
Overview................................................................................................................................................................... 43
DUCK Configuration............................................................................................................................................... 43
Common Synchronization ...................................................................................................................................... 43
Network Time Protocol........................................................................................................................................... 44
Timestamps............................................................................................................................................................... 45
Example ............................................................................................................................................................... 45
Dagclock .................................................................................................................................................................... 46
Dagclock Statistics reset..................................................................................................................................... 47
Dagclock output explained ............................................................................................................................... 48
Card with Reference ................................................................................................................................................ 50
Overview ............................................................................................................................................................. 50
Pulse Signal from External Source ................................................................................................................... 50
Connecting the Time Distribution Server ....................................................................................................... 50
Testing the Signal ............................................................................................................................................... 50
Single Card No Reference....................................................................................................................................... 51
Two Cards No Reference ........................................................................................................................................ 52
Overview ............................................................................................................................................................. 52
Synchronizing with Each Other ....................................................................................................................... 52
Synchronizing with Host................................................................................................................................... 53
Connector Pin-outs .................................................................................................................................................. 54
Overview ............................................................................................................................................................. 54
Pin Assignments ................................................................................................................................................. 54
Pin Assignments ................................................................................................................................................. 54
4-Pin to RJ45 adapter.......................................................................................................................................... 55
DUCK Crossover cable ...................................................................................................................................... 55
Data Formats 57
Overview................................................................................................................................................................... 57
Generic ERF Header ................................................................................................................................................ 58
ERF 2. TYPE_ETH.................................................................................................................................................... 60
ERF 16. TYPE_DSM_COLOR_ETH....................................................................................................................... 61
Extension Headers (EH).......................................................................................................................................... 62
Introduction ........................................................................................................................................................ 62
Troubleshooting 63
Reporting Problems ................................................................................................................................................. 63
Version History 65

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Introduction
Overview
Note: Unless otherwise specifically stated throughout this User Guide DAG 4.5 card refers
to the DAG 4.5G2 and G4 cards.
The Endace DAG 4.5 card provides the means to transfer data at the full speed from the
network into the memory of the host computer, with zero packet loss in even worst-case
conditions. Further, unlike a Network Interface Card (NIC), Endace products actively
manage the movement of network data into memory while only consuming a minimal
amount of the host computer's resources. The full attention of the CPU remains focused on
the analysis of incoming data without a constant stream of interruptions as new packets
arrive from the network. For a busy network link, this feature has a turbo-charging effect
similar to that of adding a second CPU to the system.
The DAG 4.5 provides independent two or four port Ethernet (copper and optical) network
monitoring at Gigabit speeds and supports header only or variable length capture. It is
capable of transmitting and receiving on each channel simultaneously allowing a single card
to operate inline, monitoring and transmitting in both directions on a full duplex link. It is a
PCIx card.
The DAG 4.5 card is a multi-speed card, capable of speeds of 10/100/1000 Mbps. The speed
of both ends must match. The card auto negotiates the correct speed.
Half Duplex is not supported by this DAG card.
Card Features
The following features are available on this DAG card. Note: Different firmware images
may be required. Not all features are available on each firmware image. For further
information on which feature is available in what firmware image, see Firmware images
15 (page ).
•Ethernet 10/100/1000 (copper and optical)
•DSM
•Timed Release TERF (TR-TERF)

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Purpose of this User Guide
The purpose of this User Guide is to provide you with an understanding of the DAG 4.5 card
architecture, functionality and to guide you through the following:
•Installing the card and associated software and firmware
•Configuring the card for your specific network requirements
•Running a data capture session
•Synchronizing clock time
•Data formats
You can also find additional information relating to functions and features of the DAG 4.5
card in the following documents which are available from the Support section of the Endace
website at http://www.endace.com
•EDM04-01 DAG Software Installation Guide
:
•EDM04-03 dagflood User Manual
•EDM04-04 dagfwddemo User Guide
•EDM04-06 Daggen User Guide
•EDM04-07 dsm-loader User Guide
•EDM04-08 Configuration and Status API Programming Guide
•EDM04-10 Data Stream Management API Programming Guide
•EDM04-19 DAG Programming Guide
•EDM05-01 Time Distribution Server User Guide
•EDM11-01 ERF types
This User Guide and the EDM04-01 DAG Software Installation Guide are also available in PDF
format on the installation CD shipped with your DAG 4.5 card.
System Requirements
General
The minimum system requirements for the DAG 4.5 card are:
•A computer, with at least a Intel Xeon 1.8GHz or faster and a minimum of 1GB RAM.
•At least one free PCI-X slot supporting 66-133 MHz operation.
•Software distribution requires 60MB free space.
•For details of the supported operating systems, see one of the following documents:
•EDM04-01 DAG Software Installation Guide
•Current release notes - See the Documentation CD or the Endace support website
at https://www.endace.com/support
.
Operating System
This document assumes you are installing the DAG 4.5 card in a computer which already has
an operating system installed. To install refer to EDM04-01 DAG Software Installation Guide.
All related documentation is included on the CD shipped with the DAG 4.5 card.
Other Systems
For advice on using an operating system that is substantially different from any of those
specified above, please contact Endace Customer Support at [email protected].

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Card Description
Overview
The DAG 4.5 card provides two or four optical or copper Gigabit Ethernet interfaces. It is
capable of full line rate (1,000Mbps) capture and transmission of Ethernet traffic and is
protocol independent. Full packet capture at line rate allows recording of all header
information and/or payload with a high precision timestamp.
Note: The DAG 4.5G2 card HAS two ports, the DAG 4.5G4 card has four ports.
The key features of the card are:
•Two or four SFP ports for 1000Base-SX or 1000Base-LX optical Ethernet or 1000Base-T
copper Ethernet,
•Header only or variable length capture,
•Full line rate transmit,
•100% capture into host memory at full line rate for IP packets from 48 to 9600 bytes
•Conditioned clock with PPS input and local synchronization capability.
•PCI-X 64-bit 66/100/133 MHz bus interface with 3V signaling.
•Timed Release TERF (TR-TERF)
DAG 4.5G4
The DAG 4.5G4 card is shown below:
Note: Although the DAG 4.5G4 supports full line rate capture or transmit across all four
ports, maximum combined throughput (i.e. simultaneous capture and transmission)
is limited by the bandwidth of the PCI-X.

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DAG 4.5G2
The DAG 4.5G2 card is shown below:
Note: The DAG 4.5G2 card is capable of simultaneous capture and transmission at full line
rate across both ports.
Battery removal – don’t do it!
Removing the battery from a DAG card voids your warranty.
Removing the battery from a DAG card will cause the loss of encryption key used to decode
the DAG card's firmware. Once the encryption key is lost the DAG card must be returned to
Endace for reprogramming.
The battery in this product is expected to last a minimum of 10 years.
Caution
Risk of explosion if the battery is replaced by an incorrect type.
Dispose of used batteries carefully.

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Card Architecture
Serial Ethernet network data received by each 1000Base interface flows directly into the Field
Programmable Gate Array (FPGA).
The FPGA contains the packet processor, PCIx interface logic and the DAG Universal Clock
Kit (DUCK) timestamp engine. The DUCK provides high resolution per-packet timestamps
which can be accurately synchronized.
Note: For further information on the DUCK and time synchronization, see Synchronizing
Clock Time 43(page ) later in this user guide.
Because of component close association, packets are time-stamped accurately. Time stamped
packet records are stored in an external FIFO memory before transmission to the host.
DAG 4.5G4
The diagram below shows the DAG 4.5G4 card's major components and flow of data.

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DAG 4.5G2
The diagram below shows the DAG 4.5G2 card's major components and flow of data.

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Line Types
It is important that you understand the physical characteristics of the network to which you
want to connect. If your configuration settings do not match your network, the DAG 4.5 card
will not function as expected.
There are various Ethernet line speeds and corresponding protocols which are identified
using the IEEE naming convention. Each line speed has a set of requirements associated with
it relating to the type of cable, maximum allowable distance, etc.
Note: If you are unsure about which of the options listed below to apply to your network,
please contact your Network Administrator for further information.
Supported Line Types
The line characteristics supported by the DAG 4.5 card are described below.
Type Description
10Base-T 10 Mbps over two pairs of twisted telephone cable.
100Base-TX 100 Mbps over two pairs of shielded or unshielded twisted Cat 5 copper
cable.
1000Base-T 1000Mbps over four pairs of balanced Cat5 or Cat6 copper cable.
1000Base-LX 1000Mbps over single mode or multi mode fiber optic cable with long
wavelength laser driver (1310nm)
1000Base-SX 1000Mbps over single mode or multi mode fiber optic cable with short
wavelength laser driver (850nm)
Note: For more detailed information regarding Ethernet line types and speeds, please refer
to IEEE Standard 802.3 available from the IEEE website at http://www.ieee.org.

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Extended Functions
Data Stream Management
The DAG 4.5 card supports the Data Stream Manager (DSM) feature. DSM allows you to
drop packets or route them to a particular receive stream based on the packet contents,
physical port and the output of two load balancing algorithms.
The DSM logic is implemented in firmware on the DAG 4.5 card and does not require
intervention from the host CPU once it is configured.
Note: The DAG 4.5G4 has four ports but only has two receive streams. This means that it
is only possible to map two of the physical ports to corresponding streams.
Note: For detailed information on using the Data Stream Manager please refer to EDM04-
10 Data Stream Management API Programming Guide and EDM04-07 dsm-loader User
Guide available from the support section of the Endace website at
http://www.endace.com
Filter / Load Balancing Block
.
Packets are received from the line and stamped with an ERF header, then passed to the filter
and load balancing block. The filter block applies eight bit-mask filters simultaneously from
the start of the packet, producing a single true/false value for each filter (64 bytes).
The load balancing block applies two algorithms to the packet data, also producing one
true/false Boolean output per algorithm.
Lookup Table Block
The lookup table accepts the filter and load balancing outputs. It also receives the physical
port the packet arrived on and calculates a classification (also known as color) for the packet.
Colorizer and Drop Block
The color is then passed to the Colorizer And Drop (CAD) block to check if the packet should
be dropped. If not the color is inserted into the packet ERF record header and the packet
record is passed to the packet steering module.
Packet Steering Module
The Packet steering module looks at the color information contained in the record and
determines which receive stream the record should be routed to.

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Inline Forwarding
The DAG 4.5 card supports inline forwarding which enables the card to receive and transmit
packets directly from a single memory. This allows you to forward packets from the DAG
card receive interface(s) to the DAG cards transmit interface(s) without the requirement to
copy them. Using inline forwarding you can receive, inspect, filter and forward packets
between ports.
Inline Forwarding
However when using all four ports on the DAG 4.5G4 the maximum throughput may be
limited by the bandwidth of the PCI-X.
dagfwddemo which is a tool supplied with your DAG card demonstrates how you can apply a
user-defined BSD Packet Filter (BPF) to the traffic forwarded by the DAG card. Packets
which match the filter are forwarded, while packets that do not match are dropped.
For more detailed information on inline forwarding and using dagfwddemo please refer to the
EDM04-04 dagfwddemo User Guide available from the support section of the Endace website
at http://www.endace.com
Timed Release TERF (TR-TERF)
.
The Timed Release TERF (TR-TERF) module is a option that enables you to transmit an ERF
stream while reproducing the timestamps of the packets within that stream. It is able to
transmit on all channels.
TR-TERF has two modes of operation. They are:
•No Delay Mode, and
•Relative Timed Release Mode.

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Installation
Introduction
The DAG 4.5 card can be installed in any free PCI-X slot. It operates at 66MHz, 100MHz or
133MHz PCI-X mode but will not operate in PCI slots. Higher speed slots will achieve better
performance.
Although the DAG driver supports up to sixteen DAG cards in one system, the DAG card
makes heavy use of PCIx bus data transfer resources. Therefore bandwidth limitations mean
you should not have more than one card on a single PCIx bus.
DAG Software package
The latest DAG Software package must be installed before you install the DAG 4.5 card itself.
See EDM04-01 DAG Software Installation Guide, which is included on the CD shipped with the
DAG 4.5 card.
Inserting the DAG Card
Caution:
It is very important to protect both the computer and the DAG 4.5 card from
damage by electro-static discharge (ESD). Failure to do so could cause damage to
components and subsequently cause the card to partially or completely fail.
1. Turn power to the computer OFF.
2. Remove the PCIx bus slot screw and cover.
3. Using an approved ESD protection device attach the end with the strap to your wrist
and pull or clip firmly so there is firm contact with your wrist.
4. Securely attach the clip on the other end of the strap to a solid metal area on the
computer chassis as shown below.
5. Insert the DAG 4.5 card into PCIx bus slot ensuring it is firmly seated.
6. If this DAG card requires an external power supply, complete the following steps:
a. Connect the supplied (or equivalent) power cable to the external power connector
on the DAG card.
b. Connect the cable to the appropriate power connector on your server's power
supply unit.
7. Check the free end of the card fits securely into the card-end bracket that supports the
weight of the card.
8. Secure the card with the bus slot cover screw.
9. Turn power to the computer ON.
10. Ensure the blue (FPGA successfully programmed) LED on the DAG card illuminates.

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Port Connectors
DAG 4.5G4 Port Connector
The DAG 4.5G4 card has 4 x SFP socket connectors. Each connector consists of either an
optical fiber or copper transmitter and receiver.
The upper connector of each pair is used for the transmit signal and the bottom connector of
each pair is used for the received signal.
Note: The DAG 4.5G4 supports both optical and copper transceivers.
The DAG 4.5G4 has an 8-pin RJ45 socket located below the optical port connectors on the
card bracket. This socket is available for connection to an external time synchronization
source.
Caution:
Never connect anything other than a PPS input to the time synchronization sockets.
DAG 4.5G2 Port Connector
The DAG 4.5G2 card has 2 x Small Form Factor (SFP) socket connectors. Each connector
consists of an optical fiber or copper transmitter and receiver.
The upper connector of each pair is used for the transmit signal and the bottom connector of
each pair is used for the received signal.
Note: The DAG 4.5G2 supports both optical and copper transceivers.
The DAG 4.5G2 has a 4-pin socket located below the optical port connectors on the card
bracket. This socket is available for connection to an external time synchronization source.
Caution: Never connect anything other than a PPS input to the time synchronization
sockets.

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Pluggable Optical Transceivers
Overview
The DAG 4.5Z2/4.5Z8 card supports industry standard Small Form-factor Pluggable (SFP)
optical transceivers.
The transceivers consist of two parts:
•Mechanical chassis attached to the circuit board
•Transceiver unit which may be inserted into the chassis
Note: You must select the correct transceiver type to match the optical parameters of the
network to which you want to connect. Configuring the card with the wrong
transceiver type may damage the card.
You can connect the transceiver to the network via LC-style optical connectors.
For further information on pluggable optical transceivers please refer to the Endace website
at http://www.endace.com
Optical modules
.
The optical power range depends on the particular SFP module that is fitted to the DAG
4.5Z2/4.5Z8 card. Optics modules are supplied in either Single or Multi mode. See the
following table for details.
Optical power is measured in dBm. This is decibels relative to 1 mW where 10 dB is
equivalent to a factor of 10 in power. A negative optical power value indicates power that is
less than 1 mW. The most sensitive devices can work at power levels down as low as -30dBm
or 1µW.
The DAG 4.5Z2/4.5Z8 card optics power module specification is shown below:
Product
Number Network Support
Receive Characteristics Transmit Characteristics
Wavelength
(nm)
Sensitivity
(dBm)
Wavelength Tx Power
(dBm)
Min Max Min Max (nm) Min Max
TXR-1000SX 1000BASE-SX Multimode 770 860 -20 0 850 -9 -3.5
TXR-1000LX 1000BASE-LX Single mode 1270 1600 -22 0 1310 -9.5 -3
If you are in doubt over the light levels available for the DAG card receive ports, check the
light levels using an optical power meter.
Cover DAG 4.5Z2/4.5Z8 card transmit ports with LC-style plugs to prevent dust and
mechanical hazards damaging optics if not in use.

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Power Input
Note: The optical power input to the DAG card must be within the receiver’s dynamic
range. See the previous table for details. If it is slightly outside of this range it will
cause an increased bit error rate. If it is significantly outside of this range the system
will not be able to lock onto the signal.
When power is above the upper limit the optical receiver saturates and fails to function.
When power is below the lower limit the bit error rate increases until the device is unable to
obtain lock and fails. In extreme cases, excess power can damage the receiver.
When you set up the DAG card you should measure the optical power at the receiver and
ensure that it is within the specified power range. If it is not, adjust the input power as
follows:
•Insert an optical attenuator if power is too high, or
•Change the splitter ratio if power is too high or too low.
Splitter Losses
Splitters have the insertion losses either marked on their packaging or described in their
accompanying documentation. General guidelines are:
•A 50:50 splitter will have an insertion loss of between 3 dB and 4 dB on each output
•90:10 splitter will have losses of about 10 dB in the high loss output, and <2 dB in the
low loss output
Note: Endace recommends that you do not use a combination of single mode and multi
mode fibers and optics modules on the same link, as the quality of the received
signal cannot be guaranteed.
If you have no choice but to mix single mode and multi mode you should be aware
that a single mode input connected to a multi mode fiber will have some attenuation
but may still be acceptable. However a multi mode input connected to a single mode
fiber will likely have large and unpredictable losses.
Pluggable Copper Transceivers
The DAG 4.5 card supports industry standard Small Form-factor pluggable (SFP) copper
transceivers.
The transceivers consist of two parts:
•Mechanical chassis attached to the circuit board
•Transceiver unit which may be inserted into the chassis
Endace recommends that you use Cat6 copper cable. The DAG 4.5Z2/4.5Z8 card copper
module specification is shown below:
Part Type Data Rate
TXR-1000TX 10/100/1000 Base-T >1.25Gbps

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Configuring the DAG card
Introduction
Configuring the DAG 4.5 card ready for capturing data requires the following steps:
•Setting up the FPGA 16(page )
•Preparing the DAG card for use 18(page )
•Configuring the DAG Card 19(page )
•Viewing the DAG card statistics 29(page )
Once the DAG 4.5 is configured you can start capturing data, see Using your DAG card to
capture data 31(page ) for details on capturing data.
Before configuring the DAG card
Before configuring the FPGA, you should ensure that:
•dagmem has been run and memory allocated to each installed DAG card.
•dagload has been run so that all DAG drivers have been installed.
Refer to the Installing the drivers section for the required Operating system in EDM04-01 DAG
Software Installation Guide for the further details.
Firmware images
The following lists the features available on each firmware image available on this DAG card.
FPGA image
(Software version string)
Ethernet
10/100/1000
DSM TR-TERF
dag45g2pcix-dsm.bit
(dag45g2pci_dsm....)
dag45g4pcix-dsm.bit
(dag45g4pci_dsm....)
The software version strings are displayed in the dagconfig output and when using the
dagrom -x command. They include a version number and creation date.

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Setting up the FPGA
All DAG cards have at least one Field-Programmable Gate Array (FPGA). The FPGA
contains the firmware for the DAG card. The firmware defines how the DAG card operates
when capturing data and contains the specific configuration.
Note: Some DAG cards have multiple FPGA's.
For each FPGA there are two firmware images:
•a factory image - contains fixed basic functionality for operating the DAG card.
•a user image - contains an upgradable version of the DAG card firmware. Additional
functionality for the DAG card is available via the user image. Different user images
may be available with different functionality, i.e. TERF, DSM etc.
Firmware images are loaded into DAG card flash ROM in the factory. The image is
programmed into the FPGA each time the DAG card is powered up. The user image can
then be programmed into the FPGA either manually or via a script.
Programming the FPGA
Before configuring the DAG card for capture, you must load and program the DAG card
with the appropriate FPGA image.
Note: For information about the dagrom options, see dagrom 17(page ).
For the DAG 4.5G2 card use:
dagrom -d0 -rvp -f dag45g2pcix-dsm.bit
For the DAG 4.5 G4 card use:
dagrom -d0 -rvp -f dag45g4pcix-dsm.bit
(where "0" is the device number of the DAG card you wish to capture data from). The
filename of the FPGA image may differ from the above depending on the version required.