Freescale Semiconductor LS1043ARDB User manual

1 Introduction
This document describes the LS1043A reference design board
(LS1043ARDB) and hardware kit containing the board. It also
explains the basic board operations in a step-by-step manner.
This document describes the settings required to connect
switches, connectors, jumpers, push buttons, and LEDs to the
peripheral devices.
The LS1043ARDB functions with an integrated development
environment (IDE), such as Freescale CodeWarrior. The
instructions for working with the IDE are beyond the scope of
this document.
The list of items included in the LS1043ARDB hardware kit is
provided with the LS1043ARDB board support package
(BSP). Optional hardware components that are not included in
the LS1043ARDB hardware kit are:
• TDM modules
• PCIe/mini-PCIe cards
• CodeWarrior TAP (CWTAP)
2 Related documentation
The table below lists and explains the additional documents
that you can refer to, for more information about
LS1043ARDB.
Freescale Semiconductor Document Number: LS1043ARDBQS
Quick Start Rev. 1, 11/2015
QorIQ LS1043A Reference Design
Board Quick Start
© 2015 Freescale Semiconductor, Inc.
Contents
1 Introduction.............................. .............................. 1
2 Related documentation............................................1
3 LS1043ARDB system board interface....................2
4 Getting started with LS1043ARDB.... ....................3
5 Switch configurations................... ..........................4
6 Jumper settings......................... .............................. 8
7 Interfaces.................................................................9
8 Connectors.............................................................16
9 Push and slide buttons........................................... 18
10 LED indicators........................... ...........................19
11 Setting up CodeWarrior TAP............. .................. 21
12 LS1043ARDB operating
configurations................................... .................... 22
13 NOR flash memory map........................................24
14 Revision history.................................................... 24

Some of the documents listed below may be available only under a non-disclosure agreement (NDA). To request access to
these documents, contact your local field applications engineer or sales representative.
Table 1. Related documentation
Document Description
QorIQ LS1043A Reference Manual
(LS1043ARM)
Provides a detailed description on the LS1043A multicore processor and its
features, such as memory map, serial interfaces, power supply, chip features,
and clock information
QorIQ LS1043A Data Sheet Contains information on LS1043A pin assignments, electrical characteristics,
hardware design considerations, package information, and ordering information
3 LS1043ARDB system board interface
The figure below shows the front view of the LS1043ARDB.
Figure 1. LS1043ARDB front view
The figure below shows the rear view of the LS1043ARDB.
Figure 2. LS1043ARDB rear view
LS1043ARDB system board interface
QorIQ LS1043A Reference Design Board Quick Start, Rev. 1, 11/2015
2 Freescale Semiconductor, Inc.

4 Getting started with LS1043ARDB
This section describes how to set up and use the LS1043ARDB.
4.1 Prepare board
To ensure correct board setup, prepare the board using the steps below:
1. Verify that the LS1043ARDB hardware kit contains all items mentioned in the kit contents list provided with the
LS1043ARDB packing list.
2. Verify the LS1043ARDB dual inline package (DIP) switch settings. See Switch configurations for details.
3. Verify the LS1043ARDB jumper settings. See Jumper settings for details.
4. Attach the required devices to the LS1043ARDB connectors. See Connectors for details.
5. Optionally, connect the CodeWarrior TAP to the LS1043ARDB. See Setting up CodeWarrior TAP for details.
6. Install the DC power cord from the desktop power supply to the board power inlet.
4.2 Power up and use board
After the system has been properly set up, follow the steps below to power up and use the LS1043ARDB:
1. Turn ON the power switch (SW2).
2. The power LED (D1) on the printed circuit board (PCB) and the left LED (D13) of the chassis become green when the
board is powered up. D3 LED on the PCB remains OFF while the boot code is fetched.
3. Connect the universal serial bus (USB) cable to the mini-USB port in the front panel used for console. You need to
install the USB drivers on the host machine before using the serial terminal. You can download the latest drivers from
https://developer.mbed.org/handbook/Windows-serial-configuration.
4. If you are using the RJ45 port, connect the RJ45 to UART cable to the J4 bottom port and set SW3[3] to OFF.
You will see messages, similar to the ones shown below, on the console window (or in the CodeWarrior IDE, if using
that):
U-Boot 2015.01-00055-g7aba6ad (Nov 19 2015 - 14:46:03)
Clock Configuration:
CPU0(A53):1600 MHz CPU1(A53):1600 MHz CPU2(A53):1600 MHz
CPU3(A53):1600 MHz
Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz
Reset Configuration Word (RCW):
00000000: 08100010 0a000000 00000000 00000000
00000010: 14550002 80004012 e0025000 c1002000
00000020: 00000000 00000000 00000000 00038800
00000030: 00000000 00001101 00000096 00000001
Board: LS1043ARDB, boot from vBank 0
CPLD: V1.4
PCBA: V2.0
SERDES Reference Clocks:
SD1_CLK1 = 156.25MHZ, SD1_CLK2 = 100.00 MHz
I2C: ready
DRAM: 2 GiB (DDR4, 32-bit, CL=12, ECC off)
Waking secondary cores to start from fff2a000
All (4) cores are up.
Getting started with LS1043ARDB
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Using SERDES1 Protocol: 5205 (0x1455)
fman_port_enet_if:71: port(FM1_DTSEC3) is OK
fman_port_enet_if:77: port(FM1_DTSEC4) is OK
Flash: 128 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
EEPROM: NXID v1
PCIe1: disabled
PCIe2: Root Complex no link, regs @ 0x3500000
PCIe3: Root Complex no link, regs @ 0x3600000
In: serial
Out: serial
Err: serial
Net: Fman1: Uploading microcode version 108.4.15
FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5, FM1@DTSEC6, FM1@TGEC1
Hit any key to stop autoboot: 0
=>
NOTE
U-Boot is updated frequently; therefore, the details given above may change slightly over
a period of time.
4.3 Restart board
To restart or reset the system, use the reset button next to the UART port (RJ45 without LED).
5 Switch configurations
In the LS1043ARDB, the configuration switches are arranged along the edge of the board. Use the following figure as a
reference.
SW5 SW4 SW3
Figure 3. DIP switch locations
With the board positioned as shown above, switches read "SW5 SW4 SW3" moving from left to right. For these types of DIP
switches:
•When a switch is up (OFF), the value is 0
• When a switch is down (ON), the value is 1
Switch configurations
QorIQ LS1043A Reference Design Board Quick Start, Rev. 1, 11/2015
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5.1 SW3 configuration
The figure below shows the SW3 switch on the LS1043ARDB.
CLKGEN_FS0
1 2 3 4 5 6 7 8
CLKGEN_FS1
UART_SEL
SD1REFCLK_SEL
EVDD_SEL
OPENSDA_EN
TDMCLK_SD/USB
SDHC_SPICS_SEL
ON '1'
Figure 4. SW3 switch
The table below describes the SW3 configuration.
Table 2. SW3 configuration
Switch Name Description ON (1) / OFF (0) setting
SW3[1] CLKGEN_FS0 SYSCLK frequency select
•00: 66.66 MHz
• 01: 80 MHz
• 10: 100 MHz (default value)
• 11: 83 MHz
1
SW3[2] CLKGEN_FS1 0
SW3[3] UART_SEL UART1 output select
•0: RJ45, J4 lower one
• 1: CMSISDAP, mini-USB port (default
value)
1
SW3[4] SD1REFCLK_SEL SD1 REFCLK select
•0: 100 MHz (default value for the
LS1021A interposer)
• 1: 156.25 MHz (default value for the
LS1043A processor)
1
SW3[5] EVDD_SEL EVDD voltage select
• 0: 3.3 V (default value)
• 1: 1.8 V
0
Table continues on the next page...
Switch configurations
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Table 2. SW3 configuration (continued)
Switch Name Description ON (1) / OFF (0) setting
SW3[6] OPENSDA_EN CMSISDAP JTAG forced disable
• 0: JTAG can be used by header or
CMSISDAP (default value)
• 1: CMSISDAP JTAG is forced to be
disabled
0
SW3[7] TDMCLK_SDHC/USB TDM CLK or SDHC/USB select
• 0: TDM CLK
• 1: SDHC/USB (default value)
1
SW3[8] SDHC_SPICS SDHC_DAT[4:7] or SPI_CS select
• 0: SDHC
• 1: SPI_CS (default value)
1
5.2 SW4 configuration
The figure below shows the SW4 switch on the LS1043ARDB.
RCW_SRC0
1 2 3 4 5 6 7 8
RCW_SRC1
RCW_SRC6
RCW_SRC7
RCW_SRC2
RCW_SRC3
RCW_SRC4
RCW_SRC5
ON '1'
Figure 5. SW4 switch
The table below describes the SW4 configuration.
Switch configurations
QorIQ LS1043A Reference Design Board Quick Start, Rev. 1, 11/2015
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Table 3. SW4 configuration
Switch Name Description ON (1) / OFF (0) setting
SW4[1] RCW_SRC0 RCW_SRC[0:8] select
• 0_0010_0101: 16-bit NOR (default
value)
• 0_0100_0000: SDHC/eMMC
• 0_1001_1011: Hardcoded RCW
• 1_0000_0110: 8-bit NAND flash, 2 KB
page, 64 pages/block
NOTE: The RCW_SRC field (9 bits) is spread
over SW4 and SW5.
0
SW4[2] RCW_SRC1 0
SW4[3] RCW_SRC2 0
SW4[4] RCW_SRC3 1
SW4[5] RCW_SRC4 0
SW4[6] RCW_SRC5 0
SW4[7] RCW_SRC6 1
SW4[8] RCW_SRC7 0
SW5[1] RCW_SRC8 1
5.3 SW5 configuration
The figure below shows the SW5 switch on the LS1043ARDB.
1 2 3 4 5 6 7 8
CFG_TEST_SEL_B
BANK_SEL0
BANK_SEL1
BANK_SEL2
RCW_SRC8
SYSCLK_SEL
SW_SVR1
SW_SVR0
ON '1'
Figure 6. SW5 switch
The table below describes the SW5 configuration.
Switch configurations
QorIQ LS1043A Reference Design Board Quick Start, Rev. 1, 11/2015
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Table 4. SW5 configuration
Switch Name Description ON (1) / OFF (0) setting
SW5[2] SYSCLK_SEL Differential SYSCLK select
• 0: Differential SYSCLK (default value)
• 1: Single-end system clock
0
SW5[3] CFG_TEST_SEL_B CFG_TEST_SEL for the LS1043A processor
• 0: Disables cores 3 and 4
• 1: Enables all cores (default value)
1
SW5[4] BANK_SEL0 Virtual bank select
• 000: No change (default value)
• 001: Virtual bank #1
• … …
• 111: Virtual bank #7
0
SW5[5] BANK_SEL1 0
SW5[6] BANK_SEL2 0
SW5[7] SW_SVR1 SVR[1:0]
• 00: Reserved (default value for
LS1043A)
0
SW5[8] SW_SVR0 0
6 Jumper settings
The table below lists the factory default jumper settings for the LS1043ARDB.
Table 5. LS1043ARDB jumper settings
Jumper Size Name/function Description
J5 1x2 pin Remote reset • Open: No activity (default value)
• Shorted: Reset the board
J6 1x2 pin Power switch • Open: Power switch is functional
(default value)
• Shorted: Power switch is disabled
J911x3 pin SPICS and SDHC Dat[4:7] voltage
selection
• 1-2 shorted: 1.8 V (default value)
• 2-3 shorted: 3.3 V
J10 1x2 pin FA_VL pin voltage setting • Open: GND
• Shorted: 1.0 V (default value)
J12 1x2 pin PWR_PROG_MTR voltage setting • Open: GND (default value)
• Shorted: 1.8 V
J13 1x2 pin PWR_PROG_SFP voltage setting • Open: GND (default value)
• Shorted: 1.8 V
J14 1x2 pin TA_BB_VDD voltage setting • Open: GND
• Shorted: 1.0 V (default value)
J1511x3 pin SPI bus voltage setting • 1-2 shorted: 1.8 V (default value)
• 2-3 shorted: 3.3 V
J22 1x3 pin External power for power amplifier
(PA) voltage for some Wi-Fi cards
• 1-2 shorted: 3.3 V (default value)
• 2-3 shorted: 5.0 V
1. J9 and J15 only exist on the SCH-28529 Rev. A1 board.
The figure below shows the jumper locations.
Jumper settings
QorIQ LS1043A Reference Design Board Quick Start, Rev. 1, 11/2015
8 Freescale Semiconductor, Inc.

J5
J9
J10
J15
J6
J12
J13
J14
J22
Figure 7. LS1043ARDB jumper locations
7 Interfaces
This section describes the interfaces for the LS1043ARDB.
7.1 UART interfaces
The LS1043ARDB supports two UART interfaces, UART1 and UART2. You can use UART1 as a console port. On the
LS1043ARDB, you can use UART1 in two ways:
Interfaces
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• Route UART1 to the RJ45 connector
• Route UART1 to the CMSISDAP circuit, which can be used on the mini-USB port
SW3[3] is used to select UART1. The figure below shows UART1 connection using the RJ45 connector when SW3[3] is
OFF.
UART1 port
Figure 8. UART1 connection using RJ45 connector
The figure below shows UART1 connection using mini-USB when SW3[3] is ON.
Interfaces
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