Freescale Semiconductor QorIQ T1023 User manual

QorIQ T1023 Reference Design Board
User Guide
Document Number: T1023RDBUG
Rev. 0, 08/2015

QorIQ T1023 Reference Design Board User Guide, Rev. 0, 08/2015
2 Freescale Semiconductor, Inc.

Contents
Section number Title Page
Chapter 1
Overview
1.1 Related documentation....................................................................................................................................................5
1.2 Acronyms and abbreviations...........................................................................................................................................6
1.3 T1023RDB board features.............................................................................................................................................. 7
1.4 Specifications..................................................................................................................................................................9
1.5 T1023RDB-PC board drawings......................................................................................................................................10
Chapter 2
Architecture
2.1 Processor.........................................................................................................................................................................11
2.2 Power.............................................................................................................................................................................. 12
2.3 Reset................................................................................................................................................................................13
2.4 Clocks............................................................................................................................................................................. 14
2.5 Memory interface............................................................................................................................................................14
2.6 Termination.....................................................................................................................................................................15
2.7 SerDes interfaces (PCIe/SGMII/SATA).........................................................................................................................15
2.7.1 PCI Express support...........................................................................................................................................15
2.7.2 SGMII support................................................................................................................................................... 16
2.7.3 SerDes clock...................................................................................................................................................... 16
2.8 EC1 10/100/1000 BaseT interface (ETH1) ....................................................................................................................16
2.9 SerDes lane D 10/100/1000 BaseT interface (ETH2).....................................................................................................17
2.10 SerDes lane B 2.5G BaseT interface (ETH3)................................................................................................................. 17
2.11 Ethernet management......................................................................................................................................................17
2.12 Ethernet ports..................................................................................................................................................................18
2.13 I2C...................................................................................................................................................................................18
2.14 IFC.................................................................................................................................................................................. 20
2.14.1 NOR flash memory............................................................................................................................................ 20
2.14.2 NAND flash memory.........................................................................................................................................21
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Section number Title Page
2.15 eSPI interface..................................................................................................................................................................22
2.16 eSDHC interface............................................................................................................................................................. 22
2.17 GPIO interface................................................................................................................................................................ 23
2.18 Interrupts.........................................................................................................................................................................23
2.19 USB interface..................................................................................................................................................................24
2.20 RS-232............................................................................................................................................................................ 25
2.21 POR configuration.......................................................................................................................................................... 26
2.22 JTAG/COP port.............................................................................................................................................................. 26
2.23 DMA .............................................................................................................................................................................. 28
2.24 Connectors, Headers, Push buttons, and LEDs...............................................................................................................28
2.24.1 Connectors......................................................................................................................................................... 28
2.24.2 Headers...............................................................................................................................................................29
2.24.3 Push buttons....................................................................................................................................................... 30
2.24.4 LEDs.................................................................................................................................................................. 30
2.25 Switch settings................................................................................................................................................................ 31
2.25.1 T1023RDB-PC RCW source configuration (using switches)............................................................................31
2.25.2 Switches configuration options..........................................................................................................................32
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Chapter 1
Overview
The T1023 Reference design board (T1023RDB) is a system featuring QorIQ advanced
multicore processor. It combines two 64-bit ISA Power Architecture processor cores with
high-performance data path acceleration and network and peripheral bus interfaces
required for networking, telecom/datacom, wireless infrastructure, and military/aerospace
application.
This low-cost, high-performance system solution consists of a Printed circuit board
(PCB) assembly and a software Board support package (BSP). This BSP enables the
fastest possible time-to-market for development or integration of applications including
multi-service branch office router, security appliance/UTM and enterprise wireless access
point. This document describes the hardware features of the board including
specifications, block diagram, connectors, interfaces, and hardware straps. It also
describes the board settings and physical connections needed to boot the RDB. Revision
history lists the changes to this document.
When you finish reading this document, you should be familiar with:
• Board layout and its interfaces
• Board configuration options
This document is applicable for PCBA version 700-28530 Rev D and Schematics version
SCH-28530 Rev D.
1.1 Related documentation
The table below lists and explains the additional documents that you can refer to, for
more information about T1023RDB.
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Some of the documents listed below may be available only under a Non-disclosure
agreement (NDA). To request access to these documents, contact your local field
applications engineer or sales representative.
Table 1-1. Useful references
Document Description
QorIQ T1023 Integrated Processor
Reference Manual
Provides a detail description on T1023 QorIQ multicore processor, and on some of its
features like memory map, serial interfaces, power supply, chip features, and clock
information.
QorIQ T1023, T1013 Data Sheet Provides specific data regarding AC, DC electrical specifications, thermal
characteristics, and pin assignments, as well as other design considerations.
1.2 Acronyms and abbreviations
The table below lists and explains the acronyms and abbreviations used in this document.
Table 1-2. Acronyms and abbreviations
Usage Description
COP Common On-chip Processor
CPC CoreNet Platform Cache
CPLD Complex Programmable Logic Device
DIMM Dual In-Line Memory Module
DIP Dual In-Line Package
DIU Display Interface Unit
DMA Direct Memory Access
DPAA Data Path Acceleration Architecture
DRAM Dynamic Random Access Memory
DUT Device Under Test
EC Ethernet Controllers
EDC Error Detection and Correction
EEPROM Electrically Erasable Programmable Read-Only Memory
EMI Ethernet Management Interfaces
eMMC embedded MultiMediaCard
eSDHC enhanced Secure Digital Host Controller
eSPI enhanced Serial Peripheral Interface
FET Field Effect Transistor
HDLC High-level Data Link Control
I2C Inter-Integrated Circuit
IFC Integrated Flash Controller
JTAG Joint Test Action Group
Table continues on the next page...
Acronyms and abbreviations
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Table 1-2. Acronyms and abbreviations (continued)
Usage Description
MPIC Multicore Programmable Interrupt Controller
PCIe/PEX PCI Express
PLD Programmable Logic Device
POR Power On Reset
SATA Serial Advanced Technology Attachment
SD Secure Digital
SDRAM Synchronous Dynamic Random-Access Memory
SDHC Secure Digital High Capacity
SerDes Serializer/Deserializer
SGMII Serial Gigabit Media Independent Interface
SPI Serial Peripheral Interface
SYSCLK System Clock
TDM Time-Division Multiplexing
UART Universal Asynchronous Receiver/Transmitter
VCC Voltage for Circuit
VTT Voltage for Terminal
1.3 T1023RDB board features
The T1023RDB board features are as follows:
• T1023RDB runs at default core frequency 1.2 GHz, platform clock 400 MHz, DDR4
1600 MT/s.
• Memory subsystem:
• 2 GB unbuffered DDR4 SDRAM discrete devices (32-bit bus)
• 128 MB NOR flash single-chip memory
• 512 MB NAND flash memory
• 256 Kbit M24256 I2C EEPROM
• 64 MB SPI memory
• 8 GB eMMC 4.51
• SD/MMC connector to interface with the SD memory card
• Interfaces
• PCIe:
• Lane A: x1 mini-PCIe slot
• Lane C: x1 mini-PCIe slot
• 10/100/1000 BaseT Ethernet ports:
• EC1, RGMII: one 10/100/1000 port with RTL8211FS PHY
Chapter 1 Overview
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• Lane B: 2.5G SGMII port with AQR105 PHY
• Lane D: 1G SGMII port with RTL8211FS PHY
• USB 2.0 port:
• X1 USB2.0 port: connect to a type-A conector
• UART interface:
• UART interface: supports one UART at default 115200 Baud rate for
console display
• RJ-45 connector is used for the UART port
• Board connectors:
• JTAG/COP for T1023 debugging
• Push button for Board Reset
• Remote Reset Header
• Real-time clock on I2C bus
• Boot Source Selection:
• Supports NOR/SD/NAND/SPI boot by the selection of the dip switches
NOTE
Boot from eMMC will be supported in the next SDK
release.
• PoE:
• The power is enabled by default for all the boards. Turn off the power of one
PCIe card, if the external PoE power is not enough.
• PCB
• 6-layer routing (4-layer signals, 2-layer power and ground)
The below figure shows the T1023RDB-PC block diagram.
T1023RDB board features
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PoE Clocking Power POR
Config Reset
64MB SPI FLASH
USB2.0
Type A
RJ-45 RS232
Serial
SD/MMC
eMMC
EEPROM RTC
I2C1 JTAG
COP
RGMII PHY
1G SGMII PHY
2.5GSGMII PHY
Mini PCle Slot2
RJ-45
Mini PCle Slot1
512MB NAND
FLASH
128MB NOR
FLASH
DDR4
2GB
X32
X16
X8
DDR
IFC
SerDes
EC1
SPI
QorlQ
T1023
lane A
laneC
lane B
laneD
X1
X1
X1
X1
RJ-45
RJ-45
Figure 1-1. Block diagram
1.4 Specifications
The table below lists the specifications of the T1023RDB-PC.
Table 1-3. RDB specifications
Characteristics Specifications
Chassis Power requirements Maximum 60 W 12 V AC adapter
Chassis Power requirements 25.5 W If POE is present
Communication processor T1023 cores running at 1400 MHz
Operating temperature 0 °C to 70 °C (room temperature)
Storage temperature –25 °C to 85 °C
Table continues on the next page...
Chapter 1 Overview
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Table 1-3. RDB specifications (continued)
Characteristics Specifications
Relative humidity 5% to 90% (noncondensing)
PCB dimensions:
Length
Width
Thickness
8504 mil (216 mm)
6692 mil (170 mm)
62 mil
1.5 T1023RDB-PC board drawings
The below figure shows the T1023RDB-PC board diagram. The board is 216 mm x 170
mm (8504 mil x 6692 mil).
Figure 1-2. T1023RDB-PC board diagram
T1023RDB-PC board drawings
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