Freescale Semiconductor MPC8313E PowerQUICC II Pro User manual

© Freescale Semiconductor, Inc., 2008. All rights reserved.
Freescale Semiconductor
User’s Guide
The MPC8313E reference design board (RDB) is a system
featuring the PowerQUICC™ II Pro processor, which
includes a built-in security accelerator. This low-cost,
high-performance system solution consists of a printed
circuit board (PCB) assembly plus a software board support
package (BSP) distributed in a CD image. This BSP enables
the fastest possible time-to-market for development or
integration of applications including printer engines,
broadband gateways, no-new-wires home adapters/access
points, and home automation boxes.
This document describes the hardware features of the board
including specifications, block diagram, connectors,
interfaces, and hardware straps. It also describes the board
settings and physical connections needed to boot the
MPC8313E RDB. Finally, it considers the software shipped
with the platform.
When you finish reading this document, you should:
• Be familiar with the board layout
• Understand the default board configuration and your
board configuration options
• Know how to get started and boot the board
• Know about the software and further documentation
that supports the board
Document Number: MPC8313ERDBUG
Rev. 4, 02/2009
Contents
1. MPC8313E RDB Hardware . . . . . . . . . . . . . . . . . . . . 2
2. Board-Level Functions . . . . . . . . . . . . . . . . . . . . . . . . 7
3. Connectors, Jumpers, Switches, and LEDs . . . . . . . 19
4. Micro-Jumper/Resistor Options for eTSEC1 . . . . . . 27
5. MPC8313E RDB Board Configuration . . . . . . . . . . 38
6. Getting Started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
7. MPC8313E RDB Software . . . . . . . . . . . . . . . . . . . . 46
8. Frequently Asked Questions (FAQs) . . . . . . . . . . . . 47
9. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
WARNING
This is a class A product. In a domestic
environmentthisproductmaycauseradio
interference, in which case the user may
be required to take adequate measures.
PowerQUICC™ MPC8313E Reference
Design Board (RDB)

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
2Freescale Semiconductor
MPC8313E RDB Hardware
Use this manual in conjunction with the following documents:
•MPC8313E PowerQUICC™ II Pro Integrated Communications Processor Family Reference
Manual (MPC8313ERM)
•MPC8313E PowerQUICC II Pro Processor Hardware Specifications (MPC8313EEC)
• “Hardware and Layout Design Considerations for DDR Memory Interfaces” (AN2582)
NOTE
The normal function of the product may be disturbed by strong
electromagnetic interference. If so, simply reset the product to resume
normal operation by following the instructions in the manual. If normal
function does not resume, use the product in another location.
This equipment has been tested and found to comply with the limits for a
Class A digital device, pursuant to Part 15 of the FCC Rules. These limits
are designed to provide reasonable protection against harmful interference
when the equipment is operated in a commercial environment. This
equipment generates, uses, and can radiate radio frequency energy. If it is
not installed and used in accordance with the instruction manual, it may
cause harmful interference to radio communications. Operation of this
equipment in a residential area is likely to cause harmful interference, in
which case the user will be required to correct the interference at his or her
own expense.
1 MPC8313E RDB Hardware
This section covers the features, block diagram, specifications, and mechanical data of the MPC8313E
RDB.
1.1 Features
The board features are as follows:
• CPU: Freescale MPC8313E running at 333/166 MHz; CPU/coherent system bus (CSB)
• Memory subsystem:
— 128 Mbyte unbuffered DDR2 SDRAM discrete devices
— 8 Mbyte flash single-chip memory
— 32 Mbyte NAND flash memory
— 256 Kbit M24256 serial EEPROM
— SD connector to interface with the SD memory card in SPI mode
• Interfaces:
— 10/100/1000 BaseT Ethernet ports:
– eTSEC1, RGMII: five 10/100/1000 BaseT RJ-45 interfaces using Vitesse™VSC7385 L2
switch, orselectable one 10/100/1000BaseT RJ-45 interface using Marvell™88E1111 PHY
in REVC board

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
Freescale Semiconductor 3
MPC8313E RDB Hardware
– eTSEC2, selectable RGMII or SGMII: one 10/100/1000 BaseT RJ-45 interface using
Marvell 88E1111 PHY
— USB 2.0 port: high-speed host/device
— USB interface: selectable on-chip PHY or external ULPI PHY interface by SMSC USB3300
USB PHY
— PCI: 32-bit PCI interface running at up to 66 MHz
– One 32-bit 3.3 V PCI slot connected to PCI bus
– One 32-bit 3.3 V miniPCI slot connected to PCI bus
— Dual UART ports:
– DUART interface: supports two UARTs up to 115200 bps for console display
• Board connectors:
— LCD connectors by GPIO
— ATX power supply connector
— JTAG/COP for debugging
• IEEE Std. 1588™ signals for test and measurement
• Real-time clock and thermal sensor on I2C bus
• Programmable LEDs for debug use
• 6-layer PCB routing (4-layer signals, 2-layer power and ground)

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
4Freescale Semiconductor
MPC8313E RDB Hardware
Figure 1 shows the MPC8313E RDB block diagram.
Figure 1. MPC8313E RDB Block Diagram
MPC8313E
eTSEC1 Vitesse
L2 Switch
RGMII/
ULPI/ SMSC
USB PHY
IEEE1588
eTSEC2 Marvell
PHY
RGMII/SGMII
Clock, pulse, etc.
On-Chip
USB
Dual
UART
USB
mini-AB
USB
mini-AB
SPI SD card
33/66 MHz
3.3 V 32-Bit
PCI Slot
3.3 V 32-Bit
miniPCI Slot PCI Bus
System Clock
and USB Clock
128 Mbyte
DDR2
8 Mbyte NOR
Flash Memory
32-Bit DDR2
Bus
32 Mbyte NAND
Flash Memory
LEDs/status
Buffers
16-Bit Local
Bus
DAC for
IEEE1588
Clock (optional)
I2C Bus
Real-Time
Clock
Thermal
Sensor
GPIO
LCD
Connectors
JTAG/COP
Header JTAG/COP
Power Supply
with Low Power
Mode
Test
Points
: selected by resistor options
---NOTE---
EEPROM
Marvell
PHY
RGMII/SGMII

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
Freescale Semiconductor 5
MPC8313E RDB Hardware
1.2 Specifications
Table 1 lists the specifications of the MPC8313E RDB.
Table 1. MPC8313E-RDB Specifications
Characteristics Specifications
Power requirements (without add-on card): Typical Maximum
12 V DC 0A 0 A
5.0 V DC1 mA1.5 A
Communication processor MPC8313E running at 266 MHz
Addressing: Total address range
Flash memory (local bus)
DDR2 SDRAM
4 Gbyte (32 address lines)
8 Mbyte with one chip-select
128 Mbyte DDR2 SDRAM
Operating temperature 0o C to 70o C (room temperature)
Storage temperature –25oC to 85oC
Relative humidity 5% to 90% (noncondensing)
PCB dimensions:
Length
Width
Thickness
6693 mil (REVA and REVB) or 7692 mil (REVC)
6693 mil
62 mil

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
6Freescale Semiconductor
MPC8313E RDB Hardware
1.3 Mechanical Data
Figure 2 shows the MPC8313E RDB REVAx and REVB dimensions (in mil and [mm]). The board
measures 170 mm ×170 mm (6693 mil × 6693 mil) for integration in a mini-ITX chassis.
Figure 2. Dimensions of the MPC8313E RDB (REVAx and REVB)

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
Freescale Semiconductor 7
Board-Level Functions
Figure 3 shows the MPC8313E RDB Rev C dimensions (in mil and [mm]). The board measures
195 mm ×170 mm (7692 mil ×6693 mil).
Figure 3. Dimensions of the MPC8313E RDB (REVC)
2 Board-Level Functions
The board-level functions are reset, external interrupts, clock distribution, DDR SDRAM controller, local
bus controller, I2C interfaces, SD memory card interface, USB interface, eTSEC1 10/100/1000 BaseT
interface, dual RS-232 ports, PCI bus, and COP/JTAG.

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
8Freescale Semiconductor
Board-Level Functions
2.1 Reset and Reset Configurations
The MPC8313E RDB reset module generates a single reset to the MPC8313E and other peripherals on the
board. The reset unit provides power-on reset, hard reset, and soft reset signals in compliance with the
MPC8313E hardware specification.
Figure 4 shows the reset circuitry. Note the following:
• Hard reset is generated either by the COP/JTAG port or the MPC8313E.
• Power-on reset is generated by the Maxim MAX811 device. When MR is deasserted and 3.3 V is
ready, the MAX811 internal timeout guarantees a minimum reset active time of 150 ms before
PORESET is deasserted. This circuitry guarantees a 150 ms PORESET pulse width after 3.3 V
reaches the right voltage level, which meets the specification of the PORESET input of
MPC8313E.
• COP/JTAG port reset provides convenient hard-reset capability for a COP/JTAG controller. The
RESET line is available at the COP/JTAG port connector. The COP/JTAG controller can directly
generate the hard-reset signal by asserting this line low.
• Push button reset interfaces using the MR signal with debounce capability to produce a manual
master reset of the RDB.
• Soft reset is generated by the COP/JTAG port. Assertion of SRESET causes the MPC8313E to
abort all current internal and external transactions and set most registers to their default values.
Figure 4. Reset Circuitry of the MPC8313E
MAX811
3.3 V
MR
Push Button
GND
HRESET from COP
SRESET from COP
TRST from COP
SRESET to MPC8313E
TRST to MPC8313E
PORESET to MPC8313E
NOR FLASH
L2 Switch
MPC8313E
Reset config logic
Marvell PHY

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
Freescale Semiconductor 9
Board-Level Functions
2.2 External Interrupts
Figure 5 shows the external interrupts to the MPC8313E.
Figure 5. MPC8313E Interrupts
The following are descriptions of the interrupt signals shown in Figure 5:
• All external interrupt signals are pulled up by 4.7 KΩ resistors.
•IRQ0is connected to SD Card
•IRQ1is connected to PCI slot INTA.
•IRQ2is connected to and shared by the PCI slot’s INTB and the mini PCI slot INTA.
•IRQ3is connected to the L2 switch as well as to an external USB PHY (by an optional resistor).
•IRQ4is connected to the Marvell GBE PHY as wellas toRTC and LM75 (by an optional resistors).
IRQ0
IRQ2
IRQ3
IRQ4
MPC8313E
SD Card
IRQ1
PCI slot (AD15) INTA
Mini PCI (AD14) INTA and PCI slot (AD15) INTB
L2 Switch and ULPI external USB PHY (optional)
Marvell PHY, RTC (optional) and LM75 (optional)

PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
10 Freescale Semiconductor
Board-Level Functions
2.3 Clock Distribution
Figure 6 and Table 2 show the clock distribution on the MPC8313E RDB.
Figure 6. MPC8313E-RDB Clock Scheme
MPC8313E
LCLKx (NC)
local bus
PLL
DDR
PLL
PCI
DIV
66.666 MHz
OSC
CLKIN
33/66 MHz
33/66 MHz
Mini PCI Slot
PCI Slot
OCCR
2
PCI_SYNC_OUT
PCI_SYNC_IN
System
PLL
M66EN
33/66 MHz
CFG_CLKIN_DIV
NC
48 MHz
OSC
25 MHz
OSC
USB
CLKIN
L2 Switch
GBE PHY GTX_CLK125
SD_REF_CLK
50 MHz OSC/
50 MHz VCXO
IEEE1588
TMR CLK
0
1
2
ULPI USB
GND GND
24 MHz
Crystal
PHY
Real-Time
GND GND
32.768 KHz
Crystal
Clock
DDR2 SDRAM
CLK
MCK
MCK#
133 MHz
PLL
125 MHz
LVDS
OSC
125MHz