Geniatech DB-G2L-V2 User manual

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
DB-G2L-V2 Industrial Development Board hardware manual
Revision History
Draft Date
Revision No.
Description
2023/10/12
V1.0
Initial version.

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
CONTENTS
1 Hardware Introduction ...............................................................................................................................1
2 Software And Hardware Parameters ......................................................................................................... 2
2.1 Hardware Block Diagram .................................................................................................................2
2.2 Development Board Interface Definitions ...................................................................................... 3
2.3 Hardware Parameters ..................................................................................................................... 5
2.4 Peripheral Configuration ................................................................................................................. 6
2.5 Software Parameters .......................................................................................................................7
2.6 Development Information ...............................................................................................................8
3 Electrical Characteristics .............................................................................................................................8
3.1 Operating Environment ...................................................................................................................8
3.2 GPIO DC Characterization ................................................................................................................8
3.3 Power Consumption Parameters .................................................................................................... 9
3.4 Interface Speed ................................................................................................................................9
4 Mechanical Dimensions ............................................................................................................................10
5 Development Board Kit List ......................................................................................................................11
6 Development Board Interface Definitions ............................................................................................... 12
6.1 Power supply connector（J20）.................................................................................................. 15
6.1.1 Pin Definitions .................................................................................................................... 15
6.1.2 Primary conversion circuit ..................................................................................................16
6.1.3 Secondary conversion circuit ............................................................................................. 17
6.2 RECOVERY Key(S1) .........................................................................................................................18
6.2.1 Pin Definitions .................................................................................................................... 18
6.3 Ethernet Interface（J15，J10）...................................................................................................19
6.3.1 Pin Definitions .................................................................................................................... 19
6.3.2 Performance ....................................................................................................................... 22
6.4 USB Interface（JUSB1、J7、J18）.............................................................................................. 22
6.4.1 Pin Definitions .................................................................................................................... 23
6.5 AUDIIO Interface（J6、J3）.........................................................................................................25

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
6.5.1 Pin Definitions .................................................................................................................... 25
6.6 SD Card Interface（J2）............................................................................................................... 26
6.6.1 Pin Definitions .................................................................................................................... 27
6.7 Mini PCIe Interface（J4）.............................................................................................................28
6.7.1 Pin Definitions .................................................................................................................... 28
6.8 GPIO/QSPI/UART/I2C Interface（J1）..........................................................................................33
6.8.1 Pin Definitions .................................................................................................................... 33
6.9 Microphone Interface (MIC1) ........................................................................................................35
6.9.1 Pin Definitions .................................................................................................................... 35
6.10 BOOT Switch ................................................................................................................................ 36
6.10.1 Boot mode description .....................................................................................................36
6.11 JTAG Interface（J5）.................................................................................................................. 37
6.11.1 Pin Definitions .................................................................................................................. 38
6.12 UART Serial Interface（J9、J11）.............................................................................................. 39
6.12.1 Pin Definitions .................................................................................................................. 39
6.13 CAN Interface（J14，J16）........................................................................................................40
6.13.1 Pin Definitions .................................................................................................................. 40
6.14 I2C Touch Panel Interface（J17）.............................................................................................. 41
6.14.1 Pin Definitions .................................................................................................................. 41
6.15 RTC Battery（CG1）................................................................................................................... 42
6.15.1 Pin Definitions .................................................................................................................. 42
6.16 DSI Interface（J24）...................................................................................................................42
6.16.1 Pin Definitions .................................................................................................................. 43
6.17 RGB LCD Interface（J23）.......................................................................................................... 45
6.17.1 Pin Definitions .................................................................................................................. 45
6.18 CSI Camera Interface（J22）......................................................................................................48
6.18.1 Pin Definitions .................................................................................................................. 48
6.19 System Extension Interface（J25）............................................................................................51
6.19.1 Pin Definitions .................................................................................................................. 51

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
6.20 PoE PD 12V Power Supply Output Interface(J19) ....................................................................... 52
6.20.1 Pin Definitions .................................................................................................................. 52
6.21 PoE PD Input Interface(J8) ...........................................................................................................53
6.21.1 Pin Definitions .................................................................................................................. 53
6.22 Core Board Module Interface（J12）........................................................................................ 54
7 Statements ............................................................................................................................................ 54
More Help ....................................................................................................................................................55

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
1
1 Hardware Introduction
DB-G2L-V2 is a high-performance industrial development board based on the industrial-grade
Renesas RZ/G2L dual-core ARM Cortex-A55 + single-core ARM Cortex-M33 heterogeneous multicore
processor design, consisting of a core board and a backplane. the ARM Cortex-A55 main processing unit
clocked at 1.2GHz, integrates the latest high-performance ARM Cortex-A55 main processing unit with
1.2GHz, integrated with the latest high-performance CPU and GPU, and also adopts a security island
with Cortex-R5 dual-core lock-step mode, which can be applied to scenarios with stringent requirements
on security performance.
The development board is rich in interface resources, leading to a dual-channel network port, 2x
CAN-bus, 3x USB2.0, multiple serial ports, on-board USB WiFi module, support for 4G module, while
leading to MIPI LCD, CAMERA, RGB LCD, LINE IN, LINE OUT, MIC IN and other audio and video
multimedia interfaces, so that the user can quickly carry out the evaluation of product solutions and
technology pre-research. and technology pre-study.
Development board front view

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
2
Development board side view
2 Software And Hardware Parameters
2.1 Hardware Block Diagram
Development board hardware block diagram

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
3
2.2 Development Board Interface Definitions

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
4
Development board interface definition diagram
No.
Label
Functional Description
Remark
1
J20
DC Power Interface
1x 12V input power connector for 5.5mm OD, 2.1mm ID power plugs
2
S1
RECOVER Key
Access to the system burn-in button
3
J15
Ethernet-2
RJ45 ethernet-2 interface
4
J10
Ethernet-1
RJ45 ethernet-1 interface (PoE PD support, optional)
5
JUSB1
USB2.0
1x USB2.0 HOST(USB2 HUB) Type A lower level
1x USB2.0 OTG Type A upper level
Remarks:After the USB_B bus i s expanded with four signals through the USB2.0
HUB, one of the signals is led out directly.
USB_A bus direct lead
6
J6
SPK
1x 4PinWhite Terminal Block, 2.0mm Spacing
7
J3
Audio
1x LINE OUT+MIC IN connector, 3.5mm audio cradle
8
J2
Micro SD
1x Micro SD card slot

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
5
9
J8
PoE PD Input
1x 4Pin Black Row Holder, 2.0mm Spacing
10
J4
4G
1x Mini PCIe connected via USB2.0 HUB
11
J13
SOM-G2L-OSM Core boards
1x 662Pin LGA
12
J1
EXPORT
1x EXPORT Expansion Connector, 2x20pin Pin Header, 2.0mm Pitch
13
MIC1
MIC
1x 2Pin white terminal block, 2.0mm spacing
14
J5
JTAG
2x 5Pin header，2.54mm spacing
15
SW1
BOOT SET
1x 2bit boot mode selection dip switch
16
J7
USB2.0 touch screen interface
1x 4Pin white terminal block, 2.0mm spacing
17
J9
UART
1x 4Pin white terminal block, 2.0mm spacing
18
J11
Debut
1x 4Pin white terminal block, 2.0mm spacing
19
J14
CAN-FD-1
1x 4Pin white terminal block, 2.0mm spacing
20
J16
CAN-FD-2
1x 4Pin white terminal block, 2.0mm spacing
21
J17
Capacitive Touch Screen Interface
1x 6Pin FFC connector, 0.5mm spacing
22
J18
USB WiFi
1x 4Pin Pin Array, 2.0mm Spacing Connects via USB2.0 HOST
23
J24
MIPI LCD interface
1x 40Pin FFC Connector, 0.5mm Spacing
24
J23
RGB LCD interface
1x 40Pin FFC Connector, 0.5mm Spacing
25
J22
CAMERA
1x 30Pin FFC Connector, 0.5mm Spacing
26
J19
PoE PD Output
1x 5Pin Black Row Holder, 2.0mm Spacing
27
J25
FRONT
2x5pin header, 2.0mm spacing
28
J26
Micro SIM
1x 4G Micro SIM card slot
2.3 Hardware Parameters
CPU
Renesas RZ/G2L
2x ARM Cortex-A55，1.2GHz main frequency, support floating point function
ARM Cortex-M33,dedicated real-time processing unit at 200MHz
VPU：Encoding / Decoding support H.264 / AVC (High Profile / Main Profile / Baseline Profile)，H.264 / MVC (Stereo High
Profile)，maximum pixel rate: 1920 x 1080 x 30 fps
GPU：Mali-G31 500MHz，support OpenGL ES 1.1/2.0/3.1/3.2、Vulkan 1.1、OpenCL 2.0

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
6
ISU：Maximum input image resolution: 5M (2800×2047)，Maximum output image resolution: Full HD (1920×1080)，
support color format conversion: RGB / ARGB / YcbCr422 / YcbCr420 / RAW(Grayscale)
ROM
16/32GB eMMC
128Mb SPI FLASH
RAM
2GB DDR4
2.4 Peripheral Configuration
The main peripheral configurations and performance parameters are shown in the following table.
Peripheral Interface
Quantities
Performance Parameters
MIPI CSI
1
1x CAMERA，30pin FFC connector, 0.5mm spacing
MIPI DSI
1
1x MIPI LCD, 40pin（display）FCC connector + 6pin（capacitive touch screen）FFC
connector, 0.5mm spacing, Maximum resolution support up to 1920 x 1080@60fps
DVP
1
1x 40Pin FFC connector with 0.5mm spacing, supports WXGA（1280 ×800）60fps
USB HOST
1
USB 2.0 Type A（supports up to 480 Mbps）
USB OTG
1
USB 2.0 Type A（supports up to 480 Mbps）
WiFi
1
USB WiFi, 4pin Black Terminal Block, 2.0mm Pitch
Note: After the USB_B bus expands four signals through the USB2.0 HUB, one of the
expansion signals The signal is then expanded through the USB2.0 HUB.
Ethernet
2
2x RJ45 interfaces, RMII/RGMII support, 10/100/1000Mbps network adaptive;
The first Ethernet supports PoE PD.
4G
1
Mini PCIe interface via USB2.0 HUB
Micro SD
1
Micro SD card slot
CAN FD
2
2x 4 pin white terminal blocks, 2.0mm spacing
SPK
1
4 pin white terminal blocks, 2.0mm spacing
LINE OUT+MIC IN
1
3.5mm Audio holder
MIC
1
2 pin white terminal blocks, 2.0mm spacing
JTAG
1
Supports JTAG debugging interface
RTC
1
Suitable for button cell MS621 (3V rechargeable)

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
7
Watchdog
1
1x Watchdog
Debug
1
Debug UART white terminal blocks, 2.0mm spacing
UART
1
UART 4 pin white terminal blocks, 2.0mm spacing
I2C
1
6pin FFC connector with 0.5mm pitch
BOOT SET
1
2bit startup mode selection dip switch
POWER
1
12V DC input power connector for 5.5mm OD, 2.1mm ID power plugs
EXPORT
1
SPI
2
2x 20Pin black pins, 2.0mm spacing
UART
4
I2C
1
GPIO
5
5V
1
3.3V
1
2.5 Software Parameters
Kernel
4.19
Uboot
2020.10
OS
Yocto
Driver support
eMMC
DDR4
MMC/SD
LED
KEY
USB WIFI/4G/Mouse
UART
I2C
CAN-FD
MIPI CAMERA
MIPI LCD
Ethernet
LINE IN/OUT
Touch Screen
RTC

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
8
2.6 Development Information
Provide core board pin definition, core board 3D graphic files, editable base board schematic,
editable base board PCB, chip Data sheet, shorten the hardware design cycle.
Provides file system images, kernel driver source code, and a wealth of demo programs
Provides complete platform development kits, getting started tutorials to save time on software
organization and make application development easier.
3 Electrical Characteristics
3.1 Operating Environment
Environmental Parameters
Minimum
Typical
Maximum
Operating temperature
-40°C
/
85°C
Storage temperature
-50°C
/
90°C
Operating humidity
35%（no condensation）
/
75%（no condensation）
Storage humidity
35%（no condensation）
/
75%（no condensation）
Operating voltage
9V
12.0V
18V
3.2 GPIO DC Characterization
Parameters
Label
Specifications
Remark
Minimum
Typical
Maximum
Unit
High level input voltage
VIH
2
--
3.5
V
--
Low level input voltage
VIL
0
--
0.8
V
--
High level output voltage
VOH
2.4
--
--
V
--
Low level output voltage
VOL
--
--
0.2
V
--
Parameters
Label
Specifications
Remark
Minimum
Typical
Maximum
Unit

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
9
High level input voltage
VIH
0.7xVDD
--
NVCC_3V3
V
--
Low level input voltage
VIL
0
--
0.2xVDD
V
--
High level output voltage
VOH
VDD - 0.2
--
--
V
--
Low level output voltage
VOL
--
--
0.2
V
--
3.3 Power Consumption Parameters
Operating State
Voltage Typical
Current Typical
Power Consumption Typical
Free state
12.0V
0.15A
1.8W
Full load state
12.0V
0.23A
2.76W
Note: Test data is related to specific application scenarios and is for reference only.
Free state: the system is started, the development board is not connected to other external modules,
and the program is not executed.
Full load state: the system boots up, the development board is not connected to other external modules,
running the DDR pressure read/write test program, the resource utilization of the two ARM Cortex-A53
cores is about 100%.
3.4 Interface Speed
Parameters
Specifications
Remark
Minimum
Typical
Maximum
Unit
Serial communication speed
--
115200
--
bps
--
SPI communication speed
--
--
52
MHz
--
IIC communication speed
--
100
400
Kbps
--
CAN communication speed
--
--
1
Mbps
--
SD/MMC/SDIO
--
--
104
Mbps
--
USB interface speed
--
--
480
Mbps
--
AD acquisition time
0.7
--
1.25
uS
Fadc=40 MHz

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
10
4 Mechanical Dimensions
The main hardware-related dimensions of the development board are shown below for reference only.
PCB Size
120mm*125mm
PCB Layers
4 Layers
PCB Board Thickness
1.6mm
Number of mounting holes
4
Maximum component height
22mm
Weights
130g
Development board mechanical dimensions

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
11
Maximum component height: the height difference between the highest component level of the
development board and the level of the front of the PCB. The highest component on the board is the
duallayer USB sockets(JUSB1).
Schematic of the highest device on the development board
5 Development Board Kit List
5.1 Standard accessories
Name
Quantity
Remark
Development Board with Core Board
1
12V Power Adapter
1
Standard configuration
2.4G Antenna
1
Standard when WiFi function is available
5.2 Optional Accessories
Name
Model
Quantity
Remark
Serial Debugging Tools
1

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
12
10.1" MIPI LCD with Capacitive Touch
WD101HKM40AB-E6-05/HK101TLEDM-KM01
1
1280x800
7" MIPI LCD with Capacitive Touch
AML070JGI50-07403L-A
1
1024x600
4.3" RGB LCD with Capacitive Touch
AVD-TT43WQ-CW-234-A SP
1
480x272
4.3" RGB LCD with Capacitive Touch
HX043JGI50-43103
1
800x480
PoE PD Module
POE-12V
1
MIPI CSI Camera
ZH13850-ZH-001
1
4G Module
EC25
1
Mini PCIe interface
WiFi Module
88W8897
1
USB2.0 interface
6 Development Board Interface Definitions

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
13
Development Board interface definition diagram
No.
Label
Functional Description
Remark
1
J20
DC Power Interface
1x 12V input power connector for 5.5mm OD, 2.1mm ID power plugs
2
S1
RECOVER Key
Access to the system burn-in button
3
J15
Ethernet-2
RJ45 ethernet-2 interface
4
J10
Ethernet-1
RJ45 ethernet-1 interface (PoE PD support, optional)
5
JUSB1
USB2.0
1x USB2.0 HOST(USB2 HUB) Type A lower level
1x USB2.0 OTG Type A upper level
Remarks:After the USB_B bus i s expanded with four signals through the
USB2.0 HUB, one of the signals is led out directly.
USB_A bus direct lead
6
J6
SPK
1x 4PinWhite Terminal Block, 2.0mm Spacing
7
J3
Audio
1x LINE OUT+MIC IN connector, 3.5mm audio cradle
8
J2
Micro SD
1x Micro SD card slot

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
14
9
J8
PoE PD Input
1x 4Pin Black Row Holder, 2.0mm Spacing
10
J4
4G
1x Mini PCIe connected via USB2.0 HUB
11
J13
SOM-G2L-OSM Core boards
1x 662Pin LGA
12
J1
EXPORT
1x EXPORT Expansion Connector, 2x20pin Pin Header, 2.0mm Pitch
13
MIC1
MIC
1x 2Pin white terminal block, 2.0mm spacing
14
J5
JTAG
2x 5Pin header，2.54mm spacing
15
SW1
BOOT SET
1x 2bit boot mode selection dip switch
16
J7
USB2.0 touch screen interface
1x 4Pin white terminal block, 2.0mm spacing
17
J9
UART
1x 4Pin white terminal block, 2.0mm spacing
18
J11
Debut
1x 4Pin white terminal block, 2.0mm spacing
19
J14
CAN-FD-1
1x 4Pin white terminal block, 2.0mm spacing
20
J16
CAN-FD-2
1x 4Pin white terminal block, 2.0mm spacing
21
J17
Capacitive Touch Screen Interface
1x 6Pin FFC connector, 0.5mm spacing
22
J18
USB WiFi
1x 4Pin Pin Array, 2.0mm Spacing Connects via USB2.0 HOST
23
J24
MIPI LCD interface
1x 40Pin FFC Connector, 0.5mm Spacing
24
J23
RGB LCD interface
1x 40Pin FFC Connector, 0.5mm Spacing
25
J22
CAMERA
1x 30Pin FFC Connector, 0.5mm Spacing
26
J19
PoE PD Output
1x 5Pin Black Row Holder, 2.0mm Spacing
27
J25
FRONT
2x5pin header, 2.0mm spacing
28
J26
Micro SIM
1x 4G Micro SIM card slot

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
15
Development board interface label schematic
6.1 Power supply connector（J20）
It is recommended to use a 12V 2A DC power adapter as the power input. For non-12V DC power
adapters, please refer to Power Consumption and Power Supply Requirements to select the appropriate
power supply.
Power supply connector schematic
6.1.1 Pin Definitions
Label
Pin
Functional Description
Signal description
Remark
J20
1
System power supply input +
12V
DC Socket ,DC connector
Outer diameter 5.5mm, inner
diameter 2.1mm
2
Power ground
GND
3
Power ground
GND

Room 02-04, 10/F, Block A, Building 8, Shenzhen International Innovation Valley, Dashi Road, Nanshan District, Shenzhen, Guangdong, China
Emai: [e-mail] Tel: (+ 86) 755 86028588
16
6.1.2 Primary conversion circuit
The VIN to 5V recommended circuit is shown in the figure.
VIN to 5V Recommended Circuit
When the voltage difference between the input and output power supplies is large and the load
current is high, the power conversion chip needs to use a DC-DC device with high conversion efficiency,
instead of an LDO device, which will burn out the device due to high heat generation.
The reference circuit uses the APW8713A device, which has an input voltage range of 2.7~28V, a
maximum output current of 8A, a conversion efficiency of up to 95%, an inductance selectable from
1~4.7uH, and a current rating greater than the load current.
Power Protection Circuit
When the environment in which the equipment is located is harsh, such as when it is placed outdoors
and may be subjected to lightning strikes, it is necessary to protect the power supply section. The
recommended protection circuit is shown in the figure.