Goodix GR5526 User manual

GR5526 Starter Kit User Guide
Version: 1.0
Release Date: 2023-01-10
Shenzhen Goodix Technology Co., Ltd.

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Preface
Preface
Purpose
This document introduces the components and hardware features of GR5526 Starter Kit (GR5526 SK), as well as the
hardware layout & configuration and RF & current tests of the GR5526 Starter Kit Board (GR5526 SK Board), to help
you get started with the GR5526 SK Board quickly in developing Bluetooth Low Energy (Bluetooth LE) products and
applications with GR5526 System-on-Chips (SoCs).
Audience
This document is intended for:
• GR5526 user
• GR5526 developer
• GR5526 tester
• Technical writer
Release Notes
This document is the initial release of GR5526 Starter Kit User Guide, corresponding to GR5526 SoC series.
Revision History
Version Date Description
1.0 2023-01-10 Initial release
Copyright © 2023 Shenzhen Goodix Technology Co., Ltd. I

Contents
Contents
Preface.................................................................................................................................................................... I
1 Introduction........................................................................................................................................................ 1
1.1 Features............................................................................................................................................................... 1
2 Quick Start Guide................................................................................................................................................3
2.1 Preparation.......................................................................................................................................................... 3
2.2 Software Installation............................................................................................................................................3
2.3 Hardware Connection and Configuration............................................................................................................4
2.4 Example Running................................................................................................................................................. 6
2.5 Mobile Connection Test.......................................................................................................................................6
3 Hardware Layout and Configuration....................................................................................................................8
3.1 Block Diagram......................................................................................................................................................8
3.2 Hardware Layout................................................................................................................................................. 8
3.3 Interface MCU..................................................................................................................................................... 9
3.3.1 J-Link Port................................................................................................................................................... 9
3.3.2 CDC Virtual Serial Port................................................................................................................................9
3.3.3 Firmware Download Port..........................................................................................................................10
3.4 Power Supply.....................................................................................................................................................10
3.4.1 Power Supply Mode................................................................................................................................. 10
3.4.2 Charging Management Circuit.................................................................................................................. 11
3.4.3 Boost Circuit..............................................................................................................................................11
3.4.4 Battery Level Detection............................................................................................................................ 12
3.5 Buttons and LEDs.............................................................................................................................................. 12
3.6 On-board QSPI Flash/PSRAM............................................................................................................................ 13
3.7 Display & TP Interface.......................................................................................................................................14
3.8 Audio Module and On-board MIC.................................................................................................................... 16
3.9 AoA/AoD Multi-antenna Interfaces...................................................................................................................16
4 Performance Test.............................................................................................................................................. 18
4.1 RF Performance Test..........................................................................................................................................18
4.2 Current Consumption Test.................................................................................................................................20
5 SK Board Dimensions........................................................................................................................................ 22
6 FAQ................................................................................................................................................................... 23
6.1 Why Do I Fail to Connect to and Program GR5526 SK Board via J-Link?.......................................................... 23
7 Glossary............................................................................................................................................................ 24
Copyright © 2023 Shenzhen Goodix Technology Co., Ltd. II

Introduction
1 Introduction
The GR5526 Starter Kit (GR5526 SK) is a development platform based on GR5526 System-on-Chips (SoCs) (supporting
Bluetooth 5.3). It contains a GR5526 Starter Kit Board (GR5526 SK Board), design documents, and a user guide.
This helps users quickly develop product prototype and verify related functions/performance, shortening product
development and go-to-market periods.
The figure below shows the photo of a GR5526 SK Board:
Figure 1-1 GR5526 SK Board
Note:
By default, display application firmware has been programmed to a GR5526 SK Board. You can view demo graphics
by connecting a GR5526 SK Board to a display daughter board. You can also generate firmware by compiling other
application example projects provided in a GR5526 Software Development Kit (SDK) and then download the firmware
to a GR5526 SK Board for debugging/testing.
Before you get started, it is recommended to refer to the following documents.
Table 1-1 Reference documents
Name Description
GR5526 Developer Guide Introduces the software/hardware and quick start guide of GR5526 SoCs.
J-Link/J-Trace User Guide
Provides J-Link operational instructions. Available at https://www.segger.com/downloads/
jlink/UM08001_JLink.pdf.
GR5526-SK-BASIC-RevC Offers GR5526 SK Board schematic diagrams.
GProgrammer User Manual
Lists GProgrammer operational instructions including downloading firmware to and
encrypting firmware on GR5526 SoCs.
1.1 Features
Copyright © 2023 Shenzhen Goodix Technology Co., Ltd. 1

Introduction
• A single-mode Bluetooth Low Energy (Bluetooth LE) SoC that supports Bluetooth 5.3
• Multi-functional buttons and LEDs
• SEGGER J-Link OB that supports debugging
• UART-to-USB connector
• USB Type-C connector
• 1.39-inch circular color AMOLED touch display (454 x 454 dpi)
• On-board I2S Audio module
• Two on-board Pulse Density Modulation (PDM) digital microphones
• On-board QSPI Flash and PSRAM, with reserved interfaces for external Flash and PSRAM
• On-board AoA/AoD multi-antenna interface
• On-board adjustable boost circuit
• Battery level detection
• Reserved standard 2.54 mm jumper pin I/O interface
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Quick Start Guide
2 Quick Start Guide
This chapter introduces how to use the GR5526 SK by running a GR5526 application example on a GR5526 SK Board.
Note:
The GR5526 example projects are in SDK_Folder\projects. SDK_Folder is the root directory of GR5526 SDK.
2.1 Preparation
•Hardware preparation
Table 2-1 Hardware preparation
Name Description
Connection cable A USB Type-C cable to connect a GR5526 SK Board to a PC
Development board A GR5526 SK Board for running an application example
PC Where Keil runs; also serves as the power supply for the GR5526 SK Board
Mobile phone Where GRToolbox runs
•Software preparation
Table 2-2 Software preparation
Name Description
Operating system Windows 7 or later versions, or Ubuntu 16.04 LTS or later versions (both 32-bit and 64-bit are acceptable)
J-Link driver A J-Link driver. Available at https://www.segger.com/downloads/jlink/.
GR5526 SDK GR5526 SDK, containing rich example projects and driver files
Keil MDK5
An integrated development environment (IDE). MDK-ARM Version 5.20 or later is required. Available at
https://www.keil.com/download/product/.
GRToolbox
A Bluetooth LE debugging tool. Both GRToolbox (Android) and GRToolbox (iOS) are available.
• GRToolbox (Android): Available in SDK_Folder\tools\GRToolbox, or download from App store.
• GRToolbox (iOS): Available at the App Store.
2.2 Software Installation
Before hardware connection, the following software shall be installed.
• GR5526 SDK
GR5526 SDK provides rich application examples, including peripheral examples and Bluetooth LE examples.
GR5526 SDK is in ZIP file. Users can access the details after extracting the file.
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Quick Start Guide
• IDE
Install an IDE (Keil MDK5) on your PC for example project compilation to generate application firmware.
Download the installation file, and follow the steps of the installation wizard.
• GRToolbox
Download the installation file to the mobile phone, and follow the steps of the installation wizard. After
installation completes, tap on your phone to start GRToolbox.
• J-Link drivers
J-Link drivers should be installed on the PC to ensure J-Link functions properly in debugging. After installation
completes, users can view the SEGGER directory from the Start menu, as shown in Figure 2-1.
Figure 2-1 SEGGER directory
2.3 Hardware Connection and Configuration
To ensure proper function of the GR5526 SK Board, it is required to connect the board to a PC and set the power
supply mode.
GR5526 supports two connection/programming modes: J-Link and UART. You can select either one as needed.
•Connection via J-Link
USB Type-C cable
S11
S10
J5
PC
GR5526 SK Board
D1 S9
J65
Figure 2-2 Hardware connection (J-Link)
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Quick Start Guide
1. Connect the GR5526 SK Board to a PC.
Connect the GR5526 SK Board to a PC via the Type-C connector (J5) using a USB Type-C cable.
2. Set the power supply mode for the GR5526 SK Board.
Switch S11 (power selection switch) on the board to the right (VCC) to supply the board via USB connection.
Note:
The GR5526 SK Board also can be supplied by lithium battery. Switch S11 to the left (Li-BAT) to supply the board by
lithium battery.
3. Connect the on-board J-Link port.
Get the J-Link port (GPIO_0 and GPIO_1) of GR5526 SoC ready for programming and debugging via J-Link,
by connecting Pin1 to Pin3 and Pin2 to Pin4 of J65 on the GR5526 SK Board with jumpers.
4. Power the GR5526 SK Board on.
Switch S10 (power switch) on the board to the right (5V/VBAT) to turn on the board power supply; switch
S10 to the left (NC) to turn off the power supply.
5. Check the connection state (J-Link).
After the GR5526 SK Board is powered on, the LED D1 on the board starts flashing, indicating that the PC
begins to detect the J-Link port. After flashing for several times, D1 remains on, indicating that detection
succeeds.
When D1 remains on, open the File Explorer of the PC, and check whether J-Link is in the list of Device
Manager > Ports (COM & LPT). J-Link in the list indicates that the GR5526 SK Board has been connected to
the PC; otherwise, check whether the J-Link drivers are installed properly.
•Connection via UART
USB Type-C cable
S11
S10
PC
GR5526 SK Board
S9
J29
J65
Figure 2-3 Hardware connection (UART)
1. Connect the GR5526 SK Board to a PC.
Connect the GR5526 SK Board to a PC via the Type-C connector (J29) using a USB Type-C cable.
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Quick Start Guide
2. Set the power supply mode for the GR5526 SK Board.
Switch S11 (power selection switch) on the board to the right (VCC) to supply the board via USB connection.
3. Connect the on-board UART port.
Get the UART port (GPIO_0 and GPIO_1; same as the J-Link port) of GR5526 SoC ready for programming
and debugging via UART, by connecting Pin3 to Pin5 and Pin4 to Pin6 of J65 on the GR5526 SK Board with
jumpers.
4. Power the GR5526 SK Board on.
Switch S10 (power switch) on the board to the right (5V/VBAT) to turn on the board power supply; switch
S10 to the left (NC) to turn off the power supply.
5. Check the connection state (UART).
Start GProgrammer on the PC and select connection via UART for programming. You need to press
the RESET button (S9) to reset the GR5526 SK Board before establishing connection for programming.
Successful programming indicates the connection is established.
2.4 Example Running
Users shall take the following steps to run an application example after hardware connection and configuration
complete.
1. Navigate to the GR5526 example project directory: SDK_Folder\projects.
2. Open a GR5526 example project in Keil, for example, a heart rate application example (SDK_Folder\projec
ts\ble\ble_peripheral\ble_app_hrs).
3. Compile the example project and save the compilation result as an application firmware file (a BIN file or a HEX
file).
4. Download the application firmware file to the GR5526 SK Board.
5. Press S9 (RESET button) on the board to run the example project.
Note:
• By default, the example project directory contains firmware files. Users can directly download the firmware to
the board through GProgrammer.
• For more information about example project compilation and firmware download, refer to GR5526 Developer
Guide.
2.5 Mobile Connection Test
Users can also use GRToolbox to scan and connect the GR5526 SK Board for debugging/testing.
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Quick Start Guide
Note:
For more information about example project testing/verification, refer to corresponding example application
documents.
Copyright © 2023 Shenzhen Goodix Technology Co., Ltd. 7

Hardware Layout and Configuration
3 Hardware Layout and Configuration
This chapter depicts the hardware layout and detailed hardware configurations of the GR5526 SK Board.
3.1 Block Diagram
With a GR5526 Bluetooth SoC as the host MCU, the GR5526 SK Board integrates an interface microcontroller unit
(MCU), power modules, USB Type-C connectors, a J-Link/UART debugging module, buttons and LEDs, Flash & PSRAM,
digital microphones (MICs), a headphone (speaker) jack, a display & TP interface, AoA/AoD multi-antenna interfaces,
a Bluetooth antenna, and a radio frequency (RF) small A type (SMA) connector. The system block diagram is shown
below.
Figure 3-1 Block diagram of GR5526 SK Board
3.2 Hardware Layout
The top view and the bottom view of the GR5526 SK Board are shown in Figure 3-2 and Figure 3-3 respectively.
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Hardware Layout and Configuration
Buons (K1 & K2)
GR5526 SoC (U1)
PCB antenna
SMA connector (J2)
Flash (U9)
AoA/AoD mul-antenna
interface (J23)
Display & TP
interface (J22)
LEDs
(D2 & D3)
USB Type-C
connector (J15)
Lithium baery
contact (J21)
Interface MCU
(U3)
PSRAM (U10)
RESET buon
(S9)
Power selecon
switch (S11)
Power switch (S10)
J-Link OB firmware
download port (J4)
DIP switch (S1)
USB Type-C
connector (J29)
USB Type-C
connector (J5)
Current test interface (J1)
3 LDOs
Headphone jack (J8)
DMIC
DMIC
Level conversion
chips (U4 &U5)
LED (D1)
USB-to-UART
interface (U16)
Figure 3-2 GR5526 SK Board layout (top view)
Buon cell
(BT1)
Buon cell test
points (TP51 &
TP52)
Boost chip
(U18)
Figure 3-3 GR5526 SK Board layout (bottom view)
3.3 Interface MCU
The GR5526 SK Board integrates an STM32F MCU (U3), which can convert a USB connector to a J-Link port or a
Communication Device Class (CDC) virtual serial port, to support J-Link/UART debugging.
3.3.1 J-Link Port
The J-Link OB firmware runs on the interface MCU to support J-Link debugging. Users can install J-Link drivers on the
PC (host) and connect the GR5526 SK Board to the PC to perform online debugging or emulation, instead of using a
debugger or emulator.
3.3.2 CDC Virtual Serial Port
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Hardware Layout and Configuration
The J-Link OB firmware also integrates CDC serial protocols, which allow USB to UART conversion to support UART
debugging.
The mapping relationship of UART connectors between the GR5526 SoC and interface MCU is listed below.
Table 3-1 Mapping of UART connectors between GR5526 SoC and interface MCU
GR5526 SoC Interface MCU
UART (Default GPIO) UART
TX (GPIO_4) RX
RX (GPIO_5) TX
3.3.3 Firmware Download Port
Users can download SEGGER J-Link OB firmware through J4 on the GR5526 SK Board.
Note:
GR5526 SK Boards have been factory-downloaded with J-Link OB firmware. No download is required for users.
3.4 Power Supply
3.4.1 Power Supply Mode
The GR5526 SK Board supports two power supply modes: power supply via USB connection and power supply from
lithium battery.
Users can select a proper power supply mode by switching S11:
• Power supply via USB connection: Switch S11 on the board to the right (VCC) to supply the board via USB
connection.
• Power supply from lithium battery: Switch S11 on the board to the left (Li-BAT) to supply the board by lithium
battery.
USB Type-C
connector (J15)
Lithium baery
contact (J21)
Buon cell (BT1)
Buon cell test
points (TP51 &
TP52)
Power selecon switch
(S11)
USB Type-C
connector (J29)
USB Type-C
connector (J5)
Power switch (S10)
Figure 3-4 Power supply interfaces
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Hardware Layout and Configuration
• Power supply via USB connection
The GR5526 SK Board is connected to an external power source via J5, J15, or J29. The external power source
supplies power at 1.8 V–3.3 V (default: 3.3 V) after current passes through the on-board LDO for voltage
regulation.
• Power supply from lithium battery
The GR5526 SK Board is connected to an external lithium battery via J21. The external lithium battery supplies
power at 3.3 V after current passes through the on-board LDO for voltage regulation.
Users can also connect the GR5526 SK Board to an external lithium battery through TP51 or TP52, or power the
GR5526 SoC by the button cell (BT1).
Figure 3-5 Switching of power supply modes
3.4.2 Charging Management Circuit
GR5526 SK Board integrates a charging management circuit as shown below to charge the lithium battery and supply
the mainboard through USB Type-C connectors (J5, J15, and J29).
Figure 3-6 Charging management circuit
3.4.3 Boost Circuit
GR5526 SK Board integrates a boost circuit as shown below to connect to and supply peripherals through J66. The
output voltage can be adjusted by the feedback circuit according to voltage requirements of the peripherals in use.
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Hardware Layout and Configuration
Figure 3-7 Boost circuit
3.4.4 Battery Level Detection
The GR5526 SK Board supports battery level detection. The battery level detection function can be enabled/disabled
by configuring EN_BATM. If no detection is required, disable the function to prevent electric leakage from the resistor
in voltage division testing.
Figure 3-8 Battery level detection circuit
3.5 Buttons and LEDs
The GR5526 SK Board integrates 3 buttons and 3 LEDs, which are connected to corresponding I/O pins on the GR5526
SoC.
Table 3-2 Functional Description of buttons/LEDs
Button/LED Symbol Corresponding I/O Pin on GR5526 SoC Description
Button1 S9 CHIP_EN Reset button, to reset the SoC
Button2 K1 AON_GPIO_1 K1 button
Button3 K2 AON_GPIO_0 K2 button
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Hardware Layout and Configuration
Button/LED Symbol Corresponding I/O Pin on GR5526 SoC Description
LED1 D1 -
It is connected to the interface MCU to indicate J-Link status.
When the GR5526 SK Board is powered on, it flashes; if J-Link
drivers on the PC are ready, it remains on.
LED2 D2 MSIO_4 LED2 can be driven by different PWM modes.
LED3 D3 MSIO_6 LED3 can be driven by different PWM modes.
Note:
To ensure that buttons/LEDs function normally, GR5526 I/O pins mentioned in the table above shall be pulled up for
outputting.
3.6 On-board QSPI Flash/PSRAM
The GR5526 SK Board integrates a 128 Mb QSPI Flash and a 128 Mb PSRAM, to expand Flash and store application
data.
By default, the power supply pin VCC3P3V outputs current passing through the on-board low dropout regulator (LDO)
at 3.3 V, VDDIO outputs current passing through the on-board LDO at 1.8 V, and VIO_OUT outputs current at 1.8 V
from the SoC. The VDDIO1 domain of the GR5526 SoC is connected to the on-chip low-voltage (1.8 V) PSRAM, and
the VDDIO0 domain is connected to the on-chip wide-voltage (1.8 V–3.3 V) Flash. Therefore, the VDDIO1 pin can be
connected to VIO_OUT directly, and the VDDIO0 pin can be connected to either VCC3P3V or VIO_OUT by switching S1,
as shown in Figure 3-9. The on-board Flash supports power supply at 1.8 V–3.3 V, and the on-board PSRAM supports
power supply at 1.8 V only.
Figure 3-9 Power supply through VDDIO pins on GR5526 SoC
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Hardware Layout and Configuration
By default, the on-board Flash is supplied through VDDIO. Switching the supply voltage is supported by configuring
the connection status of TP12–TP14. To allow commissioning of various models of Flash, users can solder an external
Flash at SOIC8 on the board or connect an external Flash to the board through the J27 connector to replace the on-
board Flash. For external Flash commissioning through J27, a plug-in module shall be designed according to the pin
definitions of U9 in Figure 3-10, TP18–TP23 shall be disconnected, and TP24–TP29 shall be shorted.
Figure 3-10 Expanded QSPI Flash schematic diagram
By default, the on-board PSRAM is supplied through VDDIO. Switching the supply voltage is supported by configuring
the connection status of TP33 and TP34. To allow commissioning of various models of PSRAM, users can solder an
external PSRAM at SOIC8 on the board or connect an external PSRAM to the board through J27 to replace the on-
board PSRAM. For external PSRAM commissioning through J27, a plug-in module shall be designed according to the
pin definitions of U10 in Figure 3-11, TP53–TP58 shall be disconnected, and TP35–TP40 shall be shorted.
Figure 3-11 Expanded QSPI PSRAM schematic diagram
3.7 Display & TP Interface
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Hardware Layout and Configuration
A display & TP interface (J22 & J25) has been reserved on the GR5526 SK Board to connect a display & TP daughter
board to the SK Board, allowing users to develop/debug products with display function, for example, smart watches
and wristbands.
By default, the GR5526 SK Board is embedded with a display & TP daughter board, which integrates a 1.05 (inch) x
1.39 (inch) circular color AMOLED touch display (454 x 454 dpi) and a touch panel (TP). QSPI interface is adopted for
the AMOLED touch display, and I2C interface for the TP. In addition, the display & TP daughter board is pluggable. You
can replace it with a different-size display/TP supporting the same type of connection interfaces, to adapt to different
application scenarios.
Figure 3-12 AMOLED/Audio multiplexed interface network
The pin definitions of the display & TP interface are provided below:
Table 3-3 Pins for display & TP interface
Pin NET Description
1 +5 V Power supply pin (+5 V)
2 TE_LCD/AON_GPIO5 Output frame header pulse signal
3 VCC3P3V Power supply pin (+3.3 V)
4 RESET_LCD/AON_GPIO6 AMOLED reset signal (0: enable; 1: disable)
5 VCC3P3V Power supply pin (+3.3 V)
6 DC_LCD/AON_GPIO7 -
7 GND Power ground
8 QSPI_M2_IO_0 Serial input signal
9 VDDIO Interface type selection
10 QSPI_M2_CLK QSPI clock
11 VDDIO Power supply pin VDDIO (default: 1.8 V)
12 QSPI_M2_IO_2 QSPI bit data bus/input data bus
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Hardware Layout and Configuration
Pin NET Description
13 TP_RESET/GPIO29 TP hardware reset input
14 QSPI_M2_IO_1 Data/Command selection signal
15 TP_SCL/GPIO30 SPI clock input of the TP module
16 QSPI_M2_IO_3 Data/Command selection signal
17 TP_SDA/GPIO31 TP SPI data input
18 QSPI_M2_CSN Chip select signal input
19 TP_INT/GPIO32 TP slave interrupt port
20 LEDK_PWM/GPIO33 -
3.8 Audio Module and On-board MIC
The GR5526 SK Board integrates an Audio module and two on-board microphones (MICs), allowing debugging/
testing of Pulse Density Modulation (PDM) and I2S interfaces to support audio input and music play debugging/
demonstration.
Figure 3-13 Schematic diagram of Audio module and on-board MICs
3.9 AoA/AoD Multi-antenna Interfaces
Two AoA/AoD multi-antenna interfaces (multiplexing the I2S interface of the Decode IC) are reserved on the GR5526
SK Board, supporting AoA/AoD application verification.
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