GOWIN 1G Serial Ethernet IP User manual

Gowin 1G Serial Ethernet IP
User Guide
IPUG1021-1.0E, 06/30/2023

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Revision History
Date
Version
Description
06/30/2023
1.0E
Initial version published.

Contents
IPUG1021-1.0E
i
Contents
Contents ...............................................................................................................i
List of Figures....................................................................................................iii
List of Tables.......................................................................................................v
1 About This Guide.............................................................................................1
1.1 Purpose .............................................................................................................................. 1
1.2 Related Documents ............................................................................................................1
1.3 Terminology and Abbreviations...........................................................................................1
1.4 Support and Feedback .......................................................................................................2
2 Overview...........................................................................................................3
2.1 Features..............................................................................................................................3
2.2 Operating Frequency .......................................................................................................... 4
2.3 Resource Utilization............................................................................................................ 4
3 Functional Description....................................................................................5
3.1 Structure ............................................................................................................................. 5
3.2 User Interface ..................................................................................................................... 6
3.2.1 Configure Interface ..........................................................................................................6
3.2.2 Status Interface................................................................................................................8
3.2.3 PHY Layer Interface ........................................................................................................9
3.2.4 MAC Layer Interface......................................................................................................13
4 Port List ..........................................................................................................24
5 Parameter Configuration...............................................................................28
6 Interface Configuration .................................................................................29
7 Reference Design ..........................................................................................34
7.1 Hardware Platform............................................................................................................ 34
7.2 Implementation Diagram................................................................................................... 35
7.3 On-Board Testing..............................................................................................................35
7.3.1 Operation Description ....................................................................................................35
7.3.2 Operating Flow ..............................................................................................................36
8 File Delivery ...................................................................................................37
8.1 Documentation..................................................................................................................37

Contents
IPUG1021-1.0E
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8.2 Design Source Code (Encryption) ....................................................................................37
8.3 Reference Design ............................................................................................................. 37

List of Figures
IPUG1021-1.0E
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List of Figures
Figure 3-1 Block Diagram of Gowin 1G Serial Ethernet IP................................................................5
Figure 3-2 Normal Ethernet Frame Reception at 1000M .................................................................. 9
Figure 3-3 Normal Ethernet Frame Reception at 10M/100M ............................................................ 9
Figure 3-4 Frame Reception with Errors at 1000M............................................................................10
Figure 3-5 Frame Reception with Errors at 10M/1000M.................................................................... 10
Figure 3-6 Reception with Carrier Extension at 1000M ..................................................................... 10
Figure 3-7 Reception with Carrier Extension at 10M/100M ...............................................................10
Figure 3-8 Carrier Extension Reception with Error at 1000M ............................................................10
Figure 3-9 Carrier Extension Reception with Error at 10M/100M ......................................................10
Figure 3-10 Normal Ethernet Frame Transmit at 1000M ................................................................... 11
Figure 3-11 Normal Ethernet Frame Transmit at 10M/100M .............................................................11
Figure 3-12 Ethernet Frame Transmit with Error at 1000M ............................................................... 11
Figure 3-13 Ethernet Frame Transmit with Error at 10M/1000M .......................................................12
Figure 3-14 Transmit with Carrier Extension at 1000M .....................................................................12
Figure 3-15 Transmit with Carrier Extension at 10M/100M ...............................................................12
Figure 3-16 Carrier Extension Transmit with Error at 1000M ............................................................12
Figure 3-17 Carrier Extension Transmit with Error at 10M/100M ......................................................12
Figure 3-18 Transmit in Half Duplex Mode at 1000M ........................................................................ 13
Figure 3-19 Transmit Collision at 1000M ...........................................................................................13
Figure 3-20 Normal MAC Frame Reception at 1000M ...................................................................... 13
Figure 3-21 Normal MAC Frame Reception at 10M/100M ................................................................ 13
Figure 3-22 MAC Frame Reception with Error at 1000M .................................................................. 14
Figure 3-23 MAC Frame Reception with Error at 10M/1000M .......................................................... 14
Figure 3-24 Normal MAC Frame Reception When FCS Forward Enabled at 1000M ....................... 14
Figure 3-25 MAC Frame Reception with Error When FCS Forward Enabled at 1000M ................... 14
Figure 3-26 Normal MAC Frame Reception When FCS Forward Enabled at 10M/100M.................15
Figure 3-27 MAC Frame Reception with Error When FCS Forward Enabled at 10M/100M .............15
Figure 3-28 VLAN Tagged Frame Reception.....................................................................................15
Figure 3-29 Reception Statistics ........................................................................................................16
Figure 3-30 Normal MAC Frame Transmit at 1000M......................................................................... 17
Figure 3-31 Normal MAC Frame Transmit at 10M/100M................................................................... 17
Figure 3-32 MAC Frame Transmit with Error at 1000M.....................................................................17

List of Figures
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Figure 3-33 MAC Frame Transmit with Error at 10M/1000M.............................................................17
Figure 3-34 MAC Frame Transmit When FCS Forward Enabled at 1000M ...................................... 18
Figure 3-35 MAC Frame Transmit When FCS Forward Enabled at 10M/100M ................................ 18
Figure 3-36 Re-transmit in Case of Collision ..................................................................................... 18
Figure 3-37 Abort Re-transmit in Case of Collision (Actively)............................................................ 18
Figure 3-38 Abort Re-transmit in Case of Collision (Passively).........................................................19
Figure 3-39 Transmit Statistics ..........................................................................................................19
Figure 3-40 Pause Frame Transmit ...................................................................................................20
Figure 3-41 Pause Frame Reception.................................................................................................20
Figure 3-42 Connection Diagram of MDC and MDIO ........................................................................ 22
Figure 3-43 Write Timing of miim ....................................................................................................... 22
Figure 3-44 Read Timing of miim....................................................................................................... 23
Figure 4-1 I/O Port Diagram of Gowin 1G Serial Ethernet IP ............................................................24
Figure 6-1 IP Core Generator ............................................................................................................ 29
Figure 6-2 Serdes IP Configuration Interface ....................................................................................30
Figure 6-3 PHY Configuration ............................................................................................................ 31
Figure 6-4 MAC Configuration ........................................................................................................... 32
Figure 6-5 1G Serial Ethernet IP Interface.........................................................................................33
Figure 7-1 Hardware Platform............................................................................................................ 34
Figure 7-2 Implementation Diagram of Reference Design ................................................................ 35

List of Tables
IPUG1021-1.0E
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List of Tables
Table 1-1 Terminology and Abbreviations ..........................................................................................1
Table 2-1 Gowin 1G Memory Interface IP..........................................................................................3
Table 2-2 Resource Utilization ...........................................................................................................4
Table 3-1 Bit Definition of configuration_vector_i...............................................................................7
Table 3-2 Bit Definition of status_vector_o ........................................................................................ 8
Table 3-3 Bit Definition of rx_statistics_vector_o ............................................................................... 16
Table 3-4 Bit Definition of tx_statistics_vector_o ...............................................................................19
Table 4-1 IO Port List of Gowin 1G Serial Ethernet IP....................................................................... 25
Table 5-1 Static Parameters of Gowin 1G Serial Ethernet IP ............................................................28
Table 8-1 Document List .................................................................................................................... 37
Table 8-2 Design Source Code List of Gowin 1G Serial Ethernet IP.................................................37
Table 8-3 Gowin 1G Serial Ethernet IP RefDesign File List............................................................... 38

1 About This Guide
1.1 Purpose
IPUG1021-1.0E
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1About This Guide
1.1 Purpose
The purpose of Gowin 1G Serial Ethernet IP User Guide is to help you
learn the features and usage of Gowin 1G Serial Ethernet IP by providing
the descriptions of functions, GUI, and reference design, etc.
1.2 Related Documents
The latest user guides are available on the GOWINSEMI website. You
can find the related documents at www.gowinsemi.com:
SUG100, Gowin Software User Guide
DS981, GW5AT series of FPGA Products Data Sheet
DS1104, GW5AST series of FPGA Products Data Sheet
1.3 Terminology and Abbreviations
The terminology and abbreviations used in this manual are as shown
in Table 1-1.
Table 1-1 Terminology and Abbreviations
Terminology and Abbreviations
Meaning
CRC
Cyclic Redundancy Check
FCS
Frame Check Sequence
IFG
Inter-Frame Gap
IP
Intellectual Property
LUT
Look-up Table
MAC
Media Access Control
PCS
Physical Coding Sublayer
SFD
Start of Frame Delimiter

1 About This Guide
1.4 Support and Feedback
IPUG1021-1.0E
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1.4 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly using the information provided below.
Website: www.gowinsemi.com
E-mail: [email protected]

2 Overview
2.1 Features
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2Overview
Gowin 1G Serial Ethernet IP implements the 1000BASE-X and SGMII
functions described in the IEEE802.3 standard, and provides users with a
common access interface that can be integrated into devices requiring 1G
Serial Ethernet; and this connection is typically used for communication
applications.
Table 2-1 Gowin 1G Memory Interface IP
Gowin 1G Serial Ethernet IP
Logic Resource
See Table 2-2
Delivered Doc.
Design Files
Verilog (encryption)
Reference Design
Verilog
TestBench
Verilog
Test and Design Flow
Synthesis Software
GowinSynthesis
Application Software
Gowin Software (V1.9.9.Beta-1 and above)
Note!
For the devices supported, you can click here to get the information.
2.1 Features
Supports 1000BASE-X and SGMII standards
Conforms to IEEE 802.3 standard
1000BASE-X supports 1.25Gbps
SGMII supports 10/100/1000M
Optional Ethernet MAC for users
Supports full duplex and half duplex, and collision detection in half
duplex mode
Users can select to automatically add and verify CRC or not
Can add pad automatically
Supports Ethernet frame classification statistics
Supports Ethernet frame error statistics

2 Overview
2.2 Operating Frequency
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Supports IFG configurable function
Supports Jumbo mode
Supports Flow Control in full duplex mode
Supports Management interface mdc, mdio
2.2 Operating Frequency
Gowin 1G Serial Ethernet IP operates at 125 MHz.
2.3 Resource Utilization
Its performance and resource utilization may vary when the design is
employed in different devices, or at different densities, speeds, or grades.
Taking Gowin GW5AT series of FPGA as an instance, the resource
utilization is as shown in Table 2-2. For the resource utilization of other
devices, please refer to later release information.
Table 2-2 Resource Utilization
Interface
LUTs
REGs
Device
Speed
MAC Layer
1488
1104
GW5AT-138
ES
PHY Layer
555
362
GW5AT-138
ES
PHY Layer (MIIM)
646
403
GW5AT-138
ES

3 Functional Description
3.1 Structure
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3Functional Description
3.1 Structure
The basic structure of Gowin 1G Serial Ethernet IP is shown in Figure
3-1, mainly including MAC (optional), PCS, SerDes module. The User
Design in Figure 3-1 is the User Design in FPGA, and the Device is an
externally connected Ethernet device supporting 1000BASE-X or SGMII
standards.
Figure 3-1 Block Diagram of Gowin 1G Serial Ethernet IP
User
Design
IP
MAC
(optional) Device
FPGA
SERDES
Transceiver
Serial
PCS
MAC: Supports the format conversion between user data and Ethernet
frame data, which can realize CRC, PAD, Flow Control, IFG
configuration, frame statistics, error indication, etc.
PCS: Realizes GMII, auto-negotiation, etc.
SerDes: Realizes the processing of Ethernet data coding and decoding,
serial and parallel conversion, etc.

3 Functional Description
3.2 User Interface
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3.2 User Interface
3.2.1 Configure Interface
Standard Configuration
The IP supports 1000BASE-X and SGMII standards, and SGMII
includes System Mode and Media Mode. In System Mode, the current rate
and duplex mode of the IP are determined by the Ethernet device
connected externally, which supports three rates of 10M, 100M and 1000M,
and full-duplex and half-duplex mode; In Media Mode, the current rate and
duplex mode of IP can be set, and the supported rates and duplex modes
are the same as those in System Mode.
1000BASE-X Standard Configuration
When the user sets basex_or_sgmii_i to 0, the IP is 1000BASE-X
standard; the link time of 1000BASE-X can be configured by setting
basex_link_timer_i, and the specific link time can be calculated according
to the following formula:
Link time=basex_link_timer_i*32.769us
Note!
IEEE 802.3 standard specifies that the link time of 1000BASE-X is 10ms~20ms.
SGMII Standard Configuration
When the user sets basex_or_sgmii_i to 1, the IP is SGMII standard;
the link time of SGMII can be configured by setting sgmii_link_timer_i, and
the specific link time can be calculated according to the following formula:
Link time=sgmii_link_timer_i*32.769us
Note!
The link time of SGMII is 1.6ms.
When the user sets sgmii_mode_i to 0, SGMII is System Mode, and
there is no need to set the rate and duplex mode; when the user sets
sgmii_mode_i to 1, SGMII is Media Mode, and the rate and duplex mode
can be set through configuration_vector_i[13:11 ]. For duplex mode, when
configuration_vector_i[13] is 1, it means SGMII standard is full duplex, and
when configuration_vector_i[13] is 0, it means SGMII standard is half
duplex; for rate, when configuration_vector_i[12:11] is 1X, it means SGMII
standard is 1000M for transmission; when configuration_vector_i[12:11] is
01, it means SGMII standard is 100M for transmission; when
configuration_vector_i[12:11] is 00, it means SGMII standard is 10M for
transmission.
Function Configuration
Users can set the IP to repeater mode when configuring
repeater_mode_i to 1. Users can configure configuration_vector_i to
control the functions inside the IP, such as enable or disable
auto-negotiation, restart auto-negotiation, duplex mode, rate mode, power
down, etc. It should be noted that configuration_vector_i exists only when
the IP contains MAC or there is only PHY and no PHY MIIM interface;

3 Functional Description
3.2 User Interface
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users can also set the IP to support signal detection through configuring
signal_detect_i to 1, while signal_detect_i and configuration_vector_i[1]
can together control the data synchronization function of the IP. The
configuration_vector_i bit is defined as shown in Table 3-1.
Table 3-1 Bit Definition of configuration_vector_i
Bits
Name
Description
14
Sgmii Phy Link
PHY Link status in Media Mode of SGMII
1: Link up
0: Link down
13
Sgmii Phy Duplex
Duplex mode in Media Mode of SGMII
1: Full duplex
0: Half duplex
12:11
Sgmii Phy Speed
Rate in Media Mode of SGMII
1X: 1000M
01: 100M
00: 10M
10
Hd
Half duplex mode in 1000BASE-X standard
1: Enable
0: Disable
9
Fd
Full-duplex mode in 1000BASE-X standard
1: Enable
0: Disable
[8:7]
{Ps2,Ps1}
Pause mode in 1000BASE-X standard
00: No Pause
01: Symmetric Pause
10: Asymmetric Pause towards link partner
11: Both Symmetric Pause and Asymmetric
Pause towards link partner
6
Power Down
Power down
1: Power down
0: Power on
5
Unidir En
Unidirection transmission
1: Enable
0: Disable
4
Mr Restart An
Restart auto-negotiation
1->0: Restart auto-negotiation
3
Isolate
Isolate data transmission between user and PHY
layer
1: Enable
0: Disable
2
Mr An Enable
Auto-negotiation
1: Enable
0: Disable
1
Mr Loopback
Data synchronization
1: IP performs data synchronization, and
signal_detect_i is invalid
0: If signal_detect_i=1, IP performs data

3 Functional Description
3.2 User Interface
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Bits
Name
Description
synchronization; if signal_detect_i=0, IP does not
perform data synchronization.
0
Mr Main Reset
Reset
1: Reset
0: Set
3.2.2 Status Interface
status_vector_o indicates the current status of the IP function, and
link_partner_ability_base_o indicates the information of the partner's
configuration register at the time of this auto-negotiation. The bit definition
of status_vector_o is as shown in Table 3-2 .
Table 3-2 Bit Definition of status_vector_o
Bits
Name
Description
10
Decode Disparity Err
Decode disparity error indication
1: Error
0: Normal
9
Decode Coding Err
Decode coding error indication
1: Error
0: Normal
8
Phy Link Status
PHY Link status indication of its partner in
SGMII standard
1: Link up
0: Link down
7
Duplex Status
Duplex mode indication of its partner in
SGMII standard
1: Full duplex
0: Half duplex
6:5
Speed Status
Rate indication of its partner in SGMII
standard
1x: 1000M
01: 100M
00: 10M
4
Page Received
Its partner configuration register information
received indication
3
Power Down
Power down indication
1: Power down
0: Power on
2
An Complete
Auto-negotiation completed indication
1: Auto-negotiation completed successfully
0: Auto-negotiation not completed
1
Link Status
Link status indication
1: Link up
0: Link down
0
Sync Status
Data synchronization status indication
1: Data synchronized
0: Data not synchronized

3 Functional Description
3.2 User Interface
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3.2.3 PHY Layer Interface
Ethernet Frame Reception
Ethernet frame reception is the process of converting serial data into
Ethernet frame data. All reception signals are synchronized with
gmii_rx_clk_o.
Normal Frame Reception
Figure 3-2 shows the normal Ethernet frame reception at 1000M.
Figure 3-3 shows the normal Ethernet frame reception at 10M/100M.
At any rate, gmii_rx_clk_o is 125MHz, and each byte is received
repeatedly for 100 cycles at 10M; each byte is received repeatedly for 10
cycles at 100M; each byte is received for only 1 cycle at 1000M.
An Ethernet frame marks the start of a frame with a 7-byte Preamble
and a 1-byte SFD at 1000M; while at 10M and 100M, each byte is received
repeatedly for 100 and 10 cycles respectively. It should be noted that at any
rate, 1 or 2 cycles of the received Preamble are missing due to the start of
packet delimiter in the conversion.
Throughout the Ethernet frame reception, gmii_rx_dv_o remains at 1
until the end of the frame, then it changes to 0; while gmii_rx_er_o also
remains at 0, and gmii_rxd_o is the received data. It should be noted that
there is no buffer in the IP for the received Ethernet frames, so the user
side must always be ready to receive Ethernet frames. When the first byte
of the frame begins to appear in the user interface, the data is received
continuously until the whole frame is received.
Figure 3-2 Normal Ethernet Frame Reception at 1000M
Figure 3-3 Normal Ethernet Frame Reception at 10M/100M
Frame Reception with Errors
When gmii_rx_dv_o is 1, if gmii_rx_er_o is 1, it means that the current
frame has some error data. Figure 3-4 and Figure 3-5 show the reception
with an error frame at 1000M and 10M/100M respectively.

3 Functional Description
3.2 User Interface
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Figure 3-4 Frame Reception with Errors at 1000M
Figure 3-5 Frame Reception with Errors at 10M/1000M
Reception with Carrier Extension
When gmii_rx_dv_o is 0, gmii_rx_er_o is 1, and gmii_rxd_o is 8'h0F, it
is the reception with carrier extension, and it should be noted that the
carrier extension will immediately follow the Ethernet frame reception.
Figure 3-6 shows the reception with carrier extension at 1000M, and Figure
3-7 shows the reception with carrier extension at 10M/100M.
Figure 3-6 Reception with Carrier Extension at 1000M
Figure 3-7 Reception with Carrier Extension at 10M/100M
Carrier Extension Reception with Error
On the basis of carrier extension reception, when gmii_rx_dv_o is 0
and gmii_rx_er_o = 1, the case of gmii_rxd_o of 8'h1F occurs. Figure 3-8
shows the carrier extension reception with error at 1000M. Figure 3-9
shows the carrier extension reception with error at 10M/100M.
Figure 3-8 Carrier Extension Reception with Error at 1000M
Figure 3-9 Carrier Extension Reception with Error at 10M/100M

3 Functional Description
3.2 User Interface
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Ethernet Transmit
Ethernet transmit is the conversion from Ethernet frame data into serial
data. All the transmit signal are synchronized with gmii_tx_clk_o.
Normal Ethernet Transmit
Figure 3-10 shows the normal Ethernet frame transmit at 1000M.
Figure 3-11shows the normal Ethernet frame transmit at 10M/100M.
At any rate, gmii_tx_clk_o is 125MHz, and each byte is transmitted
repeatedly for 100 cycles at 10M; each byte is transmitted repeatedly for 10
cycles at 100M; each byte is transmitted for only 1 cycle at 1000M.
An Ethernet frame marks the start of a frame with a 7-byte Preamble
and a 1-byte SFD at 1000M; while at 10M and 100M, each byte is
transmitted repeatedly for 100 and 10 cycles respectively.
Throughout the Ethernet frame transmit, gmii_tx_en_i remains at 1
until the end of the frame, then it changes to 0; while gmii_tx_er_i also
remains at 0; when gmii_tx_en_i is 1, the byte to be transferred is assigned
to gmii_txd_i. It should be noted that there is no buffer in the IP for
transmitted Ethernet frames. Therefore, when the first byte starts to be
transmitted, the user side needs to prepare subsequent bytes and assign
the bytes to gmii_txd_i in time when gmii_tx_en_i is 1, until the whole frame
is transmitted.
Figure 3-10 Normal Ethernet Frame Transmit at 1000M
Figure 3-11 Normal Ethernet Frame Transmit at 10M/100M
Ethernet Frame Transmit with Error
During the transmit, when gmii_tx_en_i and gmii_tx_er_i are both 1, it
indicates that there is an error in the current frame. Figure 3-12 shows the
Ethernet frame transmit with error at 1000M. Figure 3-13 shows the
Ethernet frame transmit with error at 10M/100M.
Figure 3-12 Ethernet Frame Transmit with Error at 1000M

3 Functional Description
3.2 User Interface
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Figure 3-13 Ethernet Frame Transmit with Error at 10M/1000M
Transmit with Carrier Extension
When gmii_tx_en_i is 0, gmii_tx_er_i is 1, and gmii_txd_i is 8'h0F, it is
the transmit with carrier extension, and it should be noted that the carrier
extension will immediately follow the Ethernet frame transmit. Figure 3-14
shows the transmit with carrier extension at 1000M, and Figure 3-15 shows
the transmit with carrier extension at 10M/100M.
Figure 3-14 Transmit with Carrier Extension at 1000M
Figure 3-15 Transmit with Carrier Extension at 10M/100M
Carrier Extension Transmit with Error
On the basis of carrier extension transmit, when gmii_tx_en_i is 0 and
gmii_tx_er_i is 1, gmii_txd_i outputs continuous 8'h0f first, then continuous
8'h1f. Figure 3-16 shows the carrier extension transmit with error at 1000M.
Figure 3-17 shows the carrier extension transmit with error at 10M/100M.
Figure 3-16 Carrier Extension Transmit with Error at 1000M
Figure 3-17 Carrier Extension Transmit with Error at 10M/100M
Transmit in Half Duplex Mode
In half-duplex mode, the gmii_crs_o and gmii_col_o signals are
detected before transmit, if both are 0, the Ethernet frame can be
transmitted in full duplex mode, otherwise continue to wait; during the
transmit, if the user detects that gmii_crs_o is 1, it is necessary to
immediately set gmii_tx_en_i and gmii_tx_er_i to 0, which is used to end
the transmit of this Ethernet frame. When gmii_crs_o and gmii_col_o both
are 0, the user can decide whether to re-transmit the frame or not. Figure