Holtek HT45F5Q-3 User manual

Battery Charger Flash MCU
HT45F5Q-3
Revision: V1.10 Date: November 04, 2019

Rev. 1.10 2 November 04, 2019 Rev. 1.10 3 November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Table of Contents
Features................................................................................................................. 6
CPU Features ...............................................................................................................................6
Peripheral Features.......................................................................................................................6
General Description.............................................................................................. 7
Block Diagram....................................................................................................... 8
Pin Assignment..................................................................................................... 8
Pin Description ..................................................................................................... 9
Absolute Maximum Ratings............................................................................... 12
D.C. Characteristics............................................................................................ 12
Operating Voltage Characteristics...............................................................................................12
Operating Current Characteristics...............................................................................................12
Standby Current Characteristics .................................................................................................12
A.C. Characteristics............................................................................................ 13
High Speed Internal Oscillator – HIRC – Frequency Accuracy ................................................... 13
Low Speed Internal Oscillator Characteristics – LIRC ................................................................13
Operating Frequency Characteristic Curves ...............................................................................13
System Start Up Time Characteristics ........................................................................................14
Input/Output Characteristics ............................................................................. 14
Memory Characteristics ..................................................................................... 15
LVR Electrical Characteristics........................................................................... 15
A/D Converter Electrical Characteristics.......................................................... 15
D/A Converter Electrical Characteristics.......................................................... 16
Operational Amplier Electrical Characteristics ............................................. 16
Software Controlled LCD Driver Electrical Characteristics............................ 17
Power-on Reset Characteristics........................................................................ 17
System Architecture........................................................................................... 18
Clocking and Pipelining...............................................................................................................18
Program Counter.........................................................................................................................19
Stack ...........................................................................................................................................19
Arithmetic and Logic Unit – ALU .................................................................................................20
Flash Program Memory...................................................................................... 20
Structure......................................................................................................................................20
Special Vectors ...........................................................................................................................21
Look-up Table..............................................................................................................................21
Table Program Example..............................................................................................................21
In Circuit Programming – ICP .....................................................................................................22
On-Chip Debug Support – OCDS ...............................................................................................23
Data Memory ....................................................................................................... 24
Structure......................................................................................................................................24

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HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
General Purpose Data Memory ..................................................................................................24
Special Purpose Data Memory ...................................................................................................25
Special Function Register Description............................................................. 26
Indirect Addressing Registers – IAR0, IAR1 ...............................................................................26
Memory Pointers – MP0, MP1 ....................................................................................................26
Bank Pointer – BP.......................................................................................................................27
Accumulator – ACC.....................................................................................................................27
Program Counter Low Register – PCL........................................................................................27
Look-up Table Registers – TBLP, TBHP, TBLH...........................................................................27
Status Register – STATUS ..........................................................................................................28
Emulated EEPROM Data Memory ..................................................................... 29
Emulated EEPROM Data Memory Structure ..............................................................................29
Emulated EEPROM Registers ....................................................................................................30
Erasing the Emulated EEPROM .................................................................................................33
Writing Data to the Emulated EEPROM......................................................................................33
Reading Data from the Emulated EEPROM ...............................................................................33
Programming Considerations......................................................................................................33
Oscillators ........................................................................................................... 35
Oscillator Overview .....................................................................................................................35
System Clock Congurations......................................................................................................35
Internal High Speed RC Oscillator – HIRC .................................................................................36
Internal 32kHz Oscillator – LIRC.................................................................................................36
Operating Modes and System Clocks .............................................................. 36
System Clocks ............................................................................................................................36
System Operation Modes............................................................................................................37
Control Registers ........................................................................................................................38
Operating Mode Switching ..........................................................................................................40
Standby Current Considerations .................................................................................................44
Wake-up......................................................................................................................................44
Watchdog Timer.................................................................................................. 45
Watchdog Timer Clock Source....................................................................................................45
Watchdog Timer Control Register ...............................................................................................45
Watchdog Timer Operation .........................................................................................................46
Reset and Initialisation....................................................................................... 47
Reset Functions ..........................................................................................................................47
Reset Initial Conditions ...............................................................................................................49
Input/Output Ports .............................................................................................. 52
Pull-high Resistors ......................................................................................................................52
Port A Wake-up ...........................................................................................................................53
I/O Port Control Registers ...........................................................................................................53
Pin-shared Functions ..................................................................................................................53
I/O Pin Structures........................................................................................................................58
READ PORT Function.................................................................................................................58
Programming Considerations......................................................................................................59

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HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Timer Modules – TM ........................................................................................... 60
Introduction .................................................................................................................................60
TM Operation ..............................................................................................................................60
TM Clock Source.........................................................................................................................60
TM Interrupts...............................................................................................................................61
TM External Pins.........................................................................................................................61
Programming Considerations......................................................................................................62
Compact Type TM – CTM ................................................................................... 63
Compact Type TM Operation ......................................................................................................63
Compact Type TM Register Description......................................................................................63
Compact Type TM Operation Modes ..........................................................................................67
Standard Type TM – STM ................................................................................... 73
Standard TM Operation...............................................................................................................73
Standard Type TM Register Description .....................................................................................73
Standard Type TM Operation Modes ..........................................................................................78
Analog to Digital Converter ............................................................................... 88
A/D Converter Overview .............................................................................................................88
A/D Converter Register Description ............................................................................................89
A/D Converter Data Registers – SADOL, SADOH......................................................................89
A/D Converter Reference Voltage...............................................................................................91
A/D Converter Input Signal .........................................................................................................91
A/D Converter Operation.............................................................................................................92
Conversion Rate and Timing Diagram ........................................................................................93
Summary of A/D Conversion Steps.............................................................................................93
Programming Considerations......................................................................................................94
A/D Conversion Function ............................................................................................................94
A/D Conversion Programming Examples....................................................................................95
Battery Charge Module ...................................................................................... 97
Battery Charge Module Registers ...............................................................................................97
Digital to Analog Converter .........................................................................................................98
Operational Ampliers.................................................................................................................99
Universal Serial Interface Module – USIM ...................................................... 100
SPI Interface .............................................................................................................................100
I2C Interface ..............................................................................................................................108
UART Interface.......................................................................................................................... 117
Software Controlled LCD Driver...................................................................... 132
LCD Operation ..........................................................................................................................132
LCD Bias Current Control .........................................................................................................132
Cyclic Redundancy Check – CRC ................................................................... 133
CRC Registers ..........................................................................................................................133
CRC Operation..........................................................................................................................134

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Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Interrupts ........................................................................................................... 136
Interrupt Registers.....................................................................................................................136
Interrupt Operation ....................................................................................................................139
External Interrupts.....................................................................................................................141
Time Base Interrupts.................................................................................................................141
Multi-function Interrupts.............................................................................................................143
TM Interrupts.............................................................................................................................143
A/D Converter Interrupt .............................................................................................................143
USIM Interrupt...........................................................................................................................143
Interrupt Wake-up Function.......................................................................................................144
Programming Considerations....................................................................................................144
Application Descriptions ................................................................................. 145
Introduction ...............................................................................................................................145
Functional Description...............................................................................................................145
Hardware Circuit .......................................................................................................................146
Instruction Set................................................................................................... 147
Introduction ...............................................................................................................................147
Instruction Timing ......................................................................................................................147
Moving and Transferring Data...................................................................................................147
Arithmetic Operations................................................................................................................147
Logical and Rotate Operation ...................................................................................................148
Branches and Control Transfer .................................................................................................148
Bit Operations ...........................................................................................................................148
Table Read Operations .............................................................................................................148
Other Operations.......................................................................................................................148
Instruction Set Summary ................................................................................. 149
Table Conventions.....................................................................................................................149
Instruction Denition........................................................................................ 151
Package Information ........................................................................................ 160
24-pin SSOP (150mil) Outline Dimensions ...............................................................................161
28-pin SSOP (150mil) Outline Dimensions ...............................................................................162

Rev. 1.10 6 November 04, 2019 Rev. 1.10 7 November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Features
CPU Features
• Operating voltage
♦fSYS= 8MHz: 2.2V~5.5V
• Up to 0.5μs instruction cycle with 8MHz system clock at VDD=5V
• Power down and wake-up functions to reduce power consumption
• Oscillator types
♦Internal High Speed 8MHz RC – HIRC
♦Internal Low Speed 32kHz RC – LIRC
• Multi-mode operation: FAST, SLOW, IDLE and SLEEP
• Fully integrated internal high speed and low speed RC oscillators require no external components
• All instructions executed in one or two instruction cycles
• Table read instructions
• 63 powerful instructions
• 6-level subroutine nesting
• Bit manipulation instruction
Peripheral Features
• Flash Program Memory: 4K×15
• RAM Data Memory: 256×8
• Emulated EEPROM Memory: 32×15
• Watchdog Timer function
• 23 bidirectional I/O lines
• Two pin-shared external interrupts
• Multiple Timer Modules for time measurement, input capture, compare match output or PWM
output or single pulse output function
• Universal Serial Interface Module – USIM for SPI, I2C or UART communication
• Dual Time-Base functions for generation of xed time interrupt signals
• 10 external channels 12-bit resolution A/D converter
• Battery charger circuit
♦14-bit D/A Converter and OPA0 are used for constant current control
♦12-bit D/A Converter and OPA1 are used for constant voltage control
♦OPA2 is 20 times amplier for current sense
• Software controlled 4-SCOM lines LCD driver with 1/2 bias
• 16-bit Cyclic Redundancy Check Unit
• Low voltage reset function
• Package types: 24/28-pin SSOP

Rev. 1.10 6 November 04, 2019 Rev. 1.10 7 November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
General Description
The HT45F5Q-3 is a Flash Memory A/D type 8-bit high performance RISC architecture
microcontroller especially designed for battery charger applications. Oering users the convenience
of Flash Memory multi-programming features, this device also includes a wide range of functions
and features. Other memory includes an area of RAM Data Memory as well as an area of Emulated
EEPROM memory for storage of non-volatile data such as serial numbers, calibration data etc.
Analog feature includes a multi-channel 12-bit A/D converter function. An extremely exible Timer
Module provides timing, pulse generation and PWM generation functions. Communication with the
outside world is catered for by including fully integrated SPI, I2C and UART interface functions,
three popular interfaces which provide designers with a means of easy communication with external
peripheral hardware. Protective features such as an internal Watchdog Timer and Low Voltage
Reset coupled with excellent noise immunity and ESD protection ensure that reliable operation is
maintained in hostile electrical environments.
A full choice of internal low and high speed oscillator functions is provided including a fully
integrated system oscillator which requires no external components for its implementation. The
ability to operate and switch dynamically between a range of operating modes using different
clock sources gives users the ability to optimise microcontroller operation and minimise power
consumption.
For AC/DC charger applications, the device includes a battery charger management module, which
can be used for the constant voltage and constant current closed loop charging control. The device
therefore reduces the need for the usually required external TL431 component, operational amplier
and resistance analogic D/A Converter in traditional battery charging circuits. Therefore the
peripheral circuit is more reduced, resulting in a smaller PCB area.
The charger management module is composed of two parts. The rst part contains two groups of
OPAs and D/A Converters, which are used to control the charging voltage and current. The upper
limit value of the charger constant current and constant voltage can be obtained by configuring
the D/A Converters in the software. The 14-bit D/A Converter is used for constant current control
while the 12-bit D/A Converter is used for constant voltage control. The second part of the charger
management contains a fixed gain operational amplifier which is used for current amplification.
This improves the current resolution and allows the use of smaller current detection resistors thus
reducing the resistor power consumption.
The D/A Converter in the charger management module is not only used for setting charging
voltage and current, but also can be used together with the specic charger production xtures for
improving the traditional manual calibration techniques. By using the external production xtures,
the charger current voltage/current conditions can be conrmed. If the margin of errors is exceeded,
the MCU will correct the error by ne tuning the D/A Converter, and store the corrected parameters
to Emulated EEPROM. When the charger is recharged, the D/A Converter will be given a new
correction value to implement correction purpose. Refer to the Holtek application notes for more
details.
The inclusion of flexible I/O programming features, Time-Base functions along with many
other features, further enhance device functionality and flexibility for wide range of application
possibilities.

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HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Block Diagram
Interrupt
Controller
Bus
Reset
Circuit
INT0~
INT1
Pin-Shared
With Port A
HT8 MCU Core
OPAE
OPA0N
OPA1N
OPA1
+
_
OPA0
+
_
VDD
VDD
VDD
AN0~AN9
Pin-Shared
With Port B/C
Analog to Digital Converter
VREF
PA0~PA7
Port A
Driver
Timers
Pin-Shared
Function
I/O
VDD
VSS
VDD
VSS
SCOM
Pin-Shared
With Port B
PB0~PB7
Port B
Driver
PC0~PC6
Port C
Driver
CRC
OPA1P
Pin-Shared
With Port A
OPA0P Sink only
Sink only
OPA2P OPA2
LIRC
32kHz
USIM
Clock System
MUX
HIRC
8MHz
Stack
6-level
RAM
256 ×8
ROM
4K ×15
Emulated
EEPROM
32 ×15
Watchdog
Timer LVR
MUX
12-bit
ADC
12-bit DAC
14-bit DAC
Battery Charge Module
Digital Peripherals
Time Bases
: Pin-Shared Node : USIM including SPI, I2C & UART
Analog Peripherals
Pin-Shared
With Port A
SYSCLK
Pin Assignment
PB7/AN7
PA2/OCDSCK/ICPCK
PA5/OPA0P/CTPB
OPA0N
PB0/AN0
OPAE
VDD
OPA1N
VSS
PB5/AN5
PA6/OPA1P/STPB
PB2/AN2/STPI
PB3/AN3
PB1/AN1/VREF
PC0/AN8/SCS
PB4/AN4
PA1/OPA2P
PB6/AN6/INT1
PA0/OCDSDA/ICPDA
PC1/AN9/SCK/SCL
PA3/CTP/CTCK/INT0/SDO/TX PA4/STP/STCK/SDI/SDA/RX
PA7/SDO/TX
PC2/SDI/SDA/RX
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
HT45F5Q-3/HT45V5Q-3
24 SSOP-A

Rev. 1.10 8 November 04, 2019 Rev. 1.10 9 November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
PB7/AN7
PA2/OCDSCK/ICPCK
PA5/OPA0P/CTPB
OPA0N
PB0/AN0
OPAE
VDD
OPA1N
VSS
PB5/AN5
PA6/OPA1P/STPB
PB2/AN2/STPI
PB3/AN3
PB1/AN1/VREF
PC0/AN8/SCS
PB4/AN4
PA1/OPA2P
PB6/AN6/INT1
PA0/OCDSDA/ICPDA
PC1/AN9/SCK/SCL
PA3/CTP/CTCK/INT0/SDO/TX
PA4/STP/STCK/SDI/SDA/RX PA7/SDO/TX
PC2/SDI/SDA/RX
PC6/SCOM3
PC5/SCOM2
PC4/SCOM1/SCS
PC3/SCOM0/SCK/SCL
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
HT45F5Q-3/HT45V5Q-3
28 SSOP-A
Note: 1. If the pin-shared pin functions have multiple outputs simultaneously, the desired pin-shared function is
determined by the corresponding software control bits.
2. The OCDSDA and OCDSCK pins are supplied for the OCDS dedicated pins and as such only available
for the HT45V5Q-3 device which is the OCDS EV chip for the HT45F5Q-3 device.
3. For the less pin count package type there will be unbounded pins which should be properly congured
to avoid unwanted power consumption resulting from oating input conditions. Refer to the “Standby
Current Considerations” and “Input/Output Ports” sections.
Pin Description
The function of each pin is listed in the following table, however the details behind how each pin
is congured is contained in other sections of the datasheet. As the Pin Description table shows the
situation for the package with the most pins, not all pins in the table will be available on smaller
package sizes.
Pin Name Function OPT I/T O/T Description
PA0/OCDSDA/ICPDA
PA0 PAPU
PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
OCDSDA — ST CMOS OCDS address/data, for EV chip only
ICPDA — ST CMOS ICP address/data
PA1/OPA2P PA1
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
OPA2P PAS0 AN — Operational amplier 2 positive input
PA2/OCDSCK/ICPCK
PA2 PAPU
PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
OCDSCK — ST — OCDS clock, for EV chip only
ICPCK — ST — ICP clock
PA3/CTP/CTCK/INT0/SDO/TX
PA3
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
CTP PAS0 — CMOS CTM output
CTCK PAS0 ST — CTM clock input
INT0
PAS0
INTEG
INTC0
ST — External interrupt 0 input
SDO PAS0 — CMOS SPI serial data output
TX PAS0 — CMOS UART TX serial data output

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HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Pin Name Function OPT I/T O/T Description
PA4/STP/STCK/SDI/SDA/RX
PA4
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
STP PAS1 — CMOS STM output
STCK PAS1 ST — STM clock input
SDI PAS1
IFS ST — SPI serial data input
SDA PAS1
IFS ST NMOS I2C data line
RX PAS1
IFS ST — UART RX serial data input
PA5/OPA0P/CTPB
PA5
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
OPA0P PAS1 AN — Operational amplier 0 positive input
CTPB PAS1 — CMOS CTM inverting output
PA6/OPA1P/STPB
PA6
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
OPA1P PAS1 AN — Operational amplier 1 positive input
STPB PAS1 — CMOS STM inverting output
PA7/SDO/TX
PA7
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
SDO PAS1 — CMOS SPI serial data output
TX PAS1 — CMOS UART TX serial data output
PB0/AN0 PB0 PBPU
PBS0 ST CMOS General purpose I/O. Register enabled pull-up
AN0 PBS0 AN — A/D Converter external input 0
PB1/AN1/VREF
PB1 PBPU
PBS0 ST CMOS General purpose I/O. Register enabled pull-up
AN1 PBS0 AN — A/D Converter external input 1
VREF PBS0 AN — A/D Converter external reference voltage input
PB2/AN2/STPI
PB2 PBPU
PBS0 ST CMOS General purpose I/O. Register enabled pull-up
AN2 PBS0 AN — A/D Converter external input 2
STPI PBS0 ST — STM capture input
PB3/AN3 PB3 PBPU
PBS0 ST CMOS General purpose I/O. Register enabled pull-up
AN3 PBS0 AN — A/D Converter external input 3
PB4/AN4 PB4 PBPU
PBS1 ST CMOS General purpose I/O. Register enabled pull-up
AN4 PBS1 AN — A/D Converter external input 4
PB5/AN5 PB5 PBPU
PBS1 ST CMOS General purpose I/O. Register enabled pull-up
AN5 PBS1 AN — A/D Converter external input 5
PB6/AN6/INT1
PB6 PBPU
PBS1 ST CMOS General purpose I/O. Register enabled pull-up
AN6 PBS1 AN — A/D Converter external input 6
INT1
PBS1
INTEG
INTC0
ST — External interrupt 1 input

Rev. 1.10 10 November 04, 2019 Rev. 1.10 11 November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Pin Name Function OPT I/T O/T Description
PB7/AN7 PB7 PBPU
PBS1 ST CMOS General purpose I/O. Register enabled pull-up
AN7 PBS1 AN — A/D Converter external input 7
PC0/AN8/SCS
PC0 PCPU
PCS0 ST CMOS General purpose I/O. Register enabled pull-up
AN8 PCS0 AN — A/D Converter external input 8
SCS PCS0
IFS ST CMOS SPI slave select
PC1/AN9/SCK/SCL
PC1 PCPU
PCS0 ST CMOS General purpose I/O. Register enabled pull-up
AN9 PCS0 AN — A/D Converter external input 9
SCK PCS0
IFS ST CMOS SPI serial clock
SCL PCS0
IFS ST NMOS I2C clock line
PC2/SDI/SDA/RX
PC2 PCPU
PCS0 ST CMOS General purpose I/O. Register enabled pull-up
SDI PCS0
IFS ST — SPI serial data input
SDA PCS0
IFS ST NMOS I2C data line
RX PCS0
IFS ST — UART RX serial data input
PC3/SCOM0/SCK/SCL
PC3 PCPU
PCS0 ST CMOS General purpose I/O. Register enabled pull-up
SCOM0 PCS0 — AN Software LCD COM output
SCK PCS0
IFS ST CMOS SPI serial clock
SCL PCS0
IFS ST NMOS I2C clock line
PC4/SCOM1/SCS
PC4 PCPU
PCS1 ST CMOS General purpose I/O. Register enabled pull-up
SCOM1 PCS1 — AN Software LCD COM output
SCS PCS1
IFS ST CMOS SPI slave select
PC5/SCOM2 PC5 PCPU
PCS1 ST CMOS General purpose I/O. Register enabled pull-up
SCOM2 PCS1 — AN Software LCD COM output
PC6/SCOM3 PC6 PCPU
PCS1 ST CMOS General purpose I/O. Register enabled pull-up
SCOM3 PCS1 ─AN Software LCD COM output
OPA0N OPA0N — AN — Operational amplier 0 negative input
OPA1N OPA1N — AN — Operational amplier 1 negative input
OPAE OPAE — ─AN Operational amplier output
VDD VDD — PWR — Positive power supply
VSS VSS — PWR — Negative power supply, ground
Legend: I/T: Input type; O/T: Output type;
OPT: Optional by register option; PWR: Power;
ST: Schmitt Trigger input; CMOS: CMOS output;
NMOS: NMOS output; AN: Analog signal.

Rev. 1.10 12 November 04, 2019 Rev. 1.10 13 November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
Absolute Maximum Ratings
Supply Voltage ...........................................................................................................VSS-0.3V to 6.0V
Input Voltage ..................................................................................................... VSS-0.3V to VDD+0.3V
Storage Temperature..................................................................................................... -50°C to 125°C
Operating Temperature................................................................................................. -40°C to 105°C
IOH Total ...................................................................................................................................... -80mA
IOL Total ....................................................................................................................................... 80mA
Total Power Dissipation ........................................................................................................... 500mW
Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute
Maximum Ratings” may cause substantial damage to the device. Functional operation of the
device at other conditions beyond those listed in the specication is not implied and prolonged
exposure to extreme conditions may aect device reliability.
D.C. Characteristics
For data in the following tables, note that factors such as oscillator type, operating voltage, operating
frequency, pin load conditions, temperature and program instruction type, etc., can all exert an
inuence on the measured values.
Operating Voltage Characteristics
Ta=-40°C~105°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD
Operating Voltage – HIRC fSYS=fHIRC=8MHz 2.2 — 5.5 V
Operating Voltage – LIRC fSYS=fLIRC=32kHz 2.2 — 5.5 V
Operating Current Characteristics
Ta=-40°C~105°C
Symbol Operating Mode Test Conditions Min. Typ. Max. Unit
VDD Conditions
IDD
SLOW Mode – LIRC 5V fSYS=32kHz, OPA0/1 enable — 0.6 1.2 mA
FAST Mode – HIRC 5V fSYS=8MHz, OPA0/1 enable — 2.2 3.6 mA
Note: When using the characteristic table data, the following notes should be taken into consideration:
1. Any digital inputs are setup in a non-oating condition.
2. All measurements are taken under conditions of no load and with all peripherals in an o state.
3. There are no DC current paths.
4. All Operating Current values are measured using a continuous NOP instruction program loop.
Standby Current Characteristics
Ta=25°C, unless otherwise specied
Symbol Standby Mode Test Conditions Min. Typ. Max. Max.
@85°C
Max.
@105°C Unit
VDD Conditions
ISTB
SLEEP Mode 5V WDT on — 0.6 1.2 1.2 1.2 mA
IDLE0 Mode – LIRC 5V fSUB on — 0.6 1.2 1.2 1.2 mA
IDLE1 Mode – HIRC 5V fSUB on, fSYS=8MHz — 1.2 2.0 2.0 2.0 mA
Note: When using the characteristic table data, the following notes should be taken into consideration:
1. Any digital inputs are setup in a non-oating condition.
2. All measurements are taken under conditions of no load and with all peripherals in an o state.
3. There are no DC current paths.
4. All Standby Current values are taken after a HALT instruction execution thus stopping all instruction execution.

Rev. 1.10 12 November 04, 2019 Rev. 1.10 13 November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
A.C. Characteristics
For data in the following tables, note that factors such as oscillator type, operating voltage, operating
frequency and temperature etc., can all exert an inuence on the measured values.
High Speed Internal Oscillator – HIRC – Frequency Accuracy
During the program writing operation the writer will trim the HIRC oscillator at a user selected
HIRC frequency and user selected voltage of either 3V or 5V.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Temp.
fHIRC 8MHz Writer Trimmed HIRC Frequency
3V/5V
25°C -1% 8 +1%
MHz
-40°C~85°C -2% 8 +2%
-40°C~105°C -2% 8 +2%
2.2V~5.5V
25°C -2.5% 8 +2.5%
-40°C~85°C -3% 8 +3%
-40°C~105°C -3% 8 +3%
Note: 1. The 3V/5V values for VDD are provided as these are the two selectable xed voltages at which the HIRC
frequency is trimmed by the writer.
2. The row below the 3V/5V trim voltage row is provided to show the values for the full VDD range operating
voltage. It is recommended that the trim voltage is xed at 3V for application voltage ranges from 2.2V
to 3.6V and xed at 5V for application voltage ranges from 3.3V to 5.5V.
3. The minimum and maximum tolerance values provided in the table are only for the frequency at which
the writer trims the HIRC oscillator. After trimming at this chosen specific frequency any change in
HIRC oscillator frequency using the oscillator register control bits by the application program will give a
frequency tolerance to within ±20%.
Low Speed Internal Oscillator Characteristics – LIRC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Temp.
fLIRC LIRC Frequency
5V 25°C 25.6 32.0 38.4 kHz
2.2V~5.5V
25°C 12.8 32.0 41.6
kHz-40°C~85°C 8 32 60
-40°C~105°C 6 32 64
tSTART LIRC Start Up Time — 25°C — — 100 μs
Operating Frequency Characteristic Curves
System Operating Frequency
Operating Voltage
8MHz
2.2V
~ ~
5.5V
~
~
~ ~

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System Start Up Time Characteristics
Ta=-40°C~105°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
tSST
System Start-up Time
(Wake-up from condition where fSYS is o󰀨)
— fSYS=fH~fH/64, fH=fHIRC — 16 — tHIRC
— fSYS=fSUB=fLIRC — 2 — tLIRC
System Start-up Time
(Wake-up from condition where fSYS is on)
— fSYS=fH~fH/64, fH=fHIRC — 2 — tH
— fSYS=fSUB=fLIRC — 2 — tSUB
System Speed Switch Time
(FAST to SLOW Mode or SLOW to FAST
Mode)
— fHIRC switches from o󰀨 → on — 16 — tHIRC
tRSTD
System Reset Delay Time
(Reset source from Power-on Reset or
LVR Hardware Reset)
— RRPOR=5V/ms
8.3 16.7 50.0 ms
System Reset Delay Time
(LVRC/WDTC Software Reset) — —
System Reset Delay Time
(Reset source from WDT Overow) — — 8.3 16.7 50.0 ms
tSRESET Minimum Software Reset Width to Reset — — 45 90 375 μs
Note: 1. For the System Start-up time values, whether fSYS is on or o depends upon the mode type and the chosen
fSYS system oscillator. Details are provided in the System Operating Modes section.
2. The time units, shown by the symbol tHIRC etc. are the inverse of the corresponding frequency values as
provided in the frequency tables. For example tHIRC=1/fHIRC, tSYS=1/fSYS etc.
3. If the LIRC is used as the system clock and if it is o when in the SLEEP Mode, then an additional LIRC start
up time, tSTART, as provided in the LIRC frequency table, must be added to the tSST time in the table above.
4. The System Speed Switch Time is eectively the time taken for the newly activated oscillator to start up.
Input/Output Characteristics
Ta=-40°C~105°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VIL Input Low Voltage for I/O Ports or Input Pins 5V — 0 — 1.5 V
— — 0 — 0.2VDD
VIH Input High Voltage for I/O Ports or Input Pins 5V — 3.5 — 5.0 V
— — 0.8VDD — VDD
IOL Sink Current for I/O Ports 3V VOL=0.1VDD
16 32 — mA
5V 32 65 —
IOH Source Current for I/O Ports 3V VOH=0.9VDD
-4 -8 — mA
5V -8 -16 —
RPH Pull-high Resistance for I/O Ports (Note) 3V — 20 60 100 kΩ
5V — 10 30 50
ILEAK Input Leakage Current 5V VIN=VDD or VIN=VSS — — ±1 μA
tTCK TM Clock Input Minimum Pulse Width — — 0.3 — — μs
tTPI TM Capture Input Minimum Pulse Width — — 0.3 — — μs
tINT External Interrupt Input Minimum Pulse Width — — 0.3 — — μs
Note: The RPH internal pull high resistance value is calculated by connecting to ground and enabling the input pin
with a pull-high resistor and then measuring the pin current at the specied supply voltage level. Dividing
the voltage by this measured current provides the RPH value.

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Memory Characteristics
Ta=-40°C~105°C, unless otherwise specied
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
Flash Program / Emulated EEPROM Memory
VDD
Operating Voltage for Read — — 2.2 — 5.5 V
Operating Voltage for Erase/Write — — 4.5 5.0 5.5
tDEW
Erase / Write Time – Flash Program Memory 5V — — 2 3 ms
Erase / Write Cycle Time – Emulated
EEPROM Memory
— EWRTS[1:0]=00B — 2 3
ms
— EWRTS[1:0]=01B — 4 6
— EWRTS[1:0]=10B — 8 12
— EWRTS[1:0]=11B — 16 24
IDDPGM Programming / Erase Current on VDD 5V — — — 5.0 mA
EPCell Endurance — — 10K — — E/W
tRETD ROM Data Retention time — Ta=25°C — 40 — Year
RAM Data Memory
VDD Operating Voltage for Read/Write — — VDDmin — VDDmax V
VDR RAM Data Retention Voltage — Device in SLEEP Mode 1.0 — — V
Note: The Emulated EEPROM erase/write operation can only be executed when the fSYS clock frequency is equal
to or greater than 2MHz.
LVR Electrical Characteristics
Ta=-40°C~105°C, unless otherwise specied
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VLVR Low Voltage Reset Voltage — LVR enable, Ta= -40°C~85°C -5% 2.1 +5% V
LVR enable, Ta = -40°C~105°C -6% 2.1 +6%
tLVR Minimum Low Voltage Width to Reset — — 120 240 480 μs
ILVR Additional Current for LVR Enable 5V — — — 90 μA
A/D Converter Electrical Characteristics
Ta=-40°C~105°C, unless otherwise specied
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VDD A/D Converter Operating Voltage — — VLVR — 5.5 V
VADI A/D Converter Input Voltage — — 0 — VREF V
VREF A/D Converter Reference Voltage — — 2 — VDD V
NRA/D Converter Resolution — — — — 12 Bit
DNL A/D Converter Di󰀨erential Non-linearity —
VREF=VDD, tADCK=0.5μs,
Ta=-40°C~85°C -3 — 3
LSB
VREF=VDD, tADCK=0.5μs,
Ta=-40°C~105°C -4 — 4
INL A/D Converter Integral Non-linearity —
VREF=VDD, tADCK=0.5μs,
Ta=-40°C~85°C -4 — 4
LSB
VREF=VDD, tADCK=0.5μs,
Ta=-40°C~105°C -5 — 5

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Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
IADC Additional Current for A/D Converter Enable
2.2V
No load, tADCK=0.5μs
— 300 420 μA
3V — 340 500 μA
5V — 500 700 μA
tADCK A/D Converter Clock Period — — 0.5 — 10.0 μs
tON2ST A/D Converter On-to-Start Time — — 4 — — μs
tADS A/D Sampling Time — — — 4 — tADCK
tADC
A/D Conversion Time
(Including A/D Sample and Hold Time) — — — 16 — tADCK
GERR A/D Conversion Gain Error — VREF=VDD -4 — 4 LSB
OSRR A/D Conversion O󰀨set Error — VREF=VDD -4 — 4 LSB
D/A Converter Electrical Characteristics
Ta=-40°C~105°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VDACO D/A Converter Output Voltage Range — — VSS — VDD V
IDAC
Additional Current for D/A Converter 0 Enable 5V — — 600 800 μA
Additional Current for D/A Converter 1 Enable 5V — — 500 600 μA
tST D/A Converter Settling Time 5V CLOAD=50pF — — 5 μs
DNL D/A Converter 0 Di󰀨erential Non-linearity 5V VREF=VDD
— ±6 ±12 LSB
D/A Converter 1 Di󰀨erential Non-linearity — ±4 ±10
INL D/A Converter 0 Integral Non-linearity 5V VREF=VDD
— ±8 ±16 LSB
D/A Converter 1 Integral Non-linearity — ±6 ±12
Ro D/A Converter 0/1 R2R Output Resistor 5V — — 13 — kΩ
Operational Amplier Electrical Characteristics
Ta=-40°C~105°C, unless otherwise specied
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
IOPA Additional Current for Each OPA 5V No load — 300 600 μA
VOS Input O󰀨set Voltage
5V OPA0/1 without calibration
Ta=25°C -7 5 7 mV
5V OPA2 without calibration
(OOF[5:0]=100000B) -15 — 15 mV
5V OPA2 with calibration -2 — 2 mV
VCM Common Mode Voltage Range 5V — VSS — VDD-1.4 V
ISINK Output Sink Current 3V VOL=0.3V 0.7 1.2 — mA
5V VOL=0.5V 1.6 2.8 — mA

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Software Controlled LCD Driver Electrical Characteristics
Ta=-40°C~105°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
IBIAS VDD/2 Bias Current for LCD
3V ISEL[1:0]=00B 10.5 15.0 19.5
μA
5V 17.5 25.0 32.5
3V ISEL[1:0]=01B 21 30 39
5V 35 50 65
3V ISEL[1:0]=10B 42 60 78
5V 70 100 130
3V ISEL[1:0]=11B 82.6 118.0 153.4
5V 140 200 260
VSCOM VDD/2 Voltage for LCD COM Ports 2.2V~5.5V No load 0.475
VDD
0.500
VDD
0.525
VDD
V
Power-on Reset Characteristics
Ta=-40°C~105°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VPOR VDD Start Voltage to Ensure Power-on Reset — — — — 100 mV
RRPOR VDD Rising Rate to Ensure Power-on Reset — — 0.035 — — V/ms
tPOR
Minimum Time for VDD Stays at VPOR to Ensure
Power-on Reset — — 1 — — ms
VDD
tPOR RRPOR
VPOR
Time

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System Architecture
A key factor in the high-performance features of the Holtek range of microcontrollers is attributed
to their internal system architecture. The device takes advantage of the usual features found within
RISC microcontrollers providing increased speed of operation and Periodic performance. The
pipelining scheme is implemented in such a way that instruction fetching and instruction execution
are overlapped, hence instructions are eectively executed in one cycle, with the exception of branch
or call instructions. An 8-bit wide ALU is used in practically all instruction set operations, which
carries out arithmetic operations, logic operations, rotation, increment, decrement, branch decisions,
etc. The internal data path is simplified by moving data through the Accumulator and the ALU.
Certain internal registers are implemented in the Data Memory and can be directly or indirectly
addressed. The simple addressing methods of these registers along with additional architectural
features ensure that a minimum of external components is required to provide a functional I/O and
A/D control system with maximum reliability and exibility. This makes the device suitable for low-
cost, high-volume production for controller applications.
Clocking and Pipelining
The main system clock, derived from either an HIRC or LIRC oscillator is subdivided into four
internally generated non-overlapping clocks, T1~T4. The Program Counter is incremented at the
beginning of the T1 clock during which time a new instruction is fetched. The remaining T2~T4
clocks carry out the decoding and execution functions. In this way, one T1~T4 clock cycle forms
one instruction cycle. Although the fetching and execution of instructions takes place in consecutive
instruction cycles, the pipelining structure of the microcontroller ensures that instructions are
effectively executed in one instruction cycle. The exception to this are instructions where the
contents of the Program Counter are changed, such as subroutine calls or jumps, in which case the
instruction will take one more instruction cycle to execute.
For instructions involving branches, such as jump or call instructions, two machine cycles are
required to complete instruction execution. An extra cycle is required as the program takes one
cycle to rst obtain the actual jump or call address and then another cycle to actually execute the
branch. The requirement for this extra cycle should be taken into account by programmers in timing
sensitive applications.
Fetch Inst. (PC)
(System Clock)
fSYS
Phase Clock T1
Phase Clock T2
Phase Clock T3
Phase Clock T4
Program Counter PC PC+1 PC+2
Pipelining Execute Inst. (PC-1) Fetch Inst. (PC+1)
Execute Inst. (PC) Fetch Inst. (PC+2)
Execute Inst. (PC+1)
System Clocking and Pipelining

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Fetch Inst. 1
1 MOV A,[12H]
2 CALL DELAY
3 CPL [12H]
4 :
5 :
6 DELAY: NOP
Execute Inst. 1
Fetch Inst. 2 Execute Inst. 2
Fetch Inst. 3 Flush Pipeline
Fetch Inst. 6 Execute Inst. 6
Fetch Inst. 7
Instruction Fetching
Program Counter
During program execution, the Program Counter is used to keep track of the address of the
next instruction to be executed. It is automatically incremented by one each time an instruction
is executed except for instructions, such as “JMP” or “CALL” that demand a jump to a non-
consecutive Program Memory address. Only the lower 8 bits, known as the Program Counter Low
Register, are directly addressable by the application program.
When executing instructions requiring jumps to non-consecutive addresses such as a jump
instruction, a subroutine call, interrupt or reset, etc., the microcontroller manages program control
by loading the required address into the Program Counter. For conditional skip instructions, once
the condition has been met, the next instruction, which has already been fetched during the present
instruction execution, is discarded and a dummy cycle takes its place while the correct instruction is
obtained.
Program Counter
Program Counter High Byte PCL Register
PC11~PC8 PCL7~PCL0
Program Counter
The lower byte of the Program Counter, known as the Program Counter Low register or PCL, is
available for program control and is a readable and writeable register. By transferring data directly
into this register, a short program jump can be executed directly; however, as only this low byte
is available for manipulation, the jumps are limited to the present page of memory that is 256
locations. When such program jumps are executed it should also be noted that a dummy cycle
will be inserted. Manipulating the PCL register may cause program branching, so an extra cycle is
needed to pre-fetch.
Stack
This is a special part of the memory which is used to save the contents of the Program Counter
only. The stack is organized into 6 levels and neither part of the data nor part of the program space,
and is neither readable nor writeable. The activated level is indexed by the Stack Pointer, and is
neither readable nor writeable. At a subroutine call or interrupt acknowledge signal, the contents of
the Program Counter are pushed onto the stack. At the end of a subroutine or an interrupt routine,
signaled by a return instruction, RET or RETI, the Program Counter is restored to its previous value
from the stack. After a device reset, the Stack Pointer will point to the top of the stack.
If the stack is full and an enabled interrupt takes place, the interrupt request ag will be recorded but
the acknowledge signal will be inhibited. When the Stack Pointer is decremented, by RET or RETI,
the interrupt will be serviced. This feature prevents stack overow allowing the programmer to use
the structure more easily. However, when the stack is full, a CALL subroutine instruction can still
be executed which will result in a stack overow. Precautions should be taken to avoid such cases
which might cause unpredictable program branching.

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If the stack is overow, the rst Program Counter save in the stack will be lost.
Stack
Pointer
Stack Level 2
Stack Level 1
Stack Level 3
:
:
:
Stack Level 6
Program
Memory
Program Counter
Bottom of Stack
Top of Stack
Arithmetic and Logic Unit – ALU
The arithmetic-logic unit or ALU is a critical area of the microcontroller that carries out arithmetic
and logic operations of the instruction set. Connected to the main microcontroller data bus, the ALU
receives related instruction codes and performs the required arithmetic or logical operations after
which the result will be placed in the specied register. As these ALU calculation or operations may
result in carry, borrow or other status changes, the status register will be correspondingly updated to
reect these changes. The ALU supports the following functions:
• Arithmetic operations:
ADD, ADDM, ADC, ADCM, SUB, SUBM, SBC, SBCM, DAA,
• Logic operations:
AND, OR, XOR, ANDM, ORM, XORM, CPL, CPLA,
• Rotation:
RRA, RR, RRCA, RRC, RLA, RL, RLCA, RLC,
• Increment and Decrement:
INCA, INC, DECA, DEC,
• Branch decision:
JMP, SZ, SZA, SNZ, SIZ, SDZ, SIZA, SDZA, CALL, RET, RETI
Flash Program Memory
The Program Memory is the location where the user code or program is stored. For the device the
Program Memory is Flash type, which means it can be programmed and re-programmed a large
number of times, allowing the user the convenience of code modication on the same device. By
using the appropriate programming tools, the Flash device oers users the exibility to conveniently
debug and develop their applications while also offering a means of field programming and
updating.
Structure
The Program Memory has a capacity of 4K×15 bits. The Program Memory is addressed by the
Program Counter and also contains data, table information and interrupt entries. Table data, which
can be setup in any location within the Program Memory, is addressed by a separate table pointer
register.