HT16H25 Treadmill Display Application Guideline
AN0505E V1.00 3 / 22 January 8, 2019
HT16H25 Communication
The device supports both I2C and SPI 3-wire communication modes, which can be used
for external functional setup and for data transmission. This application uses the
HT66F50 as the master MCU to communicate with the HT16H25 using the I2C interface.
There are two communication lines in the I2C interface which are, the serial data line,
SDA, and the serial clock line, SCL. Both lines are connected to 4.7kΩ pull-high resistors
to the positive power supply. When the bus is idle, both communication lines are high.
The high and low state of the data line SDA can only be changed when the clock line SCL
is low. When SCL is high, the value of SDA must remain the same.
Write Operations
The HT16H25 can perform write operations such as writing a single command, writing a
compound command, writing a single byte of display RAM data, writing a page of display
RAM data, etc.
To write a single command, first send the slave address "0111100" + R/W bit after the
START signal is sent, then send a command byte and finally send a STOP signal.
To write a compound command, after the command byte has been sent, continuous
register data can be sent, after which it is ended with a STOP signal. The timing for
writing a compound command is as follows:
Slave Address
ACKWrite
Register byte
ACK
S01111000
ACK
P
2nd
BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0BIT7
1 st
Command byte Register byte
nth
BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0BIT7
ACK ACK
To write a single byte of display RAM data, after the START signal, send the slave
address "0111100" + R / W bit, then send a display write command, an address byte, a
byte of display data and finally send a STOP signal. The display data is invalid if the
transmitted byte address range exceeds the address range.
To write a page of display RAM data, after the command byte and address byte has been
sent, continuous RAM display data can be sent. Each time a byte of display RAM data
has been sent, the address is automatically incremented until the maximum address
value is reached after which it will return to 00h. When the operation is completed a STOP
signal will be sent. The page write display RAM timing is as follows:
Slave Address
ACK
Write
ACK
S01111000
ACK
ACK
Data byte
PD7 D6 D5 D4 D3 D2 D1 D0
nth byte data
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
2rd byte data
ACK ACK
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
1st byte data
ACK
Address byteCommand byte
A0A1A2A3A4A5A6A7
BIT1BIT2BIT3BIT4BIT5BIT6BIT7 BIT0
