Holtek HT66F002 User manual

Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Revision: V1.71 Date: April 11, 2017

Rev. 1.71 2 April 11, 2017 Rev. 1.71 3 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Table of Contents
Features............................................................................................................ 6
CPU Features ......................................................................................................................... 6
Peripheral Features................................................................................................................. 6
General Description......................................................................................... 7
Selection Table................................................................................................. 7
Block Diagram.................................................................................................. 8
Pin Assignment................................................................................................ 8
Pin Description .............................................................................................. 10
Absolute Maximum Ratings.......................................................................... 14
D.C. Characteristics....................................................................................... 15
A.C. Characteristics....................................................................................... 16
ADC Electrical Characteristics ..................................................................... 17
OPA Electrical Characteristics ..................................................................... 17
LVR Electrical Characteristics...................................................................... 18
LCD Electrical Characteristics – HT66F004 ................................................ 18
Power on Reset Electrical Characteristics.................................................. 18
System Architecture...................................................................................... 19
Clocking and Pipelining......................................................................................................... 19
Program Counter................................................................................................................... 20
Stack ..................................................................................................................................... 21
Arithmetic and Logic Unit – ALU ........................................................................................... 21
Flash Program Memory................................................................................. 22
Structure................................................................................................................................ 22
Special Vectors ..................................................................................................................... 22
Look-up Table........................................................................................................................ 22
Table Program Example........................................................................................................ 23
In Circuit Programming – ICP ............................................................................................... 24
On-Chip Debug Support – OCDS ......................................................................................... 24
RAM Data Memory ......................................................................................... 25
Structure................................................................................................................................ 25
General Purpose Data Memory ............................................................................................ 25
Special Purpose Data Memory ............................................................................................. 25
Special Function Register Description........................................................ 29
Indirect Addressing Registers – IAR0, IAR1 ......................................................................... 29
Memory Pointers – MP0, MP1 .............................................................................................. 29
Bank Pointer – BP................................................................................................................. 30
Accumulator – ACC............................................................................................................... 30
Program Counter Low Register – PCL.................................................................................. 30
Look-up Table Registers – TBLP, TBLH................................................................................ 30
Status Register – STATUS .................................................................................................... 31

Rev. 1.71 2 April 11, 2017 Rev. 1.71 3 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
EEPROM Data Memory.................................................................................. 32
EEPROM Data Memory Structure ........................................................................................ 32
EEPROM Registers .............................................................................................................. 33
Reading Data from the EEPROM ........................................................................................ 34
Writing Data to the EEPROM................................................................................................ 35
Write Protection..................................................................................................................... 35
EEPROM Interrupt ................................................................................................................ 35
Programming Considerations................................................................................................ 36
Oscillator ........................................................................................................ 37
Oscillator Overview ............................................................................................................... 37
System Clock Congurations................................................................................................ 37
Internal RC Oscillator – HIRC ............................................................................................... 38
Internal 32kHz Oscillator – LIRC........................................................................................... 38
Supplementary Oscillator ...................................................................................................... 38
Operating Modes and System Clocks ......................................................... 38
System Clocks ...................................................................................................................... 38
System Operation Modes...................................................................................................... 39
Control Register .................................................................................................................... 40
Operating Mode Switching .................................................................................................... 42
NORMAL Mode to SLOW Mode Switching ........................................................................... 43
SLOW Mode to NORMAL Mode Switching .......................................................................... 44
Entering the SLEEP0 Mode .................................................................................................. 44
Entering the SLEEP1 Mode .................................................................................................. 45
Entering the IDLE0 Mode...................................................................................................... 45
Entering the IDLE1 Mode...................................................................................................... 45
Standby Current Considerations ........................................................................................... 46
Wake-up................................................................................................................................ 46
Watchdog Timer............................................................................................. 47
Watchdog Timer Clock Source.............................................................................................. 47
Watchdog Timer Control Register ......................................................................................... 47
Watchdog Timer Operation ................................................................................................... 48
Reset and Initialisation.................................................................................. 49
Reset Functions .................................................................................................................... 50
Reset Initial Conditions ......................................................................................................... 53
Input/Output Ports ......................................................................................... 56
Pull-high Resistors ................................................................................................................ 57
Port A Wake-up ..................................................................................................................... 58
I/O Port Control Registers ..................................................................................................... 58
Pin-shared Functions ............................................................................................................ 59
I/O Pin Structures.................................................................................................................. 64
System Clock output pin CLO ............................................................................................... 65
Programming Considerations................................................................................................ 65

Rev. 1.71 4 April 11, 2017 Rev. 1.71 5 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Timer Modules – TM ...................................................................................... 66
Introduction ........................................................................................................................... 66
TM Operation ........................................................................................................................ 66
TM Clock Source................................................................................................................... 66
TM Interrupts......................................................................................................................... 67
TM External Pins................................................................................................................... 67
TM Input/Output Pin Control Register ................................................................................... 67
Programming Considerations................................................................................................ 68
Standard Type TM – STM .............................................................................. 69
Standard TM Operation......................................................................................................... 69
Standard Type TM Register Description ............................................................................... 70
Standard Type TM Operating Modes .................................................................................... 74
Compare Output Mode.......................................................................................................... 74
Timer/Counter Mode ............................................................................................................. 77
PWM Output Mode................................................................................................................ 77
Single Pulse Mode ................................................................................................................ 80
Capture Input Mode .............................................................................................................. 82
Periodic Type TM – PTM................................................................................ 83
Periodic TM Operation .......................................................................................................... 83
Periodic Type TM Register Description................................................................................. 84
Periodic Type TM Operating Modes...................................................................................... 88
Compare Match Output Mode............................................................................................... 88
Timer/Counter Mode ............................................................................................................. 91
PWM Output Mode................................................................................................................ 91
Single Pulse Output Mode .................................................................................................... 93
Capture Input Mode .............................................................................................................. 95
Analog to Digital Converter .......................................................................... 97
A/D Overview ........................................................................................................................ 97
A/D Converter Register Description ...................................................................................... 98
A/D Converter Data Registers – SADOL, SADOH................................................................ 98
A/D Converter Control Registers – SADC0, SADC1, SADC2, PASR, PBSR ....................... 99
A/D Operation ..................................................................................................................... 101
A/D Converter Input Signal ................................................................................................. 102
Conversion Rate and Timing Diagram ................................................................................ 103
Summary of A/D Conversion Steps..................................................................................... 104
Programming Considerations.............................................................................................. 105
A/D Transfer Function ......................................................................................................... 105
A/D Programming Examples............................................................................................... 106

Rev. 1.71 4 April 11, 2017 Rev. 1.71 5 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Interrupts ...................................................................................................... 108
Interrupt Registers............................................................................................................... 108
Interrupt Operation ...............................................................................................................114
External Interrupt..................................................................................................................116
Multi-function Interrupt .........................................................................................................116
A/D Converter Interrupt ........................................................................................................116
Time Base Interrupts............................................................................................................117
EEPROM Interrupt ...............................................................................................................118
TM Interrupts........................................................................................................................118
Interrupt Wake-up Function..................................................................................................118
Programming Considerations...............................................................................................118
SCOM Function for LCD – HT66F004..........................................................119
LCD peration ........................................................................................................................119
LCD Bias Current Control ................................................................................................... 120
Application Circuits..................................................................................... 121
Instruction Set.............................................................................................. 122
Introduction ......................................................................................................................... 122
Instruction Timing ................................................................................................................ 122
Moving and Transferring Data............................................................................................. 122
Arithmetic Operations.......................................................................................................... 122
Logical and Rotate Operation ............................................................................................. 123
Branches and Control Transfer ........................................................................................... 123
Bit Operations ..................................................................................................................... 123
Table Read Operations ....................................................................................................... 123
Other Operations................................................................................................................. 123
Instruction Set Summary ............................................................................ 124
Table Conventions............................................................................................................... 124
Instruction Denition................................................................................... 126
Package Information ................................................................................... 135
8-pin SOP (150mil) Outline Dimensions ............................................................................. 136
10-pin SOP (150mil) Outline Dimensions ........................................................................... 137
10-pin MSOP Outline Dimensions ...................................................................................... 138
16-pin NSOP (150mil) Outline Dimensions......................................................................... 139
20-pin DIP (300mil) Outline Dimensions ............................................................................. 140
20-pin SOP (300mil) Outline Dimensions ........................................................................... 142
20-pin SSOP (150mil) Outline Dimensions ......................................................................... 143

Rev. 1.71 6 April 11, 2017 Rev. 1.71 7 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Features
CPU Features
• OperatingVoltage

♦fSYS=8MHz:2.2V~5.5V
• Upto0.5μsinstructioncyclewith8MHzsystemclockatVDD=5V
• Powerdownandwake-upfunctionstoreducepowerconsumption
• TwoOscillators

♦InternalRC--HIRC

♦Internal32kHz--LIRC
• Fullyintergratedinternal8MHzoscillatorrequiresnoexternalcomponents
• Multi-modeoperation:NORMAL,SLOW,IDLEandSLEEP
• Allinstructionsexecutedinoneortwoinstructioncycles
• Tablereadinstructions
• 63powerfulinstructions
• Upto4-levelsubroutinenesting
• Bitmanipulationinstruction
Peripheral Features
• FlashProgramMemory:1K×14/2K×15
• RAMDataMemory:64×8/96×8
• TrueEEPROMMemory:32×8
• WatchdogTimerfunction
• Upto18bidirectionalI/Olines
• Softwarecontrolled4-SCOMlinesLCDdriverwith1/2bias(onlyavailableforHT66F004)
• Multiplepin-sharedexternalinterrupts
• MultipleTimerModulesfortimemeasure,comparematchoutput,captureinput,PWMoutput,
singlepulseoutputfunctions
• DualTime-Basefunctionsforgenerationofxedtimeinterruptsignals
• Multi-channel12-bitresolutionA/Dconverter
• Lowvoltageresetfunction
• Widerangeofavailablepackagetypes
• Flashprogrammemorycanbere-programmedupto100,000times
• Flashprogrammemorydataretention>10years
• TrueEEPROMdatamemorycanbere-programmedupto1,000,000times
• TrueEEPROMdatamemorydataretention>10years

Rev. 1.71 6 April 11, 2017 Rev. 1.71 7 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
General Description
ThedevicesareFlashMemorytype8-bithighperformanceRISCarchitecturemicrocontrollers.
OfferinguserstheconvenienceofFlashMemorymulti-programmingfeatures,thesedevicesalso
includeawiderangeoffunctionsandfeatures.OthermemoryincludesanareaofRAMData
MemoryaswellasanareaoftrueEEPROMmemoryforstorageofnon-volatiledatasuchasserial
numbers,calibrationdataetc.
Analogfeaturesincludeamulti-channel12-bitA/Dconverterfunction.Multipleandextremely
flexibleTimerModulesprovidetiming,pulsegeneration,captureinput,comparematchoutput,
singlepulseoutputandPWMgenerationfunctions.ProtectivefeaturessuchasaninternalWatchdog
TimerandLowVoltageResetcoupledwithexcellentnoiseimmunityandESDprotectionensure
thatreliableoperationismaintainedinhostileelectricalenvironments.
AfullchoiceofHIRCandLIRCoscillatorfunctionsareprovidedincludingafullyintegrated
systemoscillatorwhichrequiresnoexternalcomponentsforitsimplementation.
TheinclusionofexibleI/Oprogrammingfeatures,Time-Basefunctionsalongwithmanyother
featuresensurethatthedeviceswillndexcellentuseinapplicationssuchaselectronicmetering,
environmentalmonitoring,handheldinstruments,householdappliances,electronicallycontrolled
tools,motordrivinginadditiontomanyothers.
Selection Table
Mostfeaturesarecommontoalldevices,themainfeaturedistinguishingthemareProgramMemory
andDatamemorycapacity.Thefollowingtablesummarisesthemainfeaturesofeachdevice.
Part No. Program
Memory
Data
Memory
Data
EEPROM I/O A/D Converter
Timer
Module
Time
Base Stack R-Type LCD
Package
HT66F002 1K×14 64×8 32×8 8 12-bit×4 10-bit STM×1 2 2 — 8SOP
10MSOP
HT66F0025 2K×14 64×8 32×8 8 12-bit×4 10-bit STM×1 2 4 — 8/10SOP
HT66F003 1K×14 64×8 32×8 14 12-bit×4 10-bit STM×1
10-bit PTM×1 2 2 — 16NSOP
HT66F004 2K×15 96×8 32×8 18 12-bit×8 10-bit PTM×2 2 4 4SCOM
16NSOP
20DIP/SOP
20SSOP

Rev. 1.71 8 April 11, 2017 Rev. 1.71 9 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Block Diagram
8-bit
RISC
MCU
Core
I/O
Time
Bases
Low Voltage
Reset
Interrupt
Controller
Reset
Circuit
12-bit A/D
Converter
RAM Data
Memory
Timer
Modules
Watchdog
Timer
Internal RC
Oscillators
Flash
Program
Memory
EEPROM
Data
Memory
Flash/EEPROM
Programming Circuitry
Note:LCDfunctionisonlyavailableforHT66F004.
Pin Assignment
HT66F002
10 MSOP-A
10
9
8
7
6
1
2
3
4
5
VDD/AVDD
PA6/STP0I/[STCK0]
PA5/INT/STP0B/AN3
PA7/[INT]/STCK0/RES/ICPCK
PA4
VSS/AVSS
PA0/[STP0]/[STP0I]/AN0/ICPDA
PA1/[STP0B]/AN1/VREF
PA2/[INT]/STP0/AN2/VREFO
PA3/[INT]
HT66F002/HT66F0025
8 SOP-A
VDD/AVDD
PA6/STP0I/[STCK0]
PA5/INT/STP0B/AN3
PA7/[INT]/STCK0/RES/ICPCK
VSS/AVSS
PA0/[STP0]/[STP0I]/AN0/ICPDA
PA1/[STP0B]/AN1/VREF
PA2/[INT]/STP0/AN2/VREFO
8
7
6
5
1
2
3
4
HT66F0025
10 SOP-A
10
9
8
7
6
1
2
3
4
5
VDD/AVDD
PA6/STP0I/[STCK0]
PA5/INT/STP0B/AN3
PA7/[INT]/STCK0/RES/ICPCK
PA4
VSS/AVSS
PA0/[STP0]/[STP0I]/AN0/ICPDA
PA1/[STP0B]/AN1/VREF
PA2/[INT]/STP0/AN2/VREFO
PA3/[INT]

Rev. 1.71 8 April 11, 2017 Rev. 1.71 9 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
VDD/AVDD
PB2/PTCK0/AN2
PA4/PTCK1/AN3
PA5/AN4/VREF
PA6/AN5/VREFO
PA7/PTP1/AN6
PB3/SCOM3/AN7
PB4/CLO/SCOM2
HT66F004/HT66V004
20 SOP-A/SSOP-A/DIP-A
VSS/AVSS
PC0/SCOM0
PC1/SCOM1
PC2/RES
PA0/PTP0/ICPDA/OCDSDA
PA1/PTP0I
PA2/ICPCK/OCDSCK
PA3/PTP1I
PB6/PTP1B
PB5/PTP0B
PB0/INT0/AN0
PB1/INT1/AN1
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
HT66F004/HT66V004
16 NSOP-A
16
15
14
13
12
11
10
9
2
3
4
5
6
7
8
1
VSS/AVSS
PC0/SCOM0
PC1/SCOM1
PC2/RES
PA0/PTP0/ICPDA/OCDSDA
PA1/PTP0I
PA2/ICPCK/OCDSCK
PA3/PTP1I
VDD/AVDD
PB2/PTCK0/AN2
PA4/PTCK1/AN3
PA5/AN4/VREF
PA6/AN5/VREFO
PA7/PTP1/AN6
PB0/INT0/AN0
PB1/INT1/AN1
HT66F003/HT66V003
16 NSOP-A
VSS/AVSS
PA0/[STP0I]/AN0/OCDSDA/ICPDA
PA1/AN1/VREF
PA2/[INT]/[STCK0]/AN2/OCDSCK/ICPCK
PA3/INT/STCK0/AN3
VDD/AVDD
PA6/[PTCK1]/STP0I/[STP0]
PA5/[INT]/PTP1I
PA7/[PTCK1]/[STP0B]/RES
PA4/[INT]/PTCK1/STP0
PB2/PTP1B
PB1/[PTCK1]/STP0B
PB0/[PTP1I]/VREFO
PB3/[PTP1]
PB4/[PTP1B]
PB5/PTP1
16
15
14
13
12
11
10
9
2
3
4
5
6
7
8
1
HT66V002/HT66V0025
16 NSOP-A
16
15
14
13
12
11
10
9
VDD/AVDD
PA6/STP0I/[STCK0]
PA5/INT/STP0B/AN3
PA4
NC
NC
OCDSCK
PA7/[INT]/STCK0/RES/ICPCK
VSS/AVSS
PA1/[STP0B]/AN1/VREF
PA2/[INT]/STP0/AN2/VREFO
PA3/[INT]
NC
NC
OCDSDA
PA0/[STP0]/[STP0I]/AN0/ICPDA
2
3
4
5
6
7
8
1
Note:1.Bracketedpinnamesindicatenon-defaultpinoutremappinglocations.
2.AVDD&VDDmeanstheVDDandAVDDarethedoublebonding.VSS&AVSSmeanstheVSSand
AVSSarethedoublebonding.
3.TheOCDSDAandOCDSCKpinsaretheOCDSdedicatedpins

Rev. 1.71 10 April 11, 2017 Rev. 1.71 11 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Pin Description
Withtheexceptionofthepowerpinsandsomerelevanttransformercontrolpins,allpinsonthese
devicescanbereferencedbytheirPortname,e.g.PA0,PA1etc,whichrefertothedigitalI/O
functionofthepins.HoweverthesePortpinsarealsosharedwithotherfunctionsuchastheAnalog
toDigitalConverter,TimerModulepinsetc.Thefunctionofeachpinislistedinthefollowingtable,
howeverthedetailsbehindhoweachpiniscongurediscontainedinothersectionsofthedatasheet.
HT66F002/HT66F0025
Pin Name Function OPT I/T O/T Description
PA0/[STP0]/
[STP0I]/AN0/
ICPDA
PA0
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
STP0 PASR — CMOS TM0 (STM) output
STP0I PASR
IFS0 ST — TM0 (STM) input
AN0 PASR AN — ADC input channel 0
ICPDA — ST CMOS ICP Data Line
PA1/[STP0B]/
AN1/VREF
PA1
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
STP0B PASR — CMOS TM0 (STM) inverting output
AN1 PASR AN — ADC input channel 1
VREF PASR AN — ADC VREF Input
PA2/[INT]/
STP0/AN2/
VREFO
PA2
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
INT PASR
IFS0 ST — External interrupt input
STP0 PASR — CMOS TM0 (STM) output
AN2 PASR AN — ADC input channel 2
VREFO PASR — AN ADC reference voltage output
PA3/[INT]
PA3
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
INT PASR
IFS0 ST — External interrupt input
PA4 PA4 PAWU
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
PA5/INT/
STP0B/AN3
PA5
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
INT PASR
IFS0 ST — External interrupt input
STP0B PASR — CMOS TM0 (STM) inverting output
AN3 PASR AN — ADC input channel 3
PA6/STP0I/
[STCK0]
PA6 PAWU
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
STP0I IFS0 ST — TM0 (STM) input
STCK0 IFS0 ST — TM0 (STM) clock input

Rev. 1.71 10 April 11, 2017 Rev. 1.71 11 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Pin Name Function OPT I/T O/T Description
PA7/[INT]/
STCK0/RES/
ICPCK
PA7 PAWU
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
INT IFS0 ST — External interrupt input
STCK0 IFS0 ST — TM0 (STM) clock input
RES RSTC ST — External reset input
ICPCK — ST CMOS ICP Clock Line
VDD VDD — PWR — Digital positive power supply
AVDD AVDD — PWR — Analog positive power supply
VSS VSS — PWR — Digital negative power supply
AVSS AVSS — PWR — Analog negative power supply
OCDSCK OCDSCK — ST —
On Chip Debug System Clock Line (OCDS EV only)
OCDSDA OCDSDA — ST CMOS On Chip Debug System Data Line (OCDS EV only)
HT66F003
Pin Name Function OPT I/T O/T Description
PA0/[STP0I]/
AN0
/OCDSDA/
ICPDA
PA0
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
STP0I PASR
IFS0 ST — TM0 (STM) input
AN0 PASR AN — ADC input channel 0
OCDSDA — ST CMOS On Chip Debug System Data Line (OCDS EV only)
ICPDA — ST CMOS ICP Data Line
PA1/AN1/VREF
PA1
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
AN1 PASR AN — ADC input channel 1
VREF PASR AN — ADC VREF Input
PA2/[INT]/
[STCK0]/AN2
/OCDSCK/
ICPCK
PA2
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
INT PASR
IFS0 ST — External interrupt input
STCK0 IFS0 ST — TM0 (STM) clock input
AN2 PASR AN — ADC input channel 2
OCDSCK — ST — On Chip Debug System Clock Line (OCDS EV
only)
ICPCK — ST CMOS ICP Clock Line
PA3/INT/
STCK0/AN3
PA3
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
INT PASR
IFS0 ST — External interrupt input
STCK0 IFS0 ST — TM0 (STM) clock input
AN3 PASR AN — ADC input channel 3
PA4/[INT]/
PTCK1/STP0
PA4
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
INT PASR
IFS0 ST — External interrupt input
PTCK1 PASR
IFS0 ST — TM1 (PTM) clock input
STP0 PASR — CMOS TM0 (STM) output

Rev. 1.71 12 April 11, 2017 Rev. 1.71 13 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Pin Name Function OPT I/T O/T Description
PA5/[INT]/
PTP1I
PA5 PAWU
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
INT PASR
IFS0 ST — External interrupt input
PTP1I IFS0 ST — TM1 (PTM) input
PA6/[PTCK1]/
STP0I/[STP0]
PA6
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
PTCK1 PASR
IFS0 ST — TM1 (PTM) clock input
STP0I PASR
IFS0 ST — TM0 (STM) input
STP0 PASR — CMOS TM0 (STM) output
PA7/[PTCK1]/
[STP0B]/RES
PA7
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
PTCK1 PASR
IFS0 ST — TM1 (PTM) clock input
STP0B PASR ST CMOS TM0 (STM) inverting output
RES RSTC ST — External reset input
PB0/[PTP1I]/
VREFO
PB0 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTP1I PBSR
IFS0 ST — TM1 (PTM) input
VREFO PBSR — AN ADC reference voltage output
PB1/[PTCK1]/
STP0B
PB1 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTCK1 PBSR
IFS0 ST — TM1 (PTM) clock input
STP0B PBSR ST CMOS TM0 (STM) inverting output
PB2/PTP1B PB2 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTP1B PBSR ST CMOS TM1 (PTM) inverting output
PB3/[PTP1] PB3 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTP1 PBSR — CMOS TM1 (PTM) output
PB4/[PTP1B] PB4 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTP1B PBSR — CMOS TM1 (PTM) inverting output
PB5/PTP1 PB5 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTP1 PBSR — CMOS TM1 (PTM) output
VDD VDD — PWR — Digital positive power supply
AVDD AVDD — PWR — Analog positive power supply
VSS VSS — PWR — Digital negative power supply
AVSS AVSS — PWR — Analog negative power supply

Rev. 1.71 12 April 11, 2017 Rev. 1.71 13 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F004
Pin Name Function OPT I/T O/T Description
PA0/PTP0/
OCDSDA/
ICPDA
PA0
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
PTP0 PASR — CMOS PT0 output
OCDSDA — ST CMOS On Chip Debug System Data Line (OCDS EV only)
ICPDA — ST CMOS ICP Data Line
PA1/PTP0I PA1 PAWU
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
PTP0I — ST — PTM0 input
PA2/ICPCK/
OCDSCK
PA2 PAWU
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
ICPCK — ST CMOS ICP Clock Line
OCDSCK — ST — On Chip Debug System Clock Line (OCDS EV
only)
PA3/PTP1I PA3 PAWU
PAPU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
PTP1I — ST — PTM1 input
PA4/PTCK1/
AN3
PA4
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
PTCK1 PASR ST — PTM1 clock input
AN3 PASR AN — ADC input channel 3
PA5/AN4/VREF
PA5
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
AN4 PASR AN — ADC input channel 4
VREF PASR AN — ADC VREF Input
PA6/AN5/
VREFO
PA6
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
AN5 PASR AN — ADC input channel 5
VREFO PASR — AN ADC reference voltage output
PA7/PTP1/AN6
PA7
PAWU
PAPU
PASR
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
PTP1 PASR — CMOS PTM1 output
AN6 PASR AN — ADC input channel 6
PB0/INT0/AN0
PB0 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
INT0 PBSR ST — External interrupt input
AN0 PBSR AN — ADC input channel 0
PB1/INT1/AN1
PB1 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
INT1 PBSR ST — External interrupt input
AN1 PBSR AN — ADC input channel 1
PB2/PTCK0/
AN2
PB2 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTCK0 PBSR ST — PTM0 clock input
AN2 PBSR AN — ADC input channel 2

Rev. 1.71 14 April 11, 2017 Rev. 1.71 15 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Pin Name Function OPT I/T O/T Description
PB3/SCOM3/
AN7
PB3 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
SCOM3 SCOMC — SCOM LCD driver output for LCD panel common
AN7 PBSR AN — ADC input channel 7
PB4/CLO/
SCOM2
PB4 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
CLO PBSR — CMOS System clock output
SCOM2 SCOMC — SCOM LCD driver output for LCD panel common
PB5/PTP0B PB5 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTP0B PBSR ST CMOS PTM0 inverting output
PB6/PTP1B PB6 PBPU
PBSR ST CMOS General purpose I/O. Register enabled pull-up
PTP1B PBSR ST CMOS PTM1 inverting output
PC0/SCOM0 PC0 PCPU ST CMOS General purpose I/O. Register enabled pull-up
SCOM0 SCOMC — SCOM LCD driver output for LCD panel common
PC1/SCOM1 PC1 PCPU ST CMOS General purpose I/O. Register enabled pull-up
SCOM1 SCOMC — SCOM LCD driver output for LCD panel common
PC2/RES PC1 PCPU
RSTC ST CMOS General purpose I/O. Register enabled pull-up
RES RSTC ST — External reset input
VDD VDD — PWR — Digital positive power supply
AVDD AVDD — PWR — Analog positive power supply
VSS VSS — PWR — Digital negative power supply
AVSS AVSS — PWR — Analog negative power supply
Legend:I/T:Inputtype;  O/T:Outputtype;  PWR:Power;
OP:Optionalbyregisteroption SCOM:SoftwarecontrolledLCDCOM
ST:SchmittTriggerinput; CMOS:CMOSoutput; AN:Analogpin
*:VDDisthedevicepowersupplywhileAVDDistheADCpowersupply.TheAVDDpinisbonded
togetherinternallywithVDD.
**:VSSisthedevicegroundpinwhileAVSSistheADCgroundpin.TheAVSSpinisbondedtogether
internallywithVSS.
Absolute Maximum Ratings
SupplyVoltage................................................................................................VSS−0.3VtoVSS+6.0V
InputVoltage..................................................................................................VSS−0.3VtoVDD+0.3V
StorageTemperature....................................................................................................-50˚Cto125˚C
OperatingTemperature..................................................................................................-40˚Cto85˚C
IOLTotal..................................................................................................................................... 80mA
IOHTotal....................................................................................................................................-80mA
TotalPowerDissipation......................................................................................................... 500mW
Note:Thesearestressratingsonly.Stressesexceedingtherangespecifiedunder"AbsoluteMaximum
Ratings"maycausesubstantialdamagetothesedevices.Functionaloperationofthesedevicesat
otherconditionsbeyondthoselistedinthespecicationisnotimpliedandprolongedexposureto
extremeconditionsmayaffectdevicesreliability.

Rev. 1.71 14 April 11, 2017 Rev. 1.71 15 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
D.C. Characteristics
Ta = 25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VDD Operating Voltage (HIRC) — fSYS=8MHz 2.2 — 5.5 V
IDD1
Operating Current,
Normal Mode, fSYS=fH(HIRC)
3V No load, fH=8MHz, ADC off,
WDT enable, LVR enable
— 1.0 2.0 mA
5V — 2.0 3.0 mA
IDD2
Operating Current,
Slow Mode, fSYS=fL=LIRC
3V No load, fSYS=LIRC, ADC off,
WDT enable , LVR enable
— 20 30 μA
5V — 30 60 μA
IDD3
Operating Current,
Normal Mode, fH=8MHz (HIRC)
3V No load, fSYS=fH/2, ADC off,
WDT enable, LVR enable
— 1.0 1.5 mA
5V — 1.5 2.0 mA
3V No load, fSYS=fH/4, ADC off,
WDT enable, LVR enable
— 0.9 1.3 mA
5V — 1.3 1.8 mA
3V No load, fSYS=fH/8, ADC off,
WDT enable, LVR enable
— 0.8 1.1 mA
5V — 1.1 1.6 mA
3V No load, fSYS=fH/16, ADC off,
WDT enable, LVR enable
— 0.7 1.0 mA
5V — 1.0 1.4 mA
3V No load, fSYS=fH/32, ADC off,
WDT enable, LVR enable
— 0.6 0.9 mA
5V — 0.9 1.2 mA
3V No load, fSYS=fH/64, ADC off,
WDT enable, LVR enable
— 0.5 0.8 mA
5V — 0.8 1.1 mA
IIDLE0
IDLE0 Mode Standby Current
(LIRC on)
3V No load, ADC off, WDT enable,
LVR disable
— 1.3 3.0 μA
5V — 5.0 10 μA
IIDLE1
IDLE1 Mode Standby Current
(HIRC)
3V No load, ADC off, WDT enable,
fSYS=8MHz on
— 0.8 1.6 mA
5V — 1.0 2.0 mA
ISLEEP0
SLEEP0 Mode Standby Current
(LIRC off)
3V No load, ADC off, WDT disable,
LVR disable
— 0.1 1.0 μA
5V — 0.3 2.0 μA
ISLEEP1
SLEEP1 Mode Standby Current
(LIRC on)
3V No load, ADC off, WDT enable,
LVR disable
— 1.3 5.0 μA
5V — 2.2 10 μA
VIL1
Input Low Voltage for I/O Ports or
Input Pins except RES pin
5V — 0 — 1.5 V
— — 0 — 0.2VDD V
VIH1
Input High Voltage for I/O Ports or
Input Pins except RES pin
5V — 3.5 — 5.0 V
— — 0.8VDD — VDD V
VIL2 Input Low Voltage (RES) — — 0 — 0.4VDD V
VIH2 Input High Voltage (RES) — — 0.9VDD — VDD V
IOL I/O Port Sink Current 3V VOL=0.1VDD 18 36 — mA
5V VOL=0.1VDD 40 80 — mA
IOH I/O Port, Source Current 3V VOH=0.9VDD -3 -6 — mA
5V VOH=0.9VDD -7 -14 — mA
RPH Pull-high Resistance for I/O Ports 3V — 20 60 100 kΩ
5V — 10 30 50 kΩ
IOCDS
Operating Current, Normal Mode,
fSYS=fH(HIRC) (for OCDS EV
testing, connect to an e-Link)
3V No load, fH=8MHz, ADC off,
WDT enable — 1.4 2.0 mA

Rev. 1.71 16 April 11, 2017 Rev. 1.71 17 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
A.C. Characteristics
Ta = 25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Condition
fCPU Operating Clock 2.2~5.5V — DC — 8 MHz
fHIRC System Clock (HIRC)
3V/5V Ta = 25°C -2% 8 +2% MHz
3V/5V Ta = 0°C to 70°C -5% 8 +5% MHz
2.2V~5.5V Ta = 0°C to 70°C -8% 8 +8% MHz
2.2V~5.5V Ta = -40°C to 85°C -12% 8 +12% MHz
fLIRC System Clock (LIRC) 2.2V~5.5V Ta = -40°C to 85°C 8 32 50 kHz
tTIMER xTCKn, xTPnI Input Pulse Width — — 0.3 — — μs
tRES External Reset Low Pulse Width — — 10 — — μs
tINT Interrupt Pulse Width — — 0.3 — — μs
tEERD EEPROM Read Time — — — 2 4 tSYS
tEEWR EEPROM Write Time — — — 2 5 ms
tSST
System Start-up Timer Period
(Wake-up from HALT, fSYS off at
HALT state)
—
fSYS =HIRC 16 — —
tSYS
fSYS =LIRC 2 — —
tRSTD
System Reset Delay Time
(Power On Reset, LVR reset, WDT
S/W reset(WDTC)
— — 25 50 100 ms
System Reset Delay Time
(RES reset, WDT normal reset) — — 8.3 16.7 33.3 ms
Note:1.tSYS=1/fSYS
2.TomaintaintheaccuracyoftheinternalHIRCoscillatorfrequency,a0.1μFdecouplingcapacitorshould
beconnectedbetweenVDDandVSSandlocatedasclosetothedeviceaspossible.

Rev. 1.71 16 April 11, 2017 Rev. 1.71 17 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
ADC Electrical Characteristics
Ta = 25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
AVDD A/D Converter Operating Voltage — — 2.7 — 5.5 V
VADI A/D Converter Input Voltage — — 0 — AVDD /
VREF
V
VREF A/D Converter Reference Voltage 3V — 2 — AVDD V
5V
DNL Differential Non-linearity
2.7V
VREF=AVDD=VDD
tADCK =0.5μs -3 — +3 LSB3V
5V
INL Integral Non-linearity
2.7V
VREF=AVDD=VDD
tADCK =0.5μs -4 — +4 LSB3V
5V
IADC
Additional Power Consumption if
A/D Converter is used
3V No load (tADCK =0.5μs ) — 1.0 2.0 mA
5V No load (tADCK =0.5μs ) — 1.5 3.0 mA
tADCK A/D Converter Clock Period 2.7~
5.5V — 0.5 — 10 μs
tADC
A/D Conversion Time (Include
Sample and Hold Time)
2.7~
5.5V 12-bit ADC 16 — 20 tADCK
tADS A/D Converter Sampling Time 2.7~
5.5V — — 4 — tADCK
tON2ST A/D Converter On-to-Start Time 2.7~
5.5V — 4 — — μs
OPA Electrical Characteristics
Ta = 25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
AVDD OPA operating voltage — — 2.7 ─5.5 V
IOPA OPA operating current 5V No load ─200 350 μA
VOPOS1 Input offset voltage 5V — -15 ─15 mV
VCM Common mode voltage range 5V — 0.2 ─VDD-1.4 V
PSRR Power Supply Rejection Ratio 5V — 60 80 ─dB
CMRR Common mode Rejection Ratio 5V — 60 80 ─dB
SR Slew rate +, Slew rate - 5V — 0.8 1.5 ─ V/μs
GBW Gain Band Width 5V — 500 ─ ─ kHz
ERRG OPA gain error 5V Gain=1/2/3/4
If OPA input voltage ≥ 0.2V -5 Gain +5 %

Rev. 1.71 18 April 11, 2017 Rev. 1.71 19 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
LVR Electrical Characteristics
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VDD Operating Voltage — — 1.9 — 5.5 V
VLVR Low Voltage Reset Voltage — LVR Enable, 2.1V option -5% 2.10 +5% V
VBG Reference Output with Buffer — TJ= +25°C @3.15V -5% 1.04 +5% V
tLVR Low Voltage Width to Reset — — 160 320 640 μs
LCD Electrical Characteristics – HT66F004
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
IBIAS VDD/2 Bias Current for LCD 5V
ISEL[1:0]=00 17.5 25.0 32.5 μA
ISEL[1:0]=01 35 50 65 μA
ISEL[1:0]=10 70 100 130 μA
ISEL[1:0]=11 140 200 260 μA
VSCOM VDD/2 Voltage for LCD COM Port 2.2~5.5V No load 0.475 0.5 0.525 VDD
Power on Reset Electrical Characteristics
Ta = 25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VPOR VDD Start Voltage to Ensure Power-on Reset — — — — 100 mV
RRPOR VDD Rising Rate to Ensure Power-on Reset — — 0.035 — — V/ms
tPOR
Minimum Time for VDD Stays at VPOR to
Ensure Power-on Reset — — 1 — — ms










Rev. 1.71 18 April 11, 2017 Rev. 1.71 19 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
System Architecture
Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed
totheirinternalsystemarchitecture.Thedevicetakesadvantageoftheusualfeaturesfoundwithin
RISCmicrocontrollersprovidingincreasedspeedofoperationandPeriodicperformance.The
pipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstructionexecution
areoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withtheexceptionofbranch
orcallinstructions.An8-bitwideALUisusedinpracticallyallinstructionsetoperations,which
carriesoutarithmeticoperations,logicoperations,rotation,increment,decrement,branchdecisions,
etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulatorandtheALU.
CertaininternalregistersareimplementedintheDataMemoryandcanbedirectlyorindirectly
addressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditionalarchitectural
featuresensurethataminimumofexternalcomponentsisrequiredtoprovideafunctionalI/Oand
A/Dcontrolsystemwithmaximumreliabilityandexibility.Thismakesthesedevicessuitablefor
low-cost,high-volumeproductionforcontrollerapplications
Clocking and Pipelining
Themainsystemclock,derivedfromeitheraHIRCorLIRCoscillatorissubdividedintofour
internallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincrementedatthe
beginningoftheT1clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4
clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleforms
oneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutive
instructioncycles,thepipeliningstructureofthemicrocontrollerensuresthatinstructionsare
effectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructionswherethe
contentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhichcasethe
instructionwilltakeonemoreinstructioncycletoexecute.
  
     
      
  
  
  
    
 
  
 
 
 
  
System Clock and Pipelining

Rev. 1.71 20 April 11, 2017 Rev. 1.71 21 April 11, 2017
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
HT66F002/HT66F0025/HT66F003/HT66F004
Cost-Effective A/D Flash MCU with EEPROM
Forinstructionsinvolvingbranches,suchasjumporcallinstructions,twomachinecyclesare
requiredtocompleteinstructionexecution.Anextracycleisrequiredastheprogramtakesone
cycletorstobtaintheactualjumporcalladdressandthenanothercycletoactuallyexecutethe
branch.Therequirementforthisextracycleshouldbetakenintoaccountbyprogrammersintiming
sensitiveapplications.
   
  
 






 
  
 
 



 
  
    
  
Instruction Fetching
Program Counter
Duringprogramexecution,theProgramCounterisusedtokeeptrackoftheaddressofthe
nextinstructiontobeexecuted.Itisautomaticallyincrementedbyoneeachtimeaninstruction
isexecutedexceptforinstructions,suchas“JMP”or“CALL”thatdemandajumptoanon-
consecutiveProgramMemoryaddress.Onlythelower8bits,knownastheProgramCounterLow
Register,aredirectlyaddressablebytheapplicationprogram.
Whenexecutinginstructionsrequiringjumpstonon-consecutiveaddressessuchasajump
instruction,asubroutinecall,interruptorreset,etc.,themicrocontrollermanagesprogramcontrol
byloadingtherequiredaddressintotheProgramCounter.Forconditionalskipinstructions,once
theconditionhasbeenmet,thenextinstruction,whichhasalreadybeenfetchedduringthepresent
instructionexecution,isdiscardedandadummycycletakesitsplacewhilethecorrectinstructionis
obtained.
Device
Program Counter
Program Counter
High byte PCL Register
HT66F002/HT66F003 PC9~PC8 PCL7~PCL0
HT66F0025/HT66F004 PC10~PC8 PCL7~PCL0
ThelowerbyteoftheProgramCounter,knownastheProgramCounterLowregisterorPCL,is
availableforprogramcontrolandisareadableandwriteableregister.Bytransferringdatadirectly
intothisregister,ashortprogramjumpcanbeexecuteddirectly,however,asonlythislowbyte
isavailableformanipulation,thejumpsarelimitedtothepresentpageofmemory,thatis256
locations.Whensuchprogramjumpsareexecuteditshouldalsobenotedthatadummycycle
willbeinserted.ManipulatingthePCLregistermaycauseprogrambranching,soanextracycleis
neededtopre-fetch.