Hope RF RF12B Operating instructions
RF12 Program V1.1
RF12B programming guide
1．Brief description
RF12B is a low cost FSK transceiver IC witch integrated all RF functions in a
single chip. It only need a MCU, a crystal, a decouple capacitor and antenna to
build a hi reliable FSK transceiver system. The operation frequency can cover 400
to 1000MHz.
RF12B supports a command interface to setup frequency, deviation, output power
and also data rate. No need any hardware adjustment when using in frequency-hopping
applications
RF12B can be used in applications such as remote control toys, wireless alarm,
wireless sensor, wireless keyboard/mouse, home-automation and wireless data
collection.
2．Commands
1．Timing diagram
2．Configuration Setting Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 0 0 0 0 0 0 el ef b1 b0 x3 x2 x1 x0 8008h
e l: Enable TX register
e f: Enable RX FIFO buffer
RF12 Program V1.1
b1..b0: select band
b1 b0 band[MHz]
0 0 Reserved
0 1 433
1 0 868
1 1 915
x3..x0: select crystal load capacitor
x3 x2 x1 x0 load capacitor [pF]
0 0 0 0 8.5
0 0 0 1 9.0
0 0 1 0 9.5
0 0 1 1 10.0
…… ……
1 1 1 0 15.5
1 1 1 1 16.0
3．Power Management Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 0 0 0 0 1 0 er ebb et es ex eb ew dc 8208h
er：Enable receiver
ebb：Enable base band block
et：Enable transmitter
es：Enable synthesizer
ex：Enable crystal oscillator
eb：Enable low battery detector
ew：Enable wake-up timer
dc：Disable clock output of CLK pin
4．Frequency Setting Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 1 0 f11 f10 f9 f8 f7 f6 f5 f4 f3 f2 f1 f0 A680h
f11..f0: Set operation frequency:
433band: Fc=430+F*0.0025 MHz
868band: Fc=860+F*0.0050 MHz
915band: Fc=900+F*0.0075 MHz
Fc is carrier frequency and F is the frequency parameter. 36≤F≤3903
RF12 Program V1.1
5．Data Rate Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 0 0 0 cs r6 r5 r4 r3 r2 r1 r0 C623h
r6..r0: Set data rate:
BR=10000000/29/（R+1）/（1+cs*7）
6．Receiver Control Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 0 P16 d1 d0 i2 i1 i0 g1 g0 r2 r1 r0 9080h
P16: select function of pin16
P16
0 Interrupt input
1 VDI output
i2..i0:select baseband bandwidth
i2 i1 i0 Baseband Bandwidth [kHz]
0 0 0 reserved
0 0 1 400
0 1 0 340
0 1 1 270
1 0 0 200
1 0 1 134
1 1 0 67
1 1 1 reserved
d1..d0: select VDI response time
d1 d0 Response
0 0 Fast
0 1 Medium
1 0 Slow
1 1 Always on
g1..g0: select LNA gain
g1 g0 LNA gain (dBm)
0 0 0
0 1 -6
1 0 -14
1 1 -20
RF12 Program V1.1
r2..r0: select DRSSI threshold
r2 r1 r0 RSSIsetth [dBm]
0 0 0 -103
0 0 1 -97
0 1 0 -91
0 1 1 -85
1 0 0 -79
1 0 1 -73
1 1 0 Reserved
1 0 1 Reserved
The actual DRSSI threshold is related to LNA setup:
RSSIth = RSSIsetth + GLNA.
7．Data Filter Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 0 0 1 0 al ml 1 s 1 f2 f1 f0 C22Ch
al: Enable clock recovery auto-lock
ml: Enable clock recovery fast mode
s: select data filter type
s Filter type
0 Digital filter
1 Analog RC filter
f1..f0: Set DQD threshold
8．FIFO and Reset Mode Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 0 1 0 f3 f2 f1 f0 sp al ff dr CA80h
f3..f0: Set FIFO interrupt level
sp: Select the length of the synchron pattern:
sp Byte1 Byte0 (POR) Synchron Pattern (Byte1+Byte0)
0 2Dh D4h 2DD4h
1 Not used D4h D4h
al: select FIFO fill start condition
al condition
0 Sync-word
1 Always
ff: Enable FIFO fill
dr：Disable hi sensitivity reset mode
RF12 Program V1.1
9．Synchron pattern Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 1 1 0 b7 b6 b5 b4 b3 b2 b1 b0 CED4h
This command is used to reprogram the synchronic pattern;
10．Receiver FIFO Read Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 B000h
This command is used to read FIFO data when FFIT interrupt generated. FIFO data
output starts at 8th SCK period.
11．AFC Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 0 1 0 0 a1 a0 rl1 rl0 st fi oe en C4F7h
a1..a0: selectAFC auto-mode：
a1 a0
0 0 Controlled by MCU
0 1 Run once at power on
1 0 Keep offset when VDI hi
1 1 Keeps independently from VDI
rl1..rl0: select range limit
r1 r0 range（fres）
0 0 No restriction
0 1 +15/-16
1 0 +7/-8
1 1 +3-4
fres
315，433band: 2.5kHz
868band: 5kHz
915band: 7.5kHz
st: st goes hi will store offset into output register
fi: Enable AFC hi accuracy mode
oe: EnableAFC output register
en: Enable AFC funcition
RF12 Program V1.1
12．TX Configuration Control Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 0 1 1 0 0 mp m3 m2 m1 m0 0 p2 p1 p0 9800h
m: select modulation polarity
m2..m0: select frequency deviation:
m3 m2 m1 m0 frequency deviation [kHz]
0 0 0 0 15
0 0 0 1 30
0 0 1 0 45
0 0 1 1 60
0 1 0 0 75
0 1 0 1 90
0 1 1 0 105
0 1 1 1 120
1 0 0 0 135
1 0 0 1 150
1 0 1 0 165
1 0 1 1 180
1 1 0 0 195
1 1 0 1 210
1 1 1 0 225
1 1 1 1 240
p2..p0: select output power
p2 p1 p0 Output power[dBm]
0 0 0 0
0 0 1 -3
0 1 0 -6
0 1 1 -9
1 0 0 -12
1 0 1 -15
1 1 0 -18
1 0 1 -21
RF12 Program V1.1
13．PLL Setting Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 1 0 0 0 ob1 ob0 1 ddy ddit 1 bw0 CC77h
ob1-ob0: Microcontroller output clock buffer rise and fall time control.
ob1 ob0 Selected uC CLK frequency
005 or 10 MHz (recommended)
013.3 MHz
1X2.5 MHz or less
ddy: phase detector delay enable.
ddi: disables the dithering in the PLL loop.
bw1-bw0: select PLL bandwidth
bw0 Max bit rate [kbps] Phase noise at 1MHz offset [dBc/Hz]
086.2 -107
1256 -102
14．Transmitter Register Write Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 1 1 1 0 0 0 t7 t6 t5 t4 t3 t2 t1 t0 B8AAh
This command is use to write a data byte to RF12 and then RF12 transmit it
15．Wake-Up Timer Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 1 r4 r3 r2 r1 r0 m7 m6 m5 m4 m3 m2 m1 m0 E196h
The wake-up period is determined by:
Twake-up = M * 2R [ms]
For continual operation, bit ‘et’ must be cleared and set
16．Low Duty-Cycle Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 0 0 0 d6 d5 d4 d3 d2 d1 d0 en C8OEh
d6..d0: Set duty cycle
D.C.= (D * 2 +1) / M *100%
RF12 Program V1.1
en：Enable low duty cycle mode
17． Low Battery Detector and Microcontroller Clock Divider Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 0 0 0 0 d2 d1 d0 0 v3 v2 v1 v0 C000h
d2..d0: select frequency of CLK pin
d2 d1 d0 Clock frequency[MHz]
0 0 0 1
0 0 1 1.25
0 1 0 1.66
0 1 1 2
1 0 0 2.5
1 0 1 3.33
1 1 0 5
1 1 1 10
CLK signal is derive form crystal oscillator and it can be applied to MCU clock in to save
a second crystal.
If not used, please set bit “dc” to disable CLK output
To integrate the load capacitor internal can not only save cost, but also adjust reference
frequency by software
v3..v0: Set threshold voltage of Low battery detector：
Vlb=2.2+V*0.1 [V]
18．Status Read Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
0 x x x x x x x x x x x x x x x -
This command starts with a 0 and be used to read internal status register
RF12 Program V1.1
3．Demo flow diagram
Transmitter:
Init RF12B
DEMO
Open TX
Send data
Close TX
Send data
Wait nIRQ low
Write a byte
Package
send over?
return
N
Y
it a byte and pull nIRQ low
hen transmit over, then MCU can write next byte to transmit
Note: Initialize RF12B and open transmitter, RF12B will transm
w
RF12 Program V1.1
Receiver:
DEMO
Init RF12B
Note: After RF12B initialization, Open FIFO receive mode and wait nIRQ low, only then MCU
can r ad received and stored in FIFO data. For next package receive, please reset FIFO.
e
Receive data
Indicate receive
Open RX
N
Check
p
ass?
Y
Receive data
Wait nIRQ low
Read FIFO data
Data recive
over?
N
Y
return
RF12 Program V1.1
4．Example 1（forAVR microcontroller）
RF12 transmitter de o: m
mple example based on AVR C
electronic Co.,Ltd.
;Contact: +86-0755-86106557
-MAIL: [email protected]
IDE
SS--------------->nSEL
----nIRQ
PD6: LED GREEN
PD7: LED RED
/*
; copyright (c) 2006
;Title RF12 TX si
;Company: Hope micro
;Author: Tank
;Current version: v1.0
;Date: 2006-11-13
;processor ATMEGA48
;Clock: 10MHz Crystal
;E
Connections
ATMEGA48 SIDE RF12 S
SCK--------------->SCK
MISO--------------->SDO
MOSI--------------->SDI
INT0<-----------
*/
RF12 Program V1.1
nclude <mega48.h>
efine DDR_IN 0
efine PIN_SEL PINB
efine PIN_SDI PINB
efine PIN_SCK PINB
efine PIN_SDO PINB
PIN_DATA PIND
_PORT
efine NC 1// |
efine HI_SEL() PORT_SEL|= (1<<RFXX_SEL)
efine HI_SDI() PORT_SDI|= (1<<RFXX_SDI)
efine SDO_INPUT() DDR_SDO&= ~(1<<RFXX_SDO)
#i
#d
#define DDR_OUT 1
#define PORT_SEL PORTB
#d
#define DDR_SEL DDRB
#define PORT_SDI PORTB
#d
#define DDR_SDI DDRB
#define PORT_SCK PORTB
#d
#define DDR_SCK DDRB
#define PORT_SDO PORTB
#d
#define DDR_SDO DDRB
#define PORT_DATA PORTD
#define
#define DDR_DATA DDRD
#define PB7 7//--\
#define PB6 6// |
#define RFXX_SCK 5// |
#define RFXX_SDO 4// |RF
#define RFXX_SDI 3// |
#define RFXX_SEL 2// |
#d
#define PB0 0//--/
#define SEL_OUTPUT() DDR_SEL |= (1<<RFXX_SEL)
#d
#define LOW_SEL() PORT_SEL&=~(1<<RFXX_SEL)
#define SDI_OUTPUT() DDR_SDI |= (1<<RFXX_SDI)
#d
#define LOW_SDI() PORT_SDI&=~(1<<RFXX_SDI)
#d
RF12 Program V1.1
efine HI_SCK() PORT_SCK|= (1<<RFXX_SCK)
(1<<RFXX_SCK)
efine DATA_OUT DDR_DATA|=1<<RF12_DATA
F12_DATA
efine LEDG_OUTPUT() DDRD|=~(1<<6)
LEDR_ON() PORTD&=~(1<<7)
e LEDR_OFF() PORTD|=~(1<<7)
T_INIT(void){
DO_INPUT();
CMD(unsigned int aCmd){
;
()){
01;
0){
;
#define SDO_HI() PIN_SDO&(1<<RFXX_SDO)
#define SCK_OUTPUT() DDR_SCK |= (1<<RFXX_SCK)
#d
#define LOW_SCK() PORT_SCK&=~
#define RF12_DATA 4//PD4
#d
#define HI_DATA PORT_DATA|=1<<R
#d
#define LEDR_OUTPUT() DDRD|=~(1<<7)
#define LEDG_ON() PORTD&=~(1<<6)
#define LEDG_OFF() PORTD|=~(1<<6)
#define
#defin
void RFXX_POR
HI_SEL();
HI_SDI();
LOW_SCK();
SEL_OUTPUT();
SDI_OUTPUT();
S
SCK_OUTPUT();
}
unsigned int RFXX_WRT_
unsigned char i;
unsigned int temp
LOW_SCK();
LOW_SEL();
for(i=0;i<16;i++){
temp<<=1;
if(SDO_HI
temp|=0x00
}
LOW_SCK();
if(aCmd&0x800
HI_SDI();
}else{
LOW_SDI()
}
RF12 Program V1.1
SEL();
2.0pF
ET,ES,EX,!eb,!ew,DC
m,-103dBm
D4
30kHz,MAX OUT
！lpx,！ddy，DDIT，BW0
XX_WRT_CMD(0xC800);//NOT USE
{
hile(PIND&(1<<2));//wait for previously TX over
RFXX_WRT_CMD(0xB800+aByte);
ned char amS){
nsigned int j;
++)for(j=0;j<914;j++);
signed int i,j;
hkSum;
RB=0x00;//PB INPUT;
ication: both LEDR and LEDG blink 3 times
HI_SCK();
aCmd<<=1;
};
LOW_SCK();
HI_
return(temp);
}
void RF12_INIT(void){
RFXX_WRT_CMD(0x80D7);//EL,EF,433band,1
RFXX_WRT_CMD(0x8239);//!er,!ebb,
RFXX_WRT_CMD(0xA640);//A140=430.8MHz
RFXX_WRT_CMD(0xC647);//4.8kbps
RFXX_WRT_CMD(0x94A0);//VDI,FAST,134kHz,0dB
RFXX_WRT_CMD(0xC2AC);//AL,!ml,DIG,DQ
RFXX_WRT_CMD(0xCA81);//FIFO8,SYNC,!ff,DR
RFXX_WRT_CMD(0xCED4);//SYNC=2DD4；
RFXX_WRT_CMD(0xC483);//@PWR,NO RSTRIC,!st,!fi,OE,EN
RFXX_WRT_CMD(0x9850);//!mp,9810=
RFXX_WRT_CMD(0xCC77);//OB1，OB0,
RFXX_WRT_CMD(0xE000);//NOT USE
RF
RFXX_WRT_CMD(0xC040);//1.66MHz,2.2V
}
void RF12_SEND(unsigned char aByte)
w
}
void Delay_ms(unsig
unsigned char i;
u
for(i=0;i<amS;i
}
void main(void)
{
un
unsigned char C
#asm("cli");
DD
DDRD=0x00;//PD INPUT;
//POWER ON ind
LEDG_OFF();
RF12 Program V1.1
+){
;
EDG_OFF();
DR_OFF();
DG_OFF();
();
RTD|=(1<<RF12_DATA);// SET nFFS pin HI when using TX register
RD&=~(1<<2); //PD2(INT0)
XX_WRT_CMD(0x0000);//read status register
D(0x8239);//!er,!ebb,ET,ES,EX,!eb,!ew,DC
NC LOW BYTE
ATA BYTE 1
LEDR_OFF();
LEDG_OUTPUT();
LEDR_OUTPUT();
for(i=0;i<3;i+
Delay_ms(200)
LEDG_ON();
LEDR_ON();
Delay_ms(200);
L
LE
}
LE
LEDR_OFF();
RFXX_PORT_INIT
RF12_INIT();
DDRD|=(1<<RF12_DATA);
PO
DD
while(1){
LEDR_ON();
RF
RFXX_WRT_CM
ChkSum=0;
RF12_SEND(0xAA);//PREAMBLE
RF12_SEND(0xAA);//PREAMBLE
RF12_SEND(0xAA);//PREAMBLE
RF12_SEND(0x2D);//SYNC HI BYTE
RF12_SEND(0xD4);//SY
RF12_SEND(0x30);//DATA BYTE 0
ChkSum+=0x30;
RF12_SEND(0x31);//D
ChkSum+=0x31;
RF12_SEND(0x32);
ChkSum+=0x32;
RF12_SEND(0x33);
ChkSum+=0x33;
RF12_SEND(0x34);
RF12 Program V1.1
sum
RF12_SEND(0xAA);//DUMMY BYTE
BYTE
0x8201);
DG_OFF();
r(i=0;i<10000;i++)for(j=0;j<123;j++);//sleep 1 second appr.
};
mple example based on AVR C
electronic Co.,Ltd.
ChkSum+=0x34;
RF12_SEND(0x35);
ChkSum+=0x35;
RF12_SEND(0x36);
ChkSum+=0x36;
RF12_SEND(0x37);
ChkSum+=0x37;
RF12_SEND(0x38);
ChkSum+=0x38;
RF12_SEND(0x39);
ChkSum+=0x39;
RF12_SEND(0x3A);
ChkSum+=0x3A;
RF12_SEND(0x3B);
ChkSum+=0x3B;
RF12_SEND(0x3C);
ChkSum+=0x3C;
RF12_SEND(0x3D);
ChkSum+=0x3D;
RF12_SEND(0x3E);
ChkSum+=0x3E;
RF12_SEND(0x3F); //DATA BYTE 15
ChkSum+=0x3F;
RF12_SEND(ChkSum); //send chek
RF12_SEND(0xAA);//DUMMY BYTE
RF12_SEND(0xAA);//DUMMY
RFXX_WRT_CMD(
LEDR_OFF();
LE
fo
}
RF12 receiver demo
/*
; copyright (c) 2006
;Title RF12 RX si
;Company: Hope micro
;Author: Tank
RF12 Program V1.1
;Contact: +86-0755-86106557
-MAIL: [email protected]
IDE
D4--------------->FSK/DATA
----nIRQ
PD6: LED GREEN
PD7: LED RED
nclude <mega48.h>
efine DDR_IN 0
efine PIN_SEL PINB
efine PIN_SDI PINB
efine PIN_SCK PINB
efine PIN_SDO PINB
;Current version: v1.0
;Date: 2006-11-17
;processor ATMEGA48
;Clock: 10MHz Crystal
;E
Connections
ATMEGA48 SIDE RF12 S
SCK--------------->SCK
MISO<---------------SDO
MOSI--------------->SDI
SS--------------->nSEL
P
INT0<-----------
*/
#i
#d
#define DDR_OUT 1
#define PORT_SEL PORTB
#d
#define DDR_SEL DDRB
#define PORT_SDI PORTB
#d
#define DDR_SDI DDRB
#define PORT_SCK PORTB
#d
#define DDR_SCK DDRB
#define PORT_SDO PORTB
#d
#define DDR_SDO DDRB
RF12 Program V1.1
efine PIN_IRQ PIND
PIN_DATA PIND
_PORT
efine NC 1// |
efine HI_SEL() PORT_SEL|= (1<<RFXX_SEL)
efine HI_SDI() PORT_SDI|= (1<<RFXX_SDI)
efine LOW_SDO() PORT_SDO&= (1<<RFXX_SDO)
efine HI_SCK() PORT_SCK|= (1<<RFXX_SCK)
T_SCK&=~(1<<RFXX_SCK)
efine IRQ_IN() DDR_IRQ &=~(1<<RF12_IRQ)
(1<<RF12_IRQ))
efine DATA_OUT() DDR_DATA|=1<<RF12_DATA
F12_DATA
efine LEDG_OUTPUT() DDRD|=~(1<<6)
#define PORT_IRQ PORTD
#d
#define DDR_IRQ DDRD
#define PORT_DATA PORTD
#define
#define DDR_DATA DDRD
#define PB7 7//--\
#define PB6 6// |
#define RFXX_SCK 5// |
#define RFXX_SDO 4// |RF
#define RFXX_SDI 3// |
#define RFXX_SEL 2// |
#d
#define PB0 0//--/
#define SEL_OUTPUT() DDR_SEL |= (1<<RFXX_SEL)
#d
#define LOW_SEL() PORT_SEL&=~(1<<RFXX_SEL)
#define SDI_OUTPUT() DDR_SDI |= (1<<RFXX_SDI)
#d
#define LOW_SDI() PORT_SDI&=~(1<<RFXX_SDI)
#define SDO_INPUT() DDR_SDO&= ~(1<<RFXX_SDO)
#d
#define SDO_HI() PIN_SDO&(1<<RFXX_SDO)
#define SCK_OUTPUT() DDR_SCK |= (1<<RFXX_SCK)
#d
#define LOW_SCK() POR
#define RF12_IRQ 2
#d
#define WAIT_IRQ_LOW() while(PIND&
#define RF12_DATA 4//PD4
#d
#define HI_DATA() PORT_DATA|=1<<R
#d
#define LEDR_OUTPUT() DDRD|=~(1<<7)
RF12 Program V1.1
LEDR_ON() PORTD&=~(1<<7)
e LEDR_OFF() PORTD|= (1<<7)
T_INIT(void){
HI when using FIFO
;
RQ_IN();
D(unsigned int aCmd){
char i;
;
+){
0){
;
()){
1;
SEL();
#define LEDG_ON() PORTD&=~(1<<6)
#define LEDG_OFF() PORTD|= (1<<6)
#define
#defin
void RFXX_POR
HI_SEL();
HI_SDI();
LOW_SCK();
//SET nFFS pin
HI_DATA();
SEL_OUTPUT();
SDI_OUTPUT();
SDO_INPUT()
SCK_OUTPUT();
I
DATA_OUT();
}
unsigned int RFXX_WRT_CM
unsigned
unsigned int temp
temp=0;
LOW_SCK();
LOW_SEL();
for(i=0;i<16;i+
if(aCmd&0x800
HI_SDI();
}else{
LOW_SDI()
}
HI_SCK();
temp<<=1;
if(SDO_HI
temp|=0x000
}
LOW_SCK();
aCmd<<=1;
};
HI_
return(temp);
}
RF12 Program V1.1
2.0pF
ET,ES,EX,!eb,!ew,DC
m,-103dBm
D4
30kHz,MAX OUT
！lpx,！ddy，DDIT，BW0
_CMD(0xC800);//NOT USE
,2.2V
RECV(void){
IFO_data=RFXX_WRT_CMD(0xB000);
ned char amS){
nsigned int j;
++)for(j=0;j<914;j++);
signed char i;
dication: both LEDR and LEDG blink 3 times
DG_OUTPUT();
+){
;
void RF12_INIT(void){
RFXX_WRT_CMD(0x80D7);//EL,EF,433band,1
RFXX_WRT_CMD(0x82D9);//!er,!ebb,
RFXX_WRT_CMD(0xA640);//A140=430.8MHz
RFXX_WRT_CMD(0xC647);//4.8kbps
RFXX_WRT_CMD(0x94A0);//VDI,FAST,134kHz,0dB
RFXX_WRT_CMD(0xC2AC);//AL,!ml,DIG,DQ
RFXX_WRT_CMD(0xCA81);//FIFO8,SYNC,!ff,DR
RFXX_WRT_CMD(0xCED4);//SYNC=2DD4；
RFXX_WRT_CMD(0xC483);//@PWR,NO RSTRIC,!st,!fi,OE,EN
RFXX_WRT_CMD(0x9850);//!mp,9810=
RFXX_WRT_CMD(0xCC77);//OB1，OB0,
RFXX_WRT_CMD(0xE000);//NOT USE
RFXX_WRT
RFXX_WRT_CMD(0xC040);//1.66MHz
}
unsigned char RF12_
unsigned int FIFO_data;
WAIT_IRQ_LOW();
RFXX_WRT_CMD(0x0000);
F
return(FIFO_data&0x00FF);
}
void Delay_ms(unsig
unsigned char i;
u
for(i=0;i<amS;i
}
void main(void)
{
un
unsigned char ChkSum;
//POWER ON in
LEDG_OFF();
LEDR_OFF();
LE
LEDR_OUTPUT();
for(i=0;i<3;i+
Delay_ms(200)
LEDG_ON();
LEDR_ON();
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