Hope RF RF12B Operating instructions

RF12 Program V1.1
RF12B programming guide
1．Brief description
RF12B is a low cost FSK transceiver IC witch integrated all RF functions in a
single chip. It only need a MCU, a crystal, a decouple capacitor and antenna to
build a hi reliable FSK transceiver system. The operation frequency can cover 400
to 1000MHz.
RF12B supports a command interface to setup frequency, deviation, output power
and also data rate. No need any hardware adjustment when using in frequency-hopping
applications
RF12B can be used in applications such as remote control toys, wireless alarm,
wireless sensor, wireless keyboard/mouse, home-automation and wireless data
collection.
2．Commands
1．Timing diagram
2．Configuration Setting Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 0 0 0 0 0 0 el ef b1 b0 x3 x2 x1 x0 8008h
e l: Enable TX register
e f: Enable RX FIFO buffer
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RF12 Program V1.1
b1..b0: select band
b1 b0 band[MHz]
0 0 Reserved
0 1 433
1 0 868
1 1 915
x3..x0: select crystal load capacitor
x3 x2 x1 x0 load capacitor [pF]
0 0 0 0 8.5
0 0 0 1 9.0
0 0 1 0 9.5
0 0 1 1 10.0
…… ……
1 1 1 0 15.5
1 1 1 1 16.0
3．Power Management Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 0 0 0 0 1 0 er ebb et es ex eb ew dc 8208h
er：Enable receiver
ebb：Enable base band block
et：Enable transmitter
es：Enable synthesizer
ex：Enable crystal oscillator
eb：Enable low battery detector
ew：Enable wake-up timer
dc：Disable clock output of CLK pin
4．Frequency Setting Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 1 0 f11 f10 f9 f8 f7 f6 f5 f4 f3 f2 f1 f0 A680h
f11..f0: Set operation frequency:
433band: Fc=430+F*0.0025 MHz
868band: Fc=860+F*0.0050 MHz
915band: Fc=900+F*0.0075 MHz
Fc is carrier frequency and F is the frequency parameter. 36≤F≤3903
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RF12 Program V1.1
5．Data Rate Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 0 0 0 cs r6 r5 r4 r3 r2 r1 r0 C623h
r6..r0: Set data rate:
BR=10000000/29/（R+1）/（1+cs*7）
6．Receiver Control Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 0 P16 d1 d0 i2 i1 i0 g1 g0 r2 r1 r0 9080h
P16: select function of pin16
P16
0 Interrupt input
1 VDI output
i2..i0:select baseband bandwidth
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i2 i1 i0 Baseband Bandwidth [kHz]
0 0 0 reserved
0 0 1 400
0 1 0 340
0 1 1 270
1 0 0 200
1 0 1 134
1 1 0 67
1 1 1 reserved
d1..d0: select VDI response time
d1 d0 Response
0 0 Fast
0 1 Medium
1 0 Slow
1 1 Always on
g1..g0: select LNA gain
g1 g0 LNA gain (dBm)
0 0 0
0 1 -6
1 0 -14
1 1 -20

RF12 Program V1.1
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r2..r0: select DRSSI threshold
r2 r1 r0 RSSIsetth [dBm]
0 0 0 -103
0 0 1 -97
0 1 0 -91
0 1 1 -85
1 0 0 -79
1 0 1 -73
1 1 0 Reserved
1 0 1 Reserved
The actual DRSSI threshold is related to LNA setup:
RSSIth = RSSIsetth + GLNA.
7．Data Filter Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 0 0 1 0 al ml 1 s 1 f2 f1 f0 C22Ch
al: Enable clock recovery auto-lock
ml: Enable clock recovery fast mode
s: select data filter type
s Filter type
0 Digital filter
1 Analog RC filter
f1..f0: Set DQD threshold
8．FIFO and Reset Mode Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 0 1 0 f3 f2 f1 f0 sp al ff dr CA80h
f3..f0: Set FIFO interrupt level
sp: Select the length of the synchron pattern:
sp Byte1 Byte0 (POR) Synchron Pattern (Byte1+Byte0)
0 2Dh D4h 2DD4h
1 Not used D4h D4h
al: select FIFO fill start condition
al condition
0 Sync-word
1 Always
ff: Enable FIFO fill
dr：Disable hi sensitivity reset mode

RF12 Program V1.1
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9．Synchron pattern Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 1 1 0 b7 b6 b5 b4 b3 b2 b1 b0 CED4h
This command is used to reprogram the synchronic pattern;
10．Receiver FIFO Read Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 B000h
This command is used to read FIFO data when FFIT interrupt generated. FIFO data
output starts at 8th SCK period.
11．AFC Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 0 1 0 0 a1 a0 rl1 rl0 st fi oe en C4F7h
a1..a0: selectAFC auto-mode：
a1 a0
0 0 Controlled by MCU
0 1 Run once at power on
1 0 Keep offset when VDI hi
1 1 Keeps independently from VDI
rl1..rl0: select range limit
r1 r0 range（fres）
0 0 No restriction
0 1 +15/-16
1 0 +7/-8
1 1 +3-4
fres
315，433band: 2.5kHz
868band: 5kHz
915band: 7.5kHz
st: st goes hi will store offset into output register
fi: Enable AFC hi accuracy mode
oe: EnableAFC output register
en: Enable AFC funcition

RF12 Program V1.1
12．TX Configuration Control Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 0 1 1 0 0 mp m3 m2 m1 m0 0 p2 p1 p0 9800h
m: select modulation polarity
m2..m0: select frequency deviation:
m3 m2 m1 m0 frequency deviation [kHz]
0 0 0 0 15
0 0 0 1 30
0 0 1 0 45
0 0 1 1 60
0 1 0 0 75
0 1 0 1 90
0 1 1 0 105
0 1 1 1 120
1 0 0 0 135
1 0 0 1 150
1 0 1 0 165
1 0 1 1 180
1 1 0 0 195
1 1 0 1 210
1 1 1 0 225
1 1 1 1 240
p2..p0: select output power
p2 p1 p0 Output power[dBm]
0 0 0 0
0 0 1 -3
0 1 0 -6
0 1 1 -9
1 0 0 -12
1 0 1 -15
1 1 0 -18
1 0 1 -21
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RF12 Program V1.1
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13．PLL Setting Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 1 0 0 0 ob1 ob0 1 ddy ddit 1 bw0 CC77h
ob1-ob0: Microcontroller output clock buffer rise and fall time control.
ob1 ob0 Selected uC CLK frequency
005 or 10 MHz (recommended)
013.3 MHz
1X2.5 MHz or less
ddy: phase detector delay enable.
ddi: disables the dithering in the PLL loop.
bw1-bw0: select PLL bandwidth
bw0 Max bit rate [kbps] Phase noise at 1MHz offset [dBc/Hz]
086.2 -107
1256 -102
14．Transmitter Register Write Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 0 1 1 1 0 0 0 t7 t6 t5 t4 t3 t2 t1 t0 B8AAh
This command is use to write a data byte to RF12 and then RF12 transmit it
15．Wake-Up Timer Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 1 r4 r3 r2 r1 r0 m7 m6 m5 m4 m3 m2 m1 m0 E196h
The wake-up period is determined by:
Twake-up = M * 2R [ms]
For continual operation, bit ‘et’ must be cleared and set
16．Low Duty-Cycle Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 1 0 0 0 d6 d5 d4 d3 d2 d1 d0 en C8OEh
d6..d0: Set duty cycle
D.C.= (D * 2 +1) / M *100%

RF12 Program V1.1
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en：Enable low duty cycle mode
17． Low Battery Detector and Microcontroller Clock Divider Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
1 1 0 0 0 0 0 0 d2 d1 d0 0 v3 v2 v1 v0 C000h
d2..d0: select frequency of CLK pin
d2 d1 d0 Clock frequency[MHz]
0 0 0 1
0 0 1 1.25
0 1 0 1.66
0 1 1 2
1 0 0 2.5
1 0 1 3.33
1 1 0 5
1 1 1 10
CLK signal is derive form crystal oscillator and it can be applied to MCU clock in to save
a second crystal.
If not used, please set bit “dc” to disable CLK output
To integrate the load capacitor internal can not only save cost, but also adjust reference
frequency by software
v3..v0: Set threshold voltage of Low battery detector：
Vlb=2.2+V*0.1 [V]
18．Status Read Command
bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR
0 x x x x x x x x x x x x x x x -
This command starts with a 0 and be used to read internal status register

RF12 Program V1.1
3．Demo flow diagram
Transmitter:
Init RF12B
DEMO
Open TX
Send data
Close TX
Send data
Wait nIRQ low
Write a byte
Package
send over?
return
N
Y
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it a byte and pull nIRQ low
hen transmit over, then MCU can write next byte to transmit
Note: Initialize RF12B and open transmitter, RF12B will transm
w

RF12 Program V1.1
Receiver:
DEMO
Init RF12B
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Note: After RF12B initialization, Open FIFO receive mode and wait nIRQ low, only then MCU
can r ad received and stored in FIFO data. For next package receive, please reset FIFO.
e
Receive data
Indicate receive
Open RX
N
Check
p
ass?
Y
Receive data
Wait nIRQ low
Read FIFO data
Data recive
over?
N
Y
return