Infinion TLD5098EP User manual

Voltage-mode SEPIC evaluation kit
TLD5098EP
About this document
Description
The TLD5098EP is an AEC qualified DC-DC boost controller, especially designed to drive LEDs.
• Built-in diagnosis and protection features
• Designed to support multiple topologies such as Boost, Buck, Buck-Boost, SEPIC and Flyback
Scope and purpose
Scope of this user manual is to provide instructions on the usage of TLD5098EP voltage-mode SEPIC evaluation
board.
Intended audience
This document is intended for engineers who need to perform measurements and check performances with
TLD5098EP voltage-mode SEPIC evaluation board.
Table of contents
About this document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Quick start procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3 Auto-enable configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
5 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7Eiciency measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
8 Maximizing eiciency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9 Minimizing EM emissions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
User Manual
User Manual Please read the Important Notice and Warnings at the end of this document
www.infineon.com 2020-09-17

1 Description
Evaluation board for medium power application with TLD5098EP configured in voltage-mode SEPIC topology,
which can be implemented as DC-DC power supply with constant voltage output.
The default configuration of the board is voltage-mode SEPIC topology without any additional features
enabled. In this configuration it can deliver up to 12 W to the load with an eiciency above 86%. Auxiliary
circuits, which protect the DC-DC and the load during short to ground forcing the current to zero, are not
present. The short to ground current is limited to a few amps by the embedded current control loop.
Figure 1 Board picture
Voltage-mode SEPIC evaluation kit
TLD5098EP
1 Description
User Manual 2
2020-09-17

Figure 2 Simplified schematic
Table 1 Performance summary
Parameter Conditions Value
Input supply voltage Parameter degradation below 6.5 V 8 V to 27 V
(Down to 6.5 V for less than 2 s)
Maximum output current Resistive load 1 A
Switching frequency VIN = 13.2 V, spread spectrum "on" 400 kHz
Eiciency Measured with a 12 Ω power resistor as load > 86%
Output voltage range Output voltage related to ground 12 V
Output overvoltage
protection
Output voltage related to ground 16 V
Voltage-mode SEPIC evaluation kit
TLD5098EP
1 Description
User Manual 3
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2 Quick start procedure
The default configuration of the board has all additional features disabled. The jumper is placed in 1-2 position.
In this configuration the enable signal has to be applied on X18 (max. 45 V). If another output voltage is
required, change the values of the voltage divider resistors R24, R25, and R26 according to the following
equation:
(1)
VOUT
R24 + R25 + R26 ⋅R25 = VREF
where VOUT is the desired output voltage and VREF = 300 mV is the feedback reference voltage.
Correct device functioning is achieved if voltages VFBH and VFBL on both terminals of R25 are greater than 3 V
respect to ground.
Attention:On this board VOUT is set to 12 V by default. Increasing VOUT over the default level may damage
some components irreversibly.
The default configuration is depicted below:
Figure 3 Default configuration of the board
Voltage-mode SEPIC evaluation kit
TLD5098EP
2 Quick start procedure
User Manual 4
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3 Auto-enable configuration
By placing the jumper X5 on the position 2-3, the device starts without any external enable signal because pin
EN (Enable) is connected directly to the positive rail. See Chapter 4 for details.
Figure 4 Auto-enable configuration
Voltage-mode SEPIC evaluation kit
TLD5098EP
3 Auto-enable configuration
User Manual 5
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4 Schematics
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
D D
C C B B
A A
18/03/2020 15:36:18Date: Sheet of
Time:
© Infineon Technologies AG 2019. All Rights Reserved. Author: Riccardo Zuin
03-TLD5098EP_VSEPIC_S00_Input Filter.SchDoc
Infineon Technologies AG IFI DC ATV BP Via Niccolo Tommaseo 65b 35131 Padova Italy
S00
Title Size: Rev.
A3 Document Name
03-TLD5098EP_VSEPIC_S00_Input Filter.SchDoc
Rel. REL
Variant TLD5098EP_VSEPIC
[No Variations] Approved <Appr.>
SVN Revision: Not in version control
GND
External Enable
12
50V
C18 220uF
GND
2 3
1
Q1
IPD90P04P4L-04
R1 10k
GND GND
Vbat_FIL
4A PI type filter. Suitable for switching frequency down to 200kHz
N.M.50V
C9 100nF
GND GND GND
MPZ2012S101ATD25
L2 100R
1 2
X1
Solder Jumper 2 Pins
GND V bat
Ext_EN
GND
1 2
X14
Solder Jumper 2 Pins
1 2
X16
Solder Jumper 2 Pins
50V C14 470pF
50V C13 470pF
1 4 2 3
ACM70V-701-2PL-TL00
L4 700R
Chassis
50V
C30 4.7uF
50V C1 10uF 50V
C2 10uF 50V
C6 10uF 50V
C7 10uF
XAL6060-103MEB
L1 10uH
MIN Input Voltage (V bat): 8V TYP Input Voltage (V bat): 13,2V MAX Input Voltage (V bat): 27V MIN Input Voltage (V bat): 6.5V (for less than 2s)
1 2
Phoenix Contact
X2 1935776
1 2
Phoenix Contact
X18 1935776
31
NC
2
BZX84C10LT1G
D1 10V
Figure 5 Input filter
Voltage-mode SEPIC evaluation kit
TLD5098EP
4 Schematics
User Manual 6
2020-09-17

1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
D D
C C B B
A A
18/03/2020 15:37:20Date: Sheet of
Time:
© Infineon Technologies AG 2019. All Rights Reserved. Author: Riccardo Zuin
04-TLD5098EP_VSEPIC_S00_Main Power.SchDoc
Infineon Technologies AG IFI DC ATV BP Via Niccolo Tommaseo 65b 35131 Padova Italy
S00
Title Size: Rev.
A3 Document Name
04-TLD5098EP_VSEPIC_S00_Main Power.SchDoc
Rel. REL
Variant TLD5098EP_VSEPIC
[No Variations] Approved <Appr.>
SVN Revision: Not in version control
Vbat_FIL Vbat_FIL
50V C19 10uF
GND
GND
R8 10R
GND
12 D2
PMEG6030EP,115
GND
12V / 1A
GND GND
100V C22 4.7uF
100V C21 4.7uF
GND
100V C20 4.7uF
OVFB > 1,25V when V OUT > 16V
23
1
Q2
IPD25N06S4L-30
0805 R6 39k
X3
5001
X4
5001
FBH FBL
3 1
NC 2
D8 BAS16
IVCC(5V)
50V C36 100nF
GND
OUT+ (12V / 1A) OUT-
GND
MPZ2012S102ATD25
L5 1kR
MPZ2012S102ATD25
L3 1kR
GND
GND
N.M.
GND
100V
C12
4.7uF
100V
C15
4.7uF
100V
C16
4.7uF
N.M. 0805
R24 3.9k 0805 R25 220R
0805 R26 4.7k
0805 R10 3.3k
2512 R9 39mR
100V C25 2.2nF
2512 R5 4.7R
1 2
Phoenix Contact X15 1935776
1
4 2 3
B82477D4223M000
L7A 22uH
R23
2k
X20
D3082-05GND
C26 100nF
GND
C27 10uF
GND
IVCC(5V)
GND
Rfreq
(400kHz)
1 2 3
X5 TSM-103-01-S-SV
Ext_EN
(1-2) External Enable (2-3) Internal Enable
GND
X8
5001
IVCC
Vbat_FIL
X21
5001
SYNC
Vbat_FIL
IVCC(5V)
SWO 2
SWCS 4
IVCC
1
SGND 3
COMP
8
PWMO 5
FBH 6
FBL 7
OVFB 9
SET
10
FREQ/SYNC
11
GND 12
EN/PWMI
13
IN
14 EP 15
U1 TLD5098EP
R11 14k
R12 0R
100V C29 100nF
GND
Figure 6 Main power
Voltage-mode SEPIC evaluation kit
TLD5098EP
4 Schematics
User Manual 7
2020-09-17

5 PCB layout
Figure 7 PCB layout top view
Figure 8 PCB layout bottom view
Voltage-mode SEPIC evaluation kit
TLD5098EP
5 PCB layout
User Manual 8
2020-09-17

6 Bill of material
Table 2 Bill of material
Designator Value Manufacturer Manufacturer order number
C1, C2, C6, C7, C19 10 uF Murata GCM32EC71H106KA03
C9, C26, C36 100 nF AVX 06035C104K4Z2A
C12, C15, C20, C21 4.7 uF TDK CGA6M3X7S2A475K200AE
C13, C14 470 pF Murata GCM1885C1H471JA16
C16, C22 4.7 uF TDK CGA6M3X7S2A475K200AE
C18 220 uF Panasonic EEEFK1H221P
C25 2.2 nF Murata GCM2165C2A222FA16
C27 10 uF TDK CGA4J1X7S1C106K125AC
C29 100 nF TDK CGA4J2X7R2A104M125AE
C30 4.7 uF Kemet C1210C475K5RACAUTO
D1 10 V ON Semiconductor BZX84C10LT1G
D2 PMEG6030EP,115 Nexperia PMEG6030EP,115
D8 BAS16 Infineon Technologies BAS16
L1 10 uH Coilcra XAL6060-103MEB
L2 100 Ω @ 100 MHz TDK MPZ2012S101ATD25
L3, L5 1 kΩ @ 100 MHz TDK MPZ2012S102ATD25
L4 TDK ACM70V-701-2PL-TL00
L7 22 uH TDK B82477D4223M000
Q1 IPD90P04P4L-04 Infineon Technologies IPD90P04P4L-04
Q2 IPD25N06S4L-30 Infineon Technologies IPD25N06S4L-30
R1 10 kΩ Vishay CRCW060310K0FK
R5 4.7 Ω Vishay CRCW25124R70FK
R6 39 kΩ Vishay CRCW080539K0FK
R8 10 Ω Vishay CRCW060310R0FK
R9 39 mΩ Vishay WSL2512R0390FEA
R10 3.3 kΩ Vishay CRCW08053K30FK
R11 14 kΩ Vishay CRCW080514K0FK
R12 0 Ω Yageo AC0805JR-070RL
R23 2 kΩ Vishay CRCW08052K00FK
R24 3.9 kΩ Vishay CRCW08053K90FK
R25 220 Ω Vishay CRCW0805220RFK
R26 4.7 kΩ Vishay CRCW08054K70FK
U1 TLD5098EP Infineon Technologies TLD5098EP
X1, X14, X16 Solder Jumper 2
Pins
Solder Jumper 2 Pins
Voltage-mode SEPIC evaluation kit
TLD5098EP
6 Bill of material
User Manual 9
2020-09-17

Table 2 Bill of material (continued)
Designator Value Manufacturer Manufacturer order number
X2, X15, X18 1935776 Phoenix Contact 1935776
X3, X4, X8, X21 5001 Keystone 5001
X5 TSM-103-01-S-SV Samtec TSM-103-01-S-SV
X20 D3082-05 Harwin D3082-05
Voltage-mode SEPIC evaluation kit
TLD5098EP
6 Bill of material
User Manual 10
2020-09-17

7Eiciency measurements
Figure 9 Eiciency vs. input voltage
This eiciency performance has been obtained with:
Table 3 Parameters influencing eiciency
Output load: 12 Ω power resistor
EMI filter Totally bypassed by closing the jumpers X1, X14 and X16
Eiciency performances can be increased, see Chapter 8.
Voltage-mode SEPIC evaluation kit
TLD5098EP
7 Eiciency measurements
User Manual 11
2020-09-17

8 Maximizing eiciency
This evaluation board has been designed to reach a fair compromise between eiciency performance and EM
emissions compliance.
Nevertheless, if the maximum eiciency is needed, the following actions are suggested:
1. Remove the snubber circuit consisting of R5 and C25, or choose a lower value for the capacitor C25 (for
example 1 nF)
2. Bypass the whole EMI filter by bridging the jumpers X1, X14 and X16
3. Bypass the output ferrite beads L3 and L5
4. Replace the main inductor L7 with one that boasts a lower parasitic DC resistance, for example
• TDK model B82477C6223M603
• TDK model B82477D6223M603
5. Bypass gate resistor R8
Voltage-mode SEPIC evaluation kit
TLD5098EP
8 Maximizing eiciency
User Manual 12
2020-09-17

9 Minimizing EM emissions
This evaluation board has been designed to reach a fair compromise between eiciency performance and
conducted EM emissions compliance from 150 kHz to 108 MHz.
Nevertheless, if the minimum EM emission is required, the following actions should be considered:
1. Choose a higher value for the capacitor C25 (for example 2.7 or 3.3 nF)
2. Include the whole EMI filter by removing bridges from the jumpers X1, X14 and X16
3. Replace the 10 Ω resistor R8 with a higher value such as 22 Ω or 33 Ω
4. Connect the CHASSIS terminal with a short piece of wire as close as possible to the test ground where the
board is placed
Voltage-mode SEPIC evaluation kit
TLD5098EP
9 Minimizing EM emissions
User Manual 13
2020-09-17

10 Revision history
Document
version
Date of release Description of changes
Rev. 1.00 2020-09-17 First release related to evalboard S00_P00
Voltage-mode SEPIC evaluation kit
TLD5098EP
10 Revision history
User Manual 14
2020-09-17

Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2020-09-17
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2020 Infineon Technologies AG
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: [e-mail]
Document reference
IFX-kvd1595918745679
IMPORTANT NOTICE
The information contained in this application note is
given as a hint for the implementation of the product
only and shall in no event be regarded as a description
or warranty of a certain functionality, condition
or quality of the product. Before implementation
of the product, the recipient of this application
note must verify any function and other technical
information given herein in the real application.
Infineon Technologies hereby disclaims any and all
warranties and liabilities of any kind (including without
limitation warranties of non-infringement of intellectual
property rights of any third party) with respect to any
and all information given in this application note.
The data contained in this document is exclusively
intended for technically trained sta. It is the
responsibility of customer’s technical departments to
evaluate the suitability of the product for the intended
application and the completeness of the product
information given in this document with respect to such
application.
WARNINGS
Due to technical requirements products may contain
dangerous substances. For information on the types
in question please contact your nearest Infineon
Technologies oice.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized representatives of Infineon Technologies,
Infineon Technologies’ products may not be used in
any applications where a failure of the product or
any consequences of the use thereof can reasonably
be expected to result in personal injury.