ISSI Flicker-Free IS31LT3935 User manual

IS31LT3935 Bulb Lighting Evaluation Board Guide
Integrated Silicon Solution, Inc. – www.issi.com 1
R1.0, 18/04/2013
1
Description
The Flicker-FreeTM IS31LT3935 is a single stage current
mode LED driver optimized for high power factor and
compatibility with all TRIAC dimmers. The PFC architecture
enables excellent power factor over a wide range of operating
line and load conditions, even with the simplest of inductor
based driver topologies, thereby reducing system cost and
size while maximizing efficiency.
The IS31LT3935 LED controller features patent pending
AccuDim™ flicker-free dimming technology that mimics the
characteristics of an incandescent light bulb. It presents a
dynamic impedance to the dimmer and integrates an active
bleed circuit for true dimming performance across all
dimmers.
The device is available in a tiny 10 lead DFN-EP (3mm ×3mm)
package. It operates over the temperature range of -40°C to
+85°C.
Features
●Smooth 0-100% Flicker-free Dimming Range
●Compatibility with all TRIAC Dimmers (Digital, Leading
and Trailing-edge)
●Near unity PFC without External PFC Circuitry
●Spread Spectrum Switching for Reduced EMI
●Low 500μA Quiescent Current
●Protections:
●Soft Start
●Under-voltage, (Over-voltage) Lockout
●Thermal Shutdown
Applications
●Dimmable Retrofit LED Lamps and Luminaries up to 30W
●Industrial and Commercial Lighting
●Offline LED Driver Modules and Bricks
Quick Start
Recommended Equipment
●85~265VAC/50~60Hz power supply
●LED array(12 in series )40Vdc-0.37A
●220V input TRIAC Dimmer
Absolute Maximum Ratings
●≤264VAC power supply
●≤47V Vout (Total Vf)
Caution: Do not exceed the conditions listed above,
otherwise the board will be damaged or the output will
be limited
Procedure
The IS31LT3935 DEMO Board is fully assembled and tested.
Follow the steps listed below to verify board operation.
Caution: Do not turn on the power supply until all
connections are completed.
1) Connect the positive terminal of the LEDs to the LED+ of
the DEMO and the negative terminal of the LEDs to the
LED- of the Evaluation Board.
2) Connect the input pin N of the Evaluation Board via the
main power switch to AC power supply N.
3) Connect the input pin L of the Evaluation Board via
TRAIC Dimmer pin L, Another pin of TRAIC Dimmer
Connect to the AC power supply L.
4) Turn on the power supply, Adjust the angle of TRAIC
Dimmer
Ordering Information
For pricing, delivery, and ordering information, please contact ISSI at anal[email protected]
or call [phone]
PART# TEMP
RANGE IC PACKAGE
IS31LT3935-DLS2-TR -40 to 125°C DFN-10
(Exposed Pad)

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Figure 1 IS31LT3935 Evaluation Board
Schematic
Note: ISSI Evaluation Board does not include a LED array
Figure 2 Picture of Evaluation Board
NOTE: Physical dimensions are (L×W×H): 73mm×25mm×23mm
PCB Layout
Figure 3 PCB Layout – Top layer
Figure 4 PCB Layout – Bottom layer
OPTION：for open output voltage
protection .

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Bill of Materials
No. Name Description Ref Des. Qty. Mfr P/N
1 FUSE
1A250V Φ3 F1 1
2 MOV 7D471 PIN7 VR 1
3 Bridge rectifier DB107 DIP4 BD1 1
4 Inductor 3mH 0810 L1，L2 2
5 Inductor 6mH 0810 L3 1
6 Transformer 450uH PQ2016 TR 1
7 Resistor 5.1kΩ5% 0805 R1，R4，R4.1 3
8 Resistor 510Ω5% 1W R2 1
9 Resistor 200kΩ1% 1206 R6 1
10 Resistor 180kΩ1% 1206 R12 1
11 Resistor 3.0kΩ1% 0805 R16 1
12 Resistor 270kΩ1% 1206 R7 1
13 Resistor 200kΩ1% 1206 R13 1
14 Resistor 5.6kΩ1% 0805 R17 1
15 Resistor 10Ω1% 1206 R3，R14 2
16 Resistor 330kΩ5% 1206 R8 1
17 Resistor 1.0Ω5% 0805 R9，R15 1
18 Resistor 10.0Ω5% 0805 R15 1
19 Resistor 100Ω5% 0805 R10 1
20 Resistor 5.6M Ω5% 0805 R11 1
21 Resistor NC R20,R5,C12,C4,R27 0
22 Resistor 300kΩ5% 1206 R21,R22 2
23 Resistor 180kΩ5% 1206 R23,R24 2
24 Resistor 180kΩ1% 0805 R19 1
25 Resistor 0.16Ω1% 1206 R18 1
26 Resistor 200Ω5% 0805 R26 1
27 Resistor 51Ω5% 0805 R25 1
28 CBB-CAP 68nF 630V pin10 C1 1
29 CBB-CAP 220nF 630V pin15 C5 1
30 E-CAP 470uF 50V 1020 C2,C3 2
31 SMD-CAP 22nF 25V X7R 0805 C6 1
32 SMD-CAP 1uF 25V X7R 0805 C7,C8 2
33 SMD-CAP 10uF 25V X7R 0805 C14 1
34 SMD-CAP 10uF 25V X7R 1206 C9,C10 2
35 SMD-CAP 33PF 25V X7R 0805 C11 1
36 SMD-CAP 1nF 1000V X7R 1206 C13 1
37 Y1-CAP 1nF PIN10 CY 1
38 SMD-DIODE ES2J D1 1
39 SMD-DIODE FR107 D6 1

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NOTE：please make sure you Dimmer parameter is suitable you application voltage and
frequency.
40 SMD-DIODE 1N914BWT SOD-523F D2,D4,D5,D7 4
41 SMD-DIODE 1N4148 SOD-80 D10 1
42 SMD-ZENER 9.1V 1% SOD-80 D3 1
43 SMD-ZENER 16V 1% SOD-80 D9 1
44 SMD-ZENER 47V 1% SOD-80 D8 1
45 MOS 4N60C TO-252 Q3 1
46 MOS AP2306 SOT-23 Q2 1
47 MOS BSP125 SOT223 Q1 1
48 Photo-coupler EL357 MSOP-4 U2 1
49 IC IS31LT3935 DFN10 U1 1
50 CBB-CAP 22nF 630V PIN10 CX 1

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Transformer Design
ELECTRICAL SPECIFCATIONS:
1.Primary inductance(Lp)=450uH@10kHz
2. Primary Leakage Inductance (Lk)< = 20uH @10KHz
3. Electrical Strength = 3KV, 50/60Hz,1Min
MATERIALS:
1. Core:PQ2016(Ferrite Material TDK PC40 or equivalent)
2. Bobin:PQ2016 Primary 6,Secondary:8
3.. Magnet Wires (Pri) : Type 2-UEW
4. Magnet Wire (Sec) : Triple Insulated Wires
5. Layer Insulation Tape :3M1298 or equivalent.
SCHEMTIC
NO. winding Start End number
of turns number
of plies
diameter number of
plies
tape remar
ks
1 NP1 3 2 17T 2 0.40mm-2-UEW 2 0.02*7.5mm
2 NS 14 9 16T 2 2P*0.20mm-TEX 3 0.02*7.5mm
3 NP2 2 1 16T 1 0.40mm- 2-UEW 3 0.02*7.5mm
Line Regulation and Efficiency
Input Voltage Input Power THD PF Output Voltage Output Current Efficiency
176Vac/50Hz 15.53 11.8% 0.979 40.4 0.329 85.60%
198Vac/50Hz 17.24 13.8% 0.964 40.8 0.360 85.20%
220Vac/50Hz 18.69 26.0% 0.945 41.2 0.386 85.09%
242Vac/50Hz 19.95 27.3% 0.925 41.5 0.407 84.66%
264Vac/50Hz 21.10 28.5% 0.905 41.8 0.424 84.00%

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Load Regulation and Efficiency
Input Voltage Input Power THD PF Output Voltage Output Current Efficiency
220Vac/50Hz 18.72 26.1% 0.945 38.14 0.418 85.16%
220Vac/50Hz 18.69 26.0% 0.945 41.2 0.386 85.09%
220Vac/50Hz 18.6 26.0% 0.945 43.9 0.359 84.73%
NOTE: Please don’t make the DEMO operation long time without load.

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EMI test Report
Figure 5. L line

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Figure 6. N line
Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this
specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any
information, products or services described herein. Customers are advised to obtain the latest version of this device
specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly
affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution,
Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumst

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Modify value of a few components for different output voltage and current application
NO. Ref Des. Vout=40V Iout=0.38A Vout=33V Iout=0.42A Vout=24V Iout=0.65A
Description Description Description
1 D1 ES2G ES2G SB5200
2 C2 470uF 50V 470uF 50V 470uF 35V
3 C3 470uF 50V 470uF 50V 470uF 35V
4 R18 0.16Ω1% 1206 0.33Ω1% 1206 0.18Ω1% 1206
5 R27 NC 0.33Ω1% 1206 3.0Ω1% 1206
6 D8 47V 1% SOD-80 39V 1% SOD-80 30V 1% SOD-80
Vout=33V Iout=0.42A
Transformer Design
ELECTRICAL SPECIFCATIONS:
1.Primary inductance(Lp)=450uH@10kHz
2. Primary Leakage Inductance (Lk)< = 20uH @10KHz
3. Electrical Strength = 3KV, 50/60Hz,1Min
MATERIALS:
1. Core:PQ2016(Ferrite Material TDK PC40 or equivalent)
2. Bobin:PQ2016 Primary 6,Secondary:8
3.. Magnet Wires (Pri) : Type 2-UEW
4. Magnet Wire (Sec) : Triple Insulated Wires
5. Layer Insulation Tape :3M1298 or equivalent.
SCHEMTIC
NO. winding Start End number
of turns
number
of plies
diameter number of
plies
tape remar
ks
1 NP1 3 2 17T 2 0.40mm-2-UEW 2 0.02*7.5mm
2 NS 14 9 13T 2 0.32mm-TEX 3 0.02*7.5mm
3 NP2 2 1 16T 1 0.40mm- 2-UEW 3 0.02*7.5mm

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Line Regulation and Efficiency
Input Voltage Input Power THD PF Output Voltage Output Current Efficiency
176Vac/50Hz 14.01 17.1% 0.969 33.74 0.352 84.77%
198Vac/50Hz 15.37 18.9% 0.949 34.09 0.380 84.28%
220Vac/50Hz 16.37 30.8% 0.927 34.37 0.402 84.40%
242Vac/50Hz 17.39 27.3% 0.904 34.60 0.421 83.76%
264Vac/50Hz 18.31 28.5% 0.881 34.81 0.438 83.27%
Load Regulation and Efficiency
Input Voltage Input Power THD PF Output Voltage Output Current Efficiency
220Vac/50Hz 16.38 30.9% 0.926 31.34 0.440 84.19%
220Vac/50Hz 16.37 30.8% 0.927 34.37 0.402 84.40%
220Vac/50Hz 16.43 30.9% 0.926 37.38 0.370 84.73%
NOTE: Please don’t make the DEMO operation long time without load.

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EMI test Report
Figure 7. L line

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Figure 8. N line

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Vout=24V Iout=0.64A
Transformer Design
ELECTRICAL SPECIFCATIONS:
1.Primary inductance(Lp)=450uH@10kHz
2. Primary Leakage Inductance (Lk)< = 20uH @10KHz
3. Electrical Strength = 3KV, 50/60Hz,1Min
MATERIALS:
1. Core:PQ2016(Ferrite Material TDK PC40 or equivalent)
2. Bobin:PQ2016 Primary 6,Secondary:8
3.. Magnet Wires (Pri) : Type 2-UEW
4. Magnet Wire (Sec) : Triple Insulated Wires
5. Layer Insulation Tape :3M1298 or equivalent.
SCHEMTIC
NO. winding Start End number
of turns
number
of plies
diameter number of
plies
tape remar
ks
1 NP1 3 2 17T 2 0.40mm-2-UEW 2 0.02*7.5mm
2 NS 14 9 10T 2 0.40mm-TEX 3 0.02*7.5mm
3 NP2 2 1 16T 1 0.40mm- 2-UEW 3 0.02*7.5mm
Line Regulation and Efficiency
Input Voltage Input Power THD PF Output Voltage Output Current Efficiency
176Vac/50Hz 14.48 11.5% 0.977 21.81 0.556 83.75%
198Vac/50Hz 16.08 13.4% 0.961 22.17 0.606 83.55%
220Vac/50Hz 17.35 25.5% 0.942 22.45 0.644 83.33%
242Vac/50Hz 18.48 26.8% 0.921 22.67 0.675 82.80%
264Vac/50Hz 19.42 27.8% 0.899 22.85 0.698 82.13%

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Load Regulation and Efficiency
Input Voltage Input Power THD PF Output Voltage Output Current Efficiency
220Vac/50Hz 17.25 25.5% 0.941 19.42 0.735 82.75%
220Vac/50Hz 17.35 25.5% 0.942 22.45 0.644 83.33%
220Vac/50Hz 17.25 25.5% 0.941 25.37 0.568 83.54%
NOTE: Please don’t make the DEMO operation long time without load.

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EMI test Report
Figure 9. L line

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Figure 10. N line