JRC NJU6062 User manual

-1-
NJU6062
Full Color LED Controller Driver with PWM Control
 GENERAL DESCRIPTION
The NJU6062 is a full color LED controller driver. It can
control and drive a 3 in 1 packaged (Red, Green and
Blue) LED.
The NJU6062 contains PWM luminance (Pulse Width
Modulation) control circuit , LED driving circuit, MPU
interface.
The PWM signal control the duty cycle of each RGB
LED delicately, therefore can recognize a lot of colors.
Enable terminal (ON/OFF) is possible to synchronize
with a sound source..
It requires only four external components such as three
resistors for LED current adjustment, which enables the
NJU6062 to save PCB space.
Multi Device control is enabled and it is possible to
control the multiple NJU6062 by a I2C address.
The NJU6062 is suitable for cellular phone, car audio
and so on.
 FEATURES
 Controlling a 3-in-1 packaged RGB LED
 4-channel output ILED=30mA x 4
 Built-in PWM luminance control (256steps x 4)
 Built-in I2C interface circuit
 Multi Device control
 Built-in CR oscillation circuit
 Operating voltage 1.8V to 5.5V
 Package FFP12(2.0*2.0*0.85mm), SSOP14
 CMOS Technology
 PACKAGE OUTLINE
NJU6062PB1
(FFP12) NJU6062V
(SSOP14)

- 2 -
NJU6062
 PIN CONNECTIONS (TOP VIEW)
FFP12 SSOP14
 PIN DESCRIPTIONS
PIN No.
FFP12 SSOP14 PIN NAME TYPE DESCRIPTIONS
1 12 SCL
Input Serial Clock terminal
2 11 SDA
Input /
Output Serial Data terminal
3 10 RSTb
Input
Reset terminal - Active “L”.
"L" status: Reset state
"H" status: Operating state
4 8 DATAOUT
Output Multi Device control terminal (connect RSTb of next NJU6062 for
Multi Device use.)
5 7 OSC
Input
External clock input terminal
It is used by external clock.
Normally open.
6 6 VSS Power Ground terminal
7 5 LED1
Output
8 4 LED2
Output
9 3 LED3
Output
10 2 LED4
Output
LED Connect terminals (Open drain output)
Output level can be divided into 256 steps by PWM signal.
Connecting with the cathode of LED.
11 14 EN
Input
Enable terminal
built-in Pull-up resistor
“H” : LED ON
“L” : LED OFF
12 13 VDD Power VDD Power Supply terminal
- 1,9 NC Non Connect
These terminals are electrically open.
RSTb
LED1
VDD
EN
LED4
LED2 LED3
SDA SCL
OSC
VSS
DATAOUT
To
p
View
VDD
EN
LED4
OSC
VSS
DATAOUT
SCLLED3
SDALED2
RSTbLED1
NC
NC
To
p
View

-3-
NJU6062
BLOCK DIAGRAM
 FUNCTIONAL DESCRIPTIONS
(1) Description for Each Blocks
(1-1) PWM Luminance Control
The NJU6062 incorporates four 256 steps PWM Luminance Control circuits.
At the user’s option, PWM data can be set.
PWM data set by selecting start point(S) and end point(E) of each terminal.
OSC
VDD
RSTb
SCL
SD
A
EN
LED1
LED2
LED3
1.8 to 5.5V
3.6 to 6.0V
I2C
I/F
256 step
PWM
Driver
30mA
C
P
U
OSC
256 step
PWM
Driver
30mA
256 step
PWM
Driver
30mA
LED4
256 step
PWM
Driver
30mA
DATAOUT
Instruction
Decoder
1-frame
1/256step 1us(1MHz) fOSC=1MHz
1-frame = 256step = 256us(3.9kHz)
LED1
LED2
LED3
LED4
LED1 S LED1 E
LED2 S LED2 E
LED3 S
LED4 S LED3,4 E
LED1
LED2
LED3

- 4 -
NJU6062
(1-2) Oscillator
The oscillation circuit with the internal register and capacitor generates the clock signal for PWM.
The oscillation circuit can be turned on/off by the instruction to minimize the current consumption.
The oscillation frequency (fosc) can be selected in 16 conditions by the instruction.
Additionally, it can operate the external clock without using the internal oscillation circuit.
If not zero PWM signal is still output after the oscillation circuit OFF, write “00h” into the start point(S) and
end point(E) register or let EN =“L”.
(1-3) Enable function
The enable terminal (EN terminal) is used to turn on/off the device from the external. The register value
does not change by this signal. When EN terminal is not used open.

-5-
NJU6062
Instructions
The data transfer between CPU and the NJU6062 is via a I2C interface.
Table.1 shows the instruction codes of the NJU6062.
Table 1. Instruction Code
* : Don’t Care
Code
Instruction Lower
address D7D
6D5D4D3D2D1D0
Description
(a) Function Set 00h AI PWM FC1FC0FD1FD0EXT FS
AL : Address increment
PWM : PWM output
FC1, FC0: OSC freq. Select
FD1 , FD0: Divide ratio Select
EXT : External OSC use
FS : Internal OSC ON/OFF
LED1 Start 01h
LED2 Start 02h
LED3 Start 03h
LED4 Start 04h
PWM data/ Start Point
LED1End 05h
LED 2End 06h
LED3 End 07h
(b)
LED4 End 08h
PWM data/ End Point
PWM data/ Start Point
/ End Point Set
(c) Update/
Static on 09h UD4UD3UD2UD1GP4GP3GP2GP1
UD1 to UD4: Data update
GP1~GP4 : Statifc ON/OFF
NOP 0Ah~0Fh ********Non Operation code
(Not Applicable)
(d) Multi Device
Address set 10h MA7MA6MA5MA4MA3MA2MA1MA0Multi Device mode
address set
NOP 11h~1Eh ********Non Operation code
(Not Applicable)
(e) Maker Testing 1Fh T7T
6T 5T 4T 3T 2T 1T 0Inhibited command
Inhibited command 20h~FFh ********Inhibited command

- 6 -
NJU6062
(2-1) Explanation of Instruction Code
Lower address: 00h ~ 09h. It is incremented within the loop 05h ~ 09h.
Therefore, until the stop condition is reached, it is possible to write instructions that from the LED1 endpoint to the
update continuously
INSTRUCTION DATA REMARKS
START CONDITION I2C Start Condition
SLAVE ADDRESS 40h The Device Slave Address
UPPER ADDRESS 00h Multi Device Address
LOWER ADDRESS 00h The Internal Register Address
INITIAL SETTING 01h Initial Setting of Oscillation Frequency and so on
LED1 START 00h
LED2 START 00h
LED3 START 00h
LED4 START 00h
The Start Point Setting
LED1 END 10h
LED2 END 10h
LED3 END 10h
LED4 END 10h
The End Point Setting
UPDATE F0h Update of Start/End Point
LED1 END 20h
LED2 END 20h
LED3 END 20h
LED4 END 20h
The End Point Re-setting
UPDATE F0h Update of Start/End Point
STOP CONDITION I2C Stop Condition
START CONDITION I2C Start Condition
SLAVE ADDRESS 40h The Device Slave Address
UPPER ADDRESS 00h Multi Device Address
LOWER ADDRESS 05h The Internal Register Address
LED1 END 30h
LED2 END 30h
LED3 END 30h
LED4 END 30h
The End Point Re-setting
UPDATE F0h Update of Start/End Point
STOP CONDITION I2C Stop Condition

-7-
NJU6062
(2-2) Instruction Code
(a) Function Set
This instruction set the Address increment, Oscillation set PWM output select Function.
Lower
address D
7D 6D 5D 4D 3D 2D 1D 0
00h AI PWM FC1FC0FD1FD0EXT FS
Lower address increment set
Set the increment of the address of the write data.
It is possible to write the PWM data without address setting.
D70 : End point loop (return from 09h to 05h) (Default)
1 : All loop (return from 09h to 00h)
Lower address : When Al at ”L”, it returns from 09h to 05h. Then it enters the loop.
Ex.) 00h→01h→02h •••09h→05h •••09h→05h •••
Lower address : When Al at ”H”, it returns from 09h to 00h. Then it enters the loop.
Ex.) 00h→01h→02h •••09h→00h •••09h→00h •••
LED4 PWM Output ON/OFF set
DATAOUT terminal outputs the PWM waveform(LED4).
It is possible to control the external circuit requiring PWM control.
It is the ban on use under the Multi Device control.
D60 : LED4 terminal output(Default)
1 : DATAOUT terminal Output (LED4 terminal output”L”)
OSC frequency select
It is possible to switch the OSC frequency of the internal oscillation circuit between the 4-type OSC
frequency.
FC1FC0OSC
frequency(fosc)
0 0 1MHz
0 1 1.5MHz
1 0 2.5MHz
1 1 800kHz
Divide ratio select
Set the Frame Frequency. Select 16-type frame frequency by combining Divide ratio with OSC
frequency.
External clock input mode serect for 4-type frame frequency.
Ex.) frame frequency
FD1FD0frame frequency fosc=1MHz fosc=1.5MHz fosc=2.5MHz fosc=800kHz
0 0 fosc / 256 3.9KHz 5.86KHz 9.77KHz 3.1KHz
0 1 fosc / 512 1.95KHz 2.93KHz 4.88KHz 1.56KHz
1 0 fosc / 1024 975Hz 1.46KHz 2.44KHz 781Hz
1 1 fosc / 2048 488Hz 732Hz 1.22KHz 391Hz
Frame frequency
1/256step

- 8 -
NJU6062
External clock input mode set
The NJU6062 can be operated with external clock input without using internal oscillation circuit.
In the case of using external clock, set D1=”H”, and enter it from the OSC terminal.
D10 : Internal Oscillator use(Default)
1 : Enternal clock input from OSC terminal
OSC ON/OFF set
Set the internal oscillation or external clock ON/OFF
D00 : Oscillator OFF(Default)
1 : Oscillator ON
(b) PWM data Set
This instruction set start point(S) and end point(E) of each terminal.
Set the start point(S) and end point(E) of the PWM data corresponding to the each LED terminal.
Accordingly, PWM data is changed by the internal counter.
It is possible to set the PWM output to the steps 0~255.
256/256 can be set by static on.
PWM data set example
The relationship between PWM duty cycle and the register value is shown as below:
PWM 7 PWM 6 PWM 5 PWM 4 PWM 3 PWM 2 PWM 1 PWM 0
Start Point
End Point
0 0 0 0 0 0 0 0 0/256
0 0 0 0 0 0 0 1 1/256
0 0 0 0 0 0 1 0 2/256
0 0 0 0 0 0 1 1 3/256
0 0 0 0 0 1 0 0 4/256
0 0 0 0 0 1 0 1 5/256
1 1 1 1 1 1 0 1 253/256
1 1 1 1 1 1 1 0 254/256
1 1 1 1 1 1 1 1 255/256
Calculating formula is as follows.
DUTY = E - S •••(1)
If the result of (1) is negative, the calculating formula is as below.
DUTY = E - S + 256 •••(2)
LED1 S LED1 E
LED2 S LED2 E
LED3 S
LED4 S LED3,4 E
LED1
LED2
LED3
LED4
1 fra

-9-
NJU6062
(c) Update / Static on
This instruction is active PWM data to LED terminal output / LED terminal is made "H" regardless of PWM
data.
Lower
address D7D
6D 5D 4D 3D 2D 1D 0
09h UD4UD3UD2UD1GP4GP3GP2GP1
UD4~ UD1: Update
Set the update of PWM data of each LED terminal.
Setting UD4~UD1 bit corresponding to each LED terminal to “H”, PWM output is updated to PWM
data that is set at section (b).
In the case of setting it to “L”, it is not updated.
UD4=LED4, UD3=LED3, UD2=LED2, UD1=LED1
The update of PWM data is synchronized with the frame, and it is valid in the next frame.
GP4~ GP1: Static on
When GP 4~GP 1 bit corresponding to each LED terminal is set to “H”, the PWM data is disabled and
the output is enabled.
Process of turn off of each LED terminal : Set GP 4~GP 1 bit to “L” to enable the PWM data, and set
startpoint (S) and endpoint (E) of the PWM dataset to 00h.
Additionaly, all terminal is set to “L” by setting EN terminal to “L”
GP 4=LED4, GP 3=LED3, GP 2=LED2, GP 1=LED1
Static on: It is not synchronized with the frame and is also valid in the case of the update “L”
And it is ban on use under the Multi Device control.
(d) Multi Device address set
Set the Multi Device address when the Multi Device is connected.
Multi Device address (MA) : 01h~Feh
It has 254 patterns of address.
Lower
address D7D
6D 5D 4D 3D 2D 1D 0
10h MA7MA 6 MA 5 MA 4 MA 3 MA 2 MA 1 MA 0
MA 7 MA 6 MA 5 MA 4 MA 3 MA 2 MA 1 MA 0 Upper address
0 0 0 0 0 0 0 1 01h
0 0 0 0 0 0 1 0 02h
0 0 0 0 0 0 1 1 03h
0 0 0 0 0 1 0 0 04h
0 0 0 0 0 1 0 1 05h
1 1 1 1 1 1 0 1 FDh
1 1 1 1 1 1 1 0 FEh
1 1 1 1 1 1 1 1 FFh

- 10 -
NJU6062
(2) Data Input Timing
Data format is shown below.
There are upper address and lower address with slave address. When multi Device control is used, upper
address is used for the device select. Lower address identifies each instruction.
Please set 00h when you do not use the multi Device control(For 1 piece use).
The data of SDA is taken by rising edge about SCL.
Lower address does the increment based on Lower address increment set(AI) instruction.
It is possible to write it continuously until the stop condition is approved.
1. Start condition
A fall edge of the SDA terminal while the SCL terminals “H”, which situation defines the Start conditions.
2. Slave address
First bite defines the slave address of NJU6062. Slave address is (40)h. When NJU6062 acknowledges
coincidence its own address with the address in the first byte, it outputs the acknowledge just after the first
byte(at ninth bit timing) through the SDA terminal.
3. R/W condition
NJU6062 is only for slave LSI, and the data D0 in the first byte(at eighth bit timing) should be ”0”.
4. Upper address
Second bite defines the Upper address, it outputs the acknowledge just after the ninth bit timing through the
SDA terminal.
5. Lower address
Third bite defines the Lower address, it outputs the acknowledge just after the ninth bit timing through the SDA
terminal.
6. Data
After fourth bite, transfer the display data bite.
7. Stop condition
A rise edge of the SDA terminal while the SCL terminal is “H”, which situation defines the STOP condition.
8. Repeat start condition
After start condition set, a fall edge of the SDA terminal while the SCL terminals “H”, which situation next data
read start.
Input data
S: Start condition
A
: acknowledge
P: Stop condition
W
MSB
SCL
SD
A
MSB
LSB LSB
1 2 7 8 9127
89
S AA
I
2
C Slave address Upper address
LSB
12 7 8 9
ALower address
MSB
P
LSB
127 89
A
MSB
R/W