Kenwood TM-731A User manual

TM-731A/E
|
KENWOOD
SERVICE
MANUAL
©1989-7 PRINTED IN JAPAN
B51-8015-00(T)1349
Knob
(K29-3111-04) x3 Metalt b (Top)
: * etallic cabinet (Top.
wecpnen®” (A01-1076-02)
Knob
(K29-3111-04) x3
Panel ass’y*
(A20-)
Knob (SQ)
{K29-31 16-04)
Knob (AF)
(K29-3115-04)
Panel*
Knob (Main)
(K29-3060-04)
Knob
{K29-3112-04) x5
Knob (Up/Down} Knob (F) Knob (Button) Metallic cabinet (Bottom)
(K29-3114-04)x2 | (K28-3143-04} (K27-3026-04) x 2 (AQ1-1048-02}
Knob (Sub-Encoder) Knob (Button) Knob (LOW)
(K29-3145-04) (K27-3028-04) (K29-3144-04)
*Refer to parts list on page 25.
Photo is TM-731A.
CONTENTS
CIRCUIT DESCRIPTION ..0......ccceeceecseeesteaseesnessteesen CONTROL UNIT (X53-3250-XX) oes seceeeeseeseeeeerreees 66
DESCRIPTION OF ELEMENTS __ 144 MHz TX-RX UNIT (X57-3400-XX) veeeseesseersereens 68
PARTS
LIST...
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430
MHz
TX-RX
UNIT
(XB7-3390-XX)
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70
EXPLODED VIEW .000.0...cccssseccessesensereesessesseeseeseesees FINAL UNIT (430 MHz) (X45-3340-XX) oes 72
PACKING .......csccsscessesssesesseeeeeeseseessneesessneeseeseeneenes FINAL UNIT (144 MHz) (X45-3340-XX) oe cseeeseesenne 73
ADJUSTMENT 20.0.0... ceeccccesseesseeneecsesestesaesesecsnsaneens 53 LEVEL DIAGRAM .........scscssssssesseseereeseeeeeseentieeetenss 74
TERMINAL FUNCTIONS ....0.....cscscccssessseesseesesteesees 60 SCHEMATIC DIAGRAM..........scssecsessceeeeesesseseeneeteaes 75
PC
BOARD
VIEW/SCHEMATIC
DIAGRAM
BLOCK
DIAGRAM
.0.......ssccsesssssseestsseeneeeeeeeeeeteneonsees
79
144
MHz
PLL
UNIT
(X58-3660-00)
(M,W)
...cececeees
63
TSU-6
(CTCSS
UNIT)...
..ccscscessessescneaeeeenceteeevensense
81
144
MHz
PLL
UNIT
(X58-3670-10)
(K,P)
..scecesceesees
64
SPECIFICATIONS.
........ssccscsseessseseeseesceeeneeees
Back
cover
430 MHz PLL UNIT (X58-3680-00) oo... eerste 65

TM-731A/E
CIRCUIT DESCRIPTION
Frequency Configuration
The TM-731A/E uses a synthesized PLL and includes a vari-
ablefrequency oscillator that enables selection of 5 kHz,
10 kHz, 12.5 kHz, 20 kHz, or 25 kHz channel steps. (See Fig.
1.)
Signals received in the 144 MHz band are down-converted to
a first intermediate frequency of 10.7 MHz (M,W) and
16.9 MHz (K,P) by mixing with the first local oscillator frequen-
cy (133.3 MHz to 135.3 MHz (W), 127 MHz to 131.100 MHz
(K,P), 133.3 MHz to 137.30 MHz (M)), and then to the se-
cond intermediate frequency of 455 kHz by mixing with the
second local oscillator frequency of 10.245 MHz (M,W) and
17.355 MHz (K,P).
Signals received in the 430 MHz band are down-converted to
the first intermediate frequency of 30.825 MHz (M,W) and
21.6 MHz (K,P) by mixing with the first local oscillator frequen-
cy (399.175 MHz to 409.175 MHz (M,W), 416.400 MHz to
428.400 MHz (K,P)), and then to the second intermediate fre-
quency of 455 kHz by mixing with the second local oscillator
frequency of 30.37 MHz (M,W) and 21.145 MHz (K,P). Dou-
ble conversion is thus used for both the 144 MHz and 430 MHz
bands.
The
transmitted
signal
for
both
bands
is
generated
direct
os-
cillation
and
direct
frequency
division
in
the
phaselocked
loop.
The
signal
is
amplified
by
a
linear
amplifier
before
being
ap-
plied
for
the
antenna.
Unit Model | TM-731A (K.M,P) | TM-731 (W)
Final Unit eee sotoot hy, | %45-3340-61
Control
Unit
One
as
a
X53-3250-61
430
MHz
TX-RX
Unit
00.71
ne
X57-3390-21
144
MHz
TX-RX
Unit]
SA
Min
|
X87-8400-61
|
Table
1
Comparison
of
TM-731A
and
TM-731E
CFW455F
144~ 147.995 MHz (K,M,P)
_144~145.995 MHz (W) = .
MCF 455 kHz
16.9 MHz {K,P)
ist MIX 10.7 MHz (M,W)
ANT
SW
RF
AMP
MIX,
IF,
DET
ca
-. | 10.245 MHz (M,W)
17.355 MHz (K,P}
127.1~ 131.095 MHz (K,M,P)}
133.3~ 137.295 MHz (M) ; ;
133.3~ 135.295 MHz (W) sp
144 MHz STEREO
BAND PLL AF AMP
PA
TX
AMP
SYSTEM
anaLocue
sw
|
|oo
144~
.
[oil
Lahey
JACK
145.998 MFZ (Wr ae in ee eel
4144~ 147.995 MHz (K,M,P} | MAIN
2-S
T {
a Ae
439. "995 MHz (M,W!
438349905 Mie KK, P) reha| SUB
PA
TX
AMP
430
MHz
.
BAND
PLL
MIC
AMP
438~ SYSTEM
449.995
MHz
(K,M,P)
399.175-
MIC
430~ 409.17 MHz (W)
439.995
MHz
(W)
416.400
~
428.395
MHz
(K,M.P)
MCF
21.6 MHz (K,P} CFW455F
30.825 MHz (MW) 455 kHz
ANT SW RF AMP MIX, IF,DET
Ist MIX = 0.370 MHz (MW)
1.145 MHz (K,P)
Fig. 1 Frequency Configuration

TM-731A/E
CIRCUIT DESCRIPTION
Receiver Circuits
* General
This
set
uses
seperate
receiver
circuits
for
the
144
MHz
and
430
MHz
bands.
These
circuits
extend
from
the
antenna
in-
put
section
to
the
IF
detector.
e 144 MHz
The incoming two meter band signal passes thru the trans-
mit/receive switching diode in the final unit. And then through
the antenna matching coil in the front unit. It is then amplified
by a GaAs FET radio-frequency amplifier, Filtered by a three-
stage bandpass filter that uses varicap tuning to reject unwant-
ed
signal
components,
and
is
fed
to
the
first
mixer.
There
it
is
mixed
with
the
first
local
oscillator
signal
from
the
PLL
to
generate
the
first
IF
signal
(10.7
MHz
(M,W),
16.9
MHz
(K,P)).
Spurious
adjacent-channel
signals
are
removed
in
a
two-stage
MCF (Monolithic Crystal Filter).
The first IF signal is amplified and fed to the FM IF IC:MC3361D.
This IF signal is mixed with the second local oscillator frequency
of 10.245 MHz (M,W) and 17.355 MHz (K,P} which results
in a second IF signal of 455 kHz.
Spurious adjacent-channel signals are removed from the se-
cond IF signal by ceramic filter. Then the signal is amplified
Fig. 2 144 MHz Front End [Varicap Tuning) PLL OUT
¢ 430 MHz band
The incoming 70 cm signal passes thru the transmit/receive
antenna switching diodes in the final unit and then passes
through the antenna matching coil. The signal is then fed to
a two-stage radio-frequency amplifier consisting of a GaAs FET
and a junction-type FET. It then passes through a two-stage
two-cauity helical resonator and enters the first mixer, where
it is mixed with the first local oscillator signal from the PLL to
generate the first IF signal (30.825 MHz (M,W), 21.6 MHz
(K,P)). Spurious adjacent-channel signals are removed by a
two-stage MCF. :
The first IF signal is amplified and fed to the FM IF IC
(MC3361D). This IF signal is mixed with a second local oscil-
lator frequency of 30.37 MHz (M,W) and 21.145 MHz (K,P)
|Loss ——- ==.
which
converts
it
to
a
second
IF
signal
of
455
kHz.
Spurious
adjacent-channel
signals
are
removed
from
the
se-
cond
IF
signal
by
an
ceramic
filter.
The
signal
is
then
amplified
and
detected
to
generate
the
audio
signal.
Item Specification
Nominal center frequency | 30.825 MHz
Pass bandwidth Max. +7.5 kHz at 3 dB
Attenuation
band
width
|
Max.
+28
kHz
at
40 dB
Ripple Max. 1.5 dB
Insertion loss Max. 3 dB
Guaranteed
attenuation
60
dB
or
greater
at
+1
MHz;
40
dB
or
greater
for
spurious
signal
Terminating. impedance 1.4 kQ/1_ pF
Table
2
MCF
(L71-0270-05)
Characteristics
(430
MHz
TX-RX
Unit
XF1)
(M,T,W)
item Rating
Nominal center frequency
(fo) 21.600 kHz
3 dB bandwidth +7.5 kHz or more
+25 kHz or less at 40 dB
+45 kHz or less at 60 dB
Attenuation bandwidth
Guaranteed
attenuation
70
dB
or
more
within
+
1
MHz
(Sprious
response
35
dB
or
more)
.
80
dB
or
more
within
+
(910
kHz
+20
kHz)
Ripple
1.0
dB
or
less
:
2.0.dB.orless . pene
Input and output im-
pedance 1 kQ/1 pF
Table 3 MCF (L71-0227-05)
(430 MHz TX-RX unit XF1) (K,P)
Item Specification
Nominal center frequency 455 kHz+1 kHz
6 dB bandwidth Min. +6 kHz (above 455 kHz)
50 dB bandwidth Min, +12,.5 kHz (above 455 kHz)
Ripple (455 +4 kHz) Max. 3 dB
Insertion loss . | Max. 6 dB
Guaranteed attenuation
(455 +100 kHz) Max, 35 dB
input-output matching 2.0 ka
impedance
Table 4 Ceramic Filter CFW455F (L72-0315-05)
Characteristics (430 MHz TX-RX Unit CF1,
144MHz TX-RX-Unit CF1)
item Rating
Nominal center frequency
{fo} 16.900 kHz
3 dB bandwidth +7.5 kHz or more
+25 kHz or less at 40 dB
+45 kHz or less at 60 dB
Attenuation bandwidth
Guaranteed
attenuation
70
dB
or
more
within
+1
MHz
(Sprious
response
40
dB
or
more)
80
dB
or
more
within
fo
—
{900~920
kHz)
Ripple 1.0 dB or less
Loss 1.5 dB or less
input and output im-
pedance 1.8 kQ/O pF
Table 5 MCF (L71-0279-05) Characteristics

— TM-731A/E
CIRCUIT DESCRIPTION
Item Specification
Nominal center frequency
(fo) 10.7 MHz
Pass bandwidth Max. fo +7.5 kHz at 3 dB
Attenuation bandwidth 1) Max. +25 kHz at 40 dB
2) Max, +45 kHz at 60 dB
Guaranteed attenuation {| 70 dB or more within +1 MHz
40 dB or more. spurious
80 dB or more within — 900 kHz to — 920 kHz
Ripple Max. 1. dB
Insertion loss Max. 1.5 dB
Terminating impedance 3 kQ/0 pF
Table 6 MCF (L71-0228-05) Characteristics
(144 MHz TX-RX Unit XF1)
© AF Unit
The path from the detector output to the AF power amplifier
input consists of two separate identical circuits for the main
band and the subband. The audio signal is first switched by
an analog switch into the AF preamplifier for its corresponding
band. After amplification, the signal level is adjusted by a two-
channel electronic volume control IC:M51523 which is con-
trolled by the MAIN VOLUME and BALANCE controls on the
front panel. An AF low-pass filter then removes unwanted high-
frequency components, Next the separate audio signals are
selected to speaker mixed or. separate mode by analogue switch
circuit which is amplified by the STEREO audio power amplifi-
er before being applied the speaker. (See Fig. 3.)
® Preamplifier For main
\F
detect
®
Squelch
amplifier
band
A. = LL
144M
:
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; LPF -
cam For main band’ % Fa] ar.
IF detect _. For'sub band -~ : ac} y
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t+}
=
:
wou | Let x L 2
MN4066BS’ M51523AL TC4053BE
® Prearmpiifier For sub
@ Squeich amplifier band
Fig. 3 AF Section
¢ Squelch Circuits
independent squelch circuits are provided for the main band
and subband. These circuits receive the output from the de-
tector, remove the 50 kHz noise component, amplify the sig-
nal with two transistor stages, and rectify it by means of a diode
to generate the squelch control signal. After DC amplification,
the control signal is used to switch the main and sub pream-
plifiers on and off.
¢ S Meter Circuits
Independent
S
meter
circuits
for
the
144
MHz
and
430
MHz
bands
receive
signals
from
the
455
kHz
ceramic
filter,
amplify
if
in
two-stage
meter
amplifier,
and
rectify
the
resulting
signal
to
generate
a
DC
voltage.
The
microprocessor
converts
the
ana-
log
DC
voltage
to
a
digital
output
that
is
used
to
drive
an
LCD
bar
meter.
cr
R33
DIO
reas Roe M2 [cpu
+ -* 91 33pin
PTHO1
I
P33.P30
Fig. 4 144 MHz S-meter circuit
¢ Switching of Balance Range
To
disable
the
BALANCE
control
in
the
single
mode,
the
con-
trol
voltage
range
of
the
BALANCE
contro!
is
switched.
This
switching
is
done
by
a
Low
signal
from
the
INH
(Inhibit)
pin
of
the
microprocessor
that
turns
on
transistor
Q7
in
the
single
mode.
Since
the
center
voltage
of
the
balance
control
resistor
is
held.to.approximately.4.V,
the
voltage.
at
the
BAL
pin
can-
not
exceed
4
V,
so
even
if
the
balance
VR
is
moved
to
the
SUB
position,
the
main
band
remains
unattenuated.
(See
Fig.
5
and
6.)
in dual band mode. "in single band mode
5 } MAIN
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;
a
Voltage at BAL pin (V) Voltage at BAL pin (V)
Fig. 5 Fig. 6
During
normal
operation,
the
two
electronic
volume
controllers
in
the
set
operate
using
the
M51523AL,
but
when
the
remote
control
unit
(RC-10)
is
connected
and
used
to
adjust
the
out-
put
level,
they
are
controlled
by
the
LC7532M.
When the remote control unit is connected, a High switch con-
trol
signal
is
sent
from
the
CE
pin
of
shift
register
IC4
to
force
the
attenuation
of
the
M51523AL
to
zero.
(Normally
the
CE
output
is
Low.)
The
UP
and
DOWN
signals
from
the
shift
register then vary the attenuation of the LC7532M. (See Fig. 7.)

TM-731A/E
CIRCUIT DESCRIPTION
TX-RX (430 MHz)
Unit X57-3390-XX
Control Unit
X53-3250-XX A/3
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variable
AF——5
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range
switching
|
In
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en
rane
en
et
el
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T
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(With
RC-10
connected)
LSS
|
;
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|
High
when
remote
control
unit
VR
is
ON
>
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|
;
|
Qs
Low
when
remote
control
unit
VR
is
OFF
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switching
Fig. 7 AF Volume Switching Diagram

TM-731A/E
CIRCUIT DESCRIPTION
¢ Muting Circuit
There are three types of audio muting:
MU1
:
Mutes
the
main band
momentarily
during
memory
scan
etc.
And
during
transmission.
MU2 : Mutes the subband when the CTCSS key is pressed.
MU3 : Operates when the MUTE key is pressed on the front
panel.
¢ Speaker selection
In the TM-731A/E, a selection between the separate and mix
modes is made depending upon the connection between the
speaker output and the external speaker. (Refer to Table 6-1.)
When the separate mode is engaged, an attenuator is insert-
ed for level adjustment. (Refer to Figure 8-1.)
16
MAIN AF
co
+
yo
t3
pin
95
Mutes
audio
output
dur-
ing momentary memory
on
scan
during
transmission
en
sue AF
Ic , AOM
3pin
3
Ql3
2
©
———----_—|-——0
Aos
ie) & Tt
_ | & SHIFT
£
+:
REGISTER
82°
om
MUTE
C3
Qs MUI
Mu2
MUS
7 (e)
SUB BAND [Sus BAND MUTE Active
2048
MUTE
/
High
/ Mutes subband Microprocessor
Operates when MUTE wher CTCSS data
control is pressed
on front panel
Fig. 8 Mute Circuit
p———_—«—Main AF signal + buzzer
+
t
Bc oa i |
oo R53
A eSure Sub AF signal
a © a :
« c3
. TC4053BF MAIN output to pin 1 of IC4
* only in separate mode
CN4 o
MSS
L—_____»
Figure 8-1 Speaker separate circuit °
When
the
speaker
jacks
are
connected
into
the
MAIN
termi-
nal,.the.
MSS
terminal
becomes.open.and
the
pins
10
and.11_
of
IC3
become
‘‘H’'
so
that
AF
signals
are
each
input
to
the
audio
amplifier
(IC4)
at
they
stand
separate.
While
when
the
speaker
jacks
are
not
connected
into
the
MAIN
terminal,
the
MSS
terminal
is
grounded,
the
pins
10
and
11
of
IC3
become
“1”
and
R53
is
shorted
for
level
adjustment
so
that
AF
sig-
nals
are
mixed
together
into
only the
pin
13
of
IC4.
MAIN/SUB output to pin 14 of IC4 in mix mode
- SUB output in separate mode
Connected only to (Connected to both
Without extemal | Connected only MAIN "SUB. MAIN and
AF
speaker
to
MAIN
terminal
.
MAIN/SUB
;
terminal
.
signal terminals
. External speaker
Main
internal
speaker
External
speaker
|
External
speaker
{connected
to
MAIN
terminal
External speaker
Sub Internal speaker internal: speaker | External speaker connected to
IMAIN/SUB terminal
Mix Separate Mix Separate
Table 6-1 Correspondence in connection between
speaker output and external speaker

TM-731A/E
CIRCUIT
DESCRIPTION
Transmitter
Circuits
*
Modulation
Circuit
:
The
audio
signal
from
the
microphone
is
fed
to
three
opera-
tional
amplifiers
which
perform
preemphasis,
amplification,
and
limiting,
and
form
a
splatter
filter
that
removes
unwanted
high-
frequency
components.
The
modulation
circuit
directly
modulates
the
VCO
(Voltage
control
oscillator)
for
the
144
MHz
and
430
MHz
bands
by
us-
© General
Except
for
the
microphone
amplifier
and
APC
{Automatic
Power
Control)
circuits,
the
transmitting
circuits
are
independent.
MIC
AMP
(X59-3610-
00)
ing
a
varicap.
(See
Fig.
9.)
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| 430 MDI aay nue TX-RX UNIT
*
Preamplifier
Stage
Circuit
;
.
©
Power
Amplifier
Circuit
A
three-stage
linear
amplifier
is
used
in
both
the
144
MHz
and
The
drive
signal
is
fed
to
the
power
modules
and
amplified
to
430
MHz
bands.
Due
to
its
wideband
design,
this
linear
am-
the
required
levels.
It
then
passes
through
the
TX/RX
switching
plifier
provides
stable
drive
output
without
adjustment.
diode
and
a
filter
and
is
transmitted
via
the
antenna.
. Rating
Item
Symbol
|
Tc
(°C)
|
Unit
Conditions
5
:
_
;
S-AV17
:
M57788M
Operating
voltage
Vee
25
i
V
16
°
17
Current
consumption
lec
25
A
14
14
Input
power
Pin
25
Ww
Zo
=Z_.=50
0
0.6
0.6
(Vcc12
13.8
V)
Output
power
Po
25
WwW
Zo=Z.=50
0
65
55
.
‘Operating
case
tem=
“To
(op)
|
.
oe
~
“pose
.
“362371607
menses
osensann
soar
ges
papain
perature
Storage
temperature
Tstg
ae
:
—40~
+110
-40~+110
Table 7 Maximum Ratings of Power Modules
* APC and SWR (Standing Wave Retio) Protection Circuits
The
APC
(automatic
transmit
output
control)
circuit
and
pro-
ching
at
the
CM
(Capacitance
Matching)
coupler,
detects
it,
tection
circuit
have
independent
detectors
in
both
bands.
The
and
feeds
the
result
to
the
hybrid
IC.
contro!
circuit
is
a
common
hybrid
IC.
The
hybrid
IC
controls
the
power
transistor
Q5
:
2SD1406
(Y)
The
APC
detects
the
output
from
the
power
module
and
feeds
in
the
drive
stage,
controls
the
drive
transistor
and
the
second
the
result
to
the
hybrid
IC.
The
SWR
protection
circuit
extracts
pin
of
the
power
module,
and
thus
varies
the
transmitter
output.
a portion of the reflected wave generated by antenna mismat-

TM-731A/E
CIRCUIT DESCRIPTION
Power amplifier
144 MHz Final Unit
PLL Synthesizer
Fig.
12
is
a
block
diagram
of
the
PLL and
VCO
sections
of
the
144
MHz
and.430
MHz
circuits.
A
feature
of
the
PLL
system
in
the
TM-721A/E
is
that
there
are
independent
subunits
for
the
144
MHz
and
430
MHz
bands,
each
consisting
of
an
up-
per
VCO
section
and
a
lower
PLL
section.
Both
sections
are
enclosed
in
a
sturdy
case
that
shields
them
from
external
signals.
To
provide
6
kHz,
10
kHz,
12.5
kHz,
20
kHz,
and
25
kHz
steps,
the
12.8
MHz
frequency
of
the
reference
oscillator
in
both
the
144
MHz
and
430
MHz
bands
is
divided
by
2048
and
2056
according
to
the
step
count
to
yield
frequencies
of
6.25
kHz
and
5
kHz.
Each
VCO
oscillates
directly
at
the
tar-
get
frequency.
After
single-stage
amplification,
the
frequency
is
applied
to
a
pulse-swaliow
PLL
IC
which
divides
it,
performs
phase
comparison,
and
locks:
the
frequency.
The
PLL
system
for
the
144
MHz
band
locks
without
switching
between
TX
and
RX.
The
lock-up
time
of
the
PLL
is
shortened
by
using
pin
10
of
the
PLL
IC
(M54959FP),
which
is
Low
in
TX,
to
turn
off
the
low-pass
filter
Q1
and
Q2
in
Fig.
13,
only
at
the
instant
when
the
set
is
switched
to
TX,
thus
shortening.
The
time
it
takes
the
transmitter
to lock.
The
PLL
system
for
the
430
MHz
band
locks
on
a
single
VCO,
with
band
switching
for
TX
and
RX
performed
inside
the
VCO.
TX-RX (430) Unit
(X57-3390-XX)
© 8T2 (Transmit 8V) and Uniock Circuit
Dueing
receive,
0.7
V
desional
is
applied
to
the
base
of
O09
which
turns
Q9
on,
Q8
off,
and
Q11
off,
so
no
voltage
is
out-
put
at
the
collector
(8T2)
(TX
+8
V)
of
Q11.
When
the
PTT
(Push-to
Talk}
switch
is
depressed,
serial
data
is
sent
from
the
microprocessor
to
IC1
(the
phase-locked
loop)
causing
pin
10
of
IC1
to
go
Low.
This
switches
Q9
off,
Q8
on,
and
Q11/on,
so
that
8
V
is
applied
to
8T2.
(In
transmission,
8
V
is
applied
to
8T2
from
8C.)
Ov
(8:0V)-
——
_
-
icuosomuiametens
eesiatecosisie
ss
=
*(OV)
Qu t2SBINI9S
BT2
f
\—-4
ac
85
aee Subunit,
IC1 pin 10 (TR2)
‘
8.0V
(ov)
%(8.0V)
\
Subunit,
ov
iC1
pin
14
(TR2)
epOTV)
*
When
uniocked
Fig. 11 8T2 (Transmit 8 V) and Transmit Unlock Circuits

CIRCUIT DESCRIPTION
TM-731A/E
MDI
as
tend
Sel
——Me
eee
ee
eee
esl
r-----
_
X57-3390°XX_
ee
|
Ppa]
|=
X88
25680-0_
s|
|
it
tt
qt
PLL
LPF
F.CONT
MOD
purr
|
|
|
Id
ic
|
|
|
21,02,
03
|
DIO!,O102
|_|
DIOS
‘aon
t
4
|
! | | [Msagsorp [~|2scaszay{ y | |it33c isvieE4 . ry
1 | 1 ly
i
|
|
{
{
FLR/LT
SW
|
1
i
I
4
|
05,
06
I
I
I
4
it
Ly
ISV128
"
|
1
|
tt
|
430~
‘
|
|
|
439.995
MHz
(M,W)
|
t
I
|
438
~
449.995
MHz
(K)
(P)
l
399.175~
1
|
I
i
309.17
MHz
(MW)
H
|
t
(B/2)
J
416,400~
428.395
MHz
(K)
(P}
!
ee
SI
TITIIIIIIIT-
OUT!
Ll
Le
ee
a
nan
ee
ee
ee
~
gure
p>
~~
ee
He
TO
re
1
Ene
neeneeneeienieiee
|
potted}
PY
pu
LPF
y
!
F.CONT
RXVCO
BUFF
4
1
|
IC
|
Q1,2
94
1
|
DIO1,D1I02
1
-
>.
||
M54959FP
2Sc3324(8)}
|
fy
|
iTs38c
'
1b
ZN
sw
sw
tt
{
I
Q5 |
1
|
DTCI44EK
1
[LJ
D103,0104
1]
t
|
|
ISV
166
DIS
|
AMP
|
MOD
1
1
|
|
DICI4EK
ISV268
|
Txvco suff If |
=
I
|
j
7
ty
144~
147.995
Miz
(KM)
(P)
ia
A
LA
[145.995
Me
.
Muz
|
:
be
ie
X58
5860-0
Tx
SO
Size)
133.32
136.998
MEE
(MWh
l K. Le
— MO(XS7-3610-00)
Fig. 12 PLL and VCO Block Diagram
fe oa P/N: -Lock~
~——
-——
-
—
-
—
-
—
-
—
-
—
-—
-
-
-~Q—-
—-}
i]
X= IN @8) osc |} —+{ 478 piv. F} 4 Ref. freq. divider | :
X-OUT
@)
oe
est
L
-
1
+4
Veo
FIN
2.
Modulus
VA
divider
Ref.
freq,
|
fR
PD
.
IN
prescalor
b
(binary
7
bit!
select
det.
t
VREF
:
(1/128,
1/129)
_ if
|
B)
PD
t
(/N
Programmable
divider
fin/
N
(Binary 10 bit) '
|
$2
$10
r?
1
|
21
bit
data
latch
6
cee
sw
421 > @) sw2
s1
>|
21
bit
shift
register
|
@)
Vee
aPS
G
ol
21
puso
counter
|
Latch
signal
@®
GND
1 pluse counter
RST
Fig. 13 M54959 Pulse Swallow Control Circuit

TM-731A/E
CIRCUIT DESCRIPTION
The
unlock
circuit
operates
only
in
the
transmitter
circuit.
A
description
of
the
430
MHz
unlock
circuit
follows.
Q10
is
the
PLL
unlock
switching
transistor.
Normally
the
base
of
Q10
is
Low
(0
V)
and
the
collector
of
Q10
is
High
(8
V).
When
the
PLL
unlocks
0.7
V
dc
is
applied
to
the
base
of
Q10,
Turning
Q10
on
forcing
the
collector
to
0
V
(Low).
This
swit-
ches
O8
off.
When
the
PLL
unlocks
(during
transmission),
the
collector
of
Q8
goes
to
8
V
(instead
of
the
normal
0
V)
and
Q11
turns
off.
Therefore
the
8T
switching
transistor
Q11
turns
off
and
the
transmit
bias
voltage
goes
dead.
This
prevents
trans-
mitter
output
when
the
PLL
is
unlocked.
© 8R (Receive 8 V) Stop Circuit
In
receiving,
the
base
of
Q13
receives
an
5
V
dcsignal
that
turns
Q13
on
{so
the
collector
of
O13
goes
to
O
V).
O12
then
turns
on
and
provides
8
V
at
its
collector.
(In
receiving,
8
V
is
sup-
plied
from
8C
(Common
+8
V)
to
8R.)
During
transmit,
serial
data
from
the
microprocessor
is
pass-
ed
thru
shift
register
IC4.
The
output
from
IC4
at
pin
11
goes
Low.
Q13
therefore
turns
off
(its
collector
voltage
going
to
8
V),
Q12
turns
off,
and
no
8R
output
is
provided
from
the
collector
of
Q12.,
The
PLL
1C
(M54959FP)
can
be
controlled
for
its
two
refer-
ence
division
ratios
and
single
comparison
division
ratio.
in
the
144
MHz
band,
the
relation
ship
between
Fvcot
and
the
division
ratios
is:
Fvcor.
=
(144—10.7)
=
{(n1x128)
+
Al}
x
Fosc
+
R
Fvco1 : Output frequency of 144 MHz-band VCO
ni
:
Value
to
which
binary
10-bit
programmable
counter
is set
Al
:
Value
to
which
binary
7-bit
programmable
counter
is
set
Fosc «° Reference oscillator frequency, 12.8 MHz
R
':
Value
to
which
binary
14-bit
programmable
counter
is
set
R = 2560 for 5kHz, 10 kHz, 20 kHz, and
25 kHz steps
R = 2048 for 12.5 kHz steps
ff
n1=208,
A1=36,
then
with
5
kHz,
10
kHz,
20
kHz,
or
25 kHz steps:
Fvcoi = {(208 x 128) + 36} x 12800 + 2560
= (26624 + 36)x5
= 133300 = 133.3 MHz
In
the
430
MHz
band
the
relation
between
Fvco2
(RX)
and
the
division
ratios
is:
Fyco2
=
(430
—
30.825)
=
{(n2
x
128)
+
A2}
x
Fosc
+R
The
pulse-swallow
PLL
circuit
is
contained
on
a
single
chip
and
consists
of
a
built-in
dual-modulus
(1/128
and
1/129)
prescaler.
The
switch
function
(pin
10)
of
the
PLL
IC
controls
the
8T1
|
(TX
+8
V
(430
MHz))
and
8T2
(TX
+8
V
(144
MHz))
lines.
“8c
al2
. . BR
Shift register, x
1C4 pin 11 2 > av
2 ¥ (OV)
wo Ko
= co ag
™ << ov
(8Vv)
Bc
C96 1 I6V
Fig. 14 8R Stop Circuit
Fvco2:Output
frequency
of
430
MHz-band
VCO
R
and
Fosc:
Same
step
frequencies
as
in
the
144
MHz
band
in
this
case
n2=623
and
A2=91,
so:
Fvco2
=
{
(623
x
128)
+
91}
X
12800
+
2560
=(79744491)x5
=
399175
=399.175
MHz