Kenwood TR-751A User manual

144MHz ALL MODE TRANSCEIVER
_TR-751A/E
|
TRIO-KENWOOD CORPORATIC
.
SERVICE
MANUAL
|
| ©1986-5 PRINTED IN JAPAN
BS51-2084-00(0)1501
Photo is TR-751A.

TR-751A/E
CIRCUIT DESCRIPTION
MODEL
UNIT
TR-751A (K, M1, M2)
TR-751E (W, T)
FINAL UNIT
X45-1490-11
X45-1490-11
CONTROL UNIT
X53-1460-11 (K, M1)
X53-1460-21 (M2)
X53-1460-51 (T)
-_X53-1460-61 (W)
COMPOSITE UNIT
X60-1310-11
X60-1310-
(PLL,
TX)
3
00:5319;0)
COMPOSITE
UNIT
a
X60-1320-11
X60-1320-00
|
Table 1 TR-751A/E PC board chort
FREQUENCY CONFIGURATION
The TR-751A/E utilizes a PLL synthesizer system in-
corporating
a
digital
VFO,
which
covers
each
band
in
50Hz steps. (See Fig. 1.)
Received
signals
are
mixed
with
the
first
local
oscillator
(133.305
to
137.295MHz)
to
produce
the
first
intermediate
frequency
of
10.695MHz.
In
SSB
or
CW,
the
receiver
operates
as
a
single
conversion
system.
The
10.695MHz
IF
signal
is
applied
to
crystal
filter
XF1
(L71-0249-05),
and
the
signal
is
then
applied
to
the
ring
detector
to
obtain
the
audio
output.
In
FM,
the
receiver
operates
as
a
double
conversion
system.
The
10.695MHz
signal
is
mixed
with
the
PLL
re-
ference
frequency
of
10.24MHz
to
produce
the
second
intermediate
frequency
of
455kHz.
The
transmitter
system
operates
as
a
double
conversion
system.
In
SSB
mode,
output
from
the
carrier
oscillator
is
modulated
by
a
balanced
modulator
to
produce
an
inter-
mediate
frequency
signal,
which
is
then
mixed
with
the
first
local
oscillator
signal
to
produce
the
two
meter
transmit
signal.
The
carrier
oscillator
circuit
is
controlled
by
the
microprocessor
according
to
the
selected
mode.
During
USB
or
CW
receive,
the
carrier
oscillator
fre-
quency
is
10.6935MHz.
During
LSB
receive,
it
is
10.6965
MHz.
During
CW
transmit,
it is
10.6943MHz.
In
FM,
a
455kHz
10.695MHz
crystal
oscillator
frequency
is
used
that
is
directly
modulated
and
then
mixed
with
the
first
local
oscillator
signal.
To
minimize
internal
heterodyne
tones
and
spurs
in
the
frequency
generator
and
analysis
are
controlled
by
a
microprocessor.
The
PLL-based
frequency
system
consists
of
two
PLL
synthesizer
loops
controlled
by
a
4-bit
high-
speed
microprocessor
and
a
stable,
analog
RIT
oscillator
circuit.
Item
Nominal frequency
10.695MHz_
Within 2200Hz at 6d8_
|'2.2kH2 or more at 6d8
| Witt +1.5kHz at 20dB
Within #2.4kHz at 608
Allowable center freq’ deviation
Pass bandwidth and
attenuation bandwidth
(based on minimum loss).
Ripple 7 248 or less
Minimum loss | SdB or less
Guaranteed
attenuation
4
60dB
or
more
within
t40kHz
1/0
terminating
impedance
1.2k225%/60F
25%
Table
2
Crystal
filter
10F2.2S
(L71-0249-05)
characteristics
(Composit unit (RX) XF1)
5 : 2sc2714(¥)
MIXER
Qn
1as0~te6
ome
10.6935MHz
10.6965MHz
L PLL SYSTEM ] 10.24Mtz
é T oWax : 10.c035mHe
"AR
OSC
;
iz
l CW-TX = 10.69¢3MH2 J
133.305~137.295MHz
10.695MHz
XF (RX, TX common)
10.695MHz rl
+
| MIXER
Fig. 1 Frequency configuration

RECEIVER SYSTEM
© General
Incoming
signals
from
the
antenna
pass
through
a
low-
Pass
filter
in
the
Transmitter
Final
unit
and
a
diode
switch
(D5,D6)
for
transmit/receive
selection.
The
signals
then
go
through
two
antenna
coils
(L201
and
L202)
and
then
are
amplified
by
a
GaAs
FET
(Q201).
Undesired
signals
are
removed
from
the
RF
signal
by
a
3-pole
helical
resonator
(L203)
and
the
resulting
signal
is
then
applied
to
the
first
mixer
(Q202).
The
signal
is
mixed
there
with
the
first
local
oscillator
signal
from
the
PLL
system
to
produce
the
first
IF
signal
of
10.695MHz.
Undesiable
adjacent
channel
signals
are
removed
from
the
first
IF
signal
by
a
two
stage
monolithic
crystal
filter
(MCF
:
XF201).
The
first
IF
signal
is
then
distributed
to
either
the
SSB
2 @
or FM circuits.
@
In
the
SSB
circuit,
the
first
IF
signal
goes
through
noise
blanker
gate
(D1
and
D2)
then
amplified
by
a
Dual
Gate
MOS
FET
(Q1)
and
then
applied
to
the
SSB
crystal
filter
(XF1).
The
filtered
signal
is
then
amplified
by
the
Ist
IF
Amplifier
(Q2)
and
the
2nd
IF
Amplifier
(Q3)
and
then
applied
to
the
ring
detector
(D5—D8)
to
obtain
the
recei-
ved audio signal.
In
the
FM
circuit,
the
first
IF
signal
is
amplified
bya
~
Grounded
Gate
(Q4)
J-FET
and
applied
to
the
second
é€
mixer
(Q5).
The
IF
signal
is
mixed
with
10.24MHz
to
pro-
duce
the
second
IF
signal
of
455kHz.
Adjacent
channel
~
_
interference
is
removed
from
the
second
IF
signals
by
FM
ceramic
filter
(CF1),
the
second
IF
signal
is
then
amplified
and
detected
by
IC2
to
obtain
the
received
audio
signal.
The
audio
signal
from
the
SSB
and
FM
circuits
is
then
amplified
by
a
common
audio
preamplifier
Q1
(X59-
1110-00).
High-frequency
components
are
removed
from
the
audio
signal
by
an
active
LPF
(Q2).
The
audio
signal
is
then
applied
to
the
audio
volume
control
on
the
front
6
Panel.
The
audio
signal
is
amplified
again
by
audio
amplifier
1C1
(X60-1310-XX)
and
then
applied
to
the
speaker.
Item
|
Rating
Nominal
center
frequency
(fo)
|10.695MHz
Pass
bat
width
_
‘a
___|
Within
£7.5kHz
at
348
Within *25kHz at 4008
Within 245kHz at 6008
Attenuation bandwidth
40d8 or more spurious
| at fo~fo + SOO0kHz
| 80d8 or more spurious at
_ | fo—(9102 10kHz)
Ripple
|
1.008
or
less
[inser
ion
loss
1.5dB
or
less
Guaranteed attenuation
70d8 or more within + 1MHz
| 3k2/00F
€ = _ [Terminating impedance
Table
3
10.695MHz
MCF
(L71-0216-05)
characteristics
(Composit
unit
(RX)
XF201)
TR-751A/E
CIRCUIT
DESCRIPTION
Item
|
Rating
Nominal
center
frequency
_|
455kHz#
1kHz
-
6dB
bandwidth
26kHz
(from
455kHz)
50dB
bandwidth
__|
Within
£12.5kHz
(from
455kH2)|
Ripple
(within
24kHz
from
455kH2)
_
|
948
oF
less
[iosertion
loss
—
68
or
less
_
Guaranteed
attenuation
(within
#100kHz
from
455kH2) |
9548
oF
less
|20ka
Lv matching impedance
Table
4
Ceramic
filter
CFW
455F
(L71-0315-05)
characteristics
(Composite
unit
(RX)
CF1)
© Front end and AGC circuit
The
performance
of
any
receiver
is
determined
largely
by
the
performance
of
its
front
end
section.
Important
factors
which
determine
the
performance
of
a
receiver
are
sensitivity
and
two
signal
characteristics.
Recently,
most
single
mode
receivers
have
used
GaAs
FETs
to
improve
their
sensitivity,
while
all-mode
receivers
used
Dual
Gate
MOS
FETs
for
improved
AGC
characteristics
and
RF
gain
control
of
their
high
frequency
amplifiers.
This
was
because,
even
though
the
AGC
line
was
placed
between
the
high
frequency
amplifier
and
intermediate
frequency
ampli-
fier,
the
best
way
to
improve
the
AGC
characteristic
had
been
to
control
the
second
gate
of
the
dual-gate
MOS
FET.
When
GaAs
FET’s
were
used,
such
AGC
characteris-
tics
had
not
been
obtained
even
if
the
second
gate
was
controlled
by
the
same
voltage
that
was
used
for
a
Dual
Gate
MOS
FET.
Fig.
2
shows
the
AGC
Vs.
gain
attenuation
Characteristics
obtained
from
the
high
frequency
amplifier
(MOS
FET
:
3SK76)
and
GaAs
FET
:
3SK129
used
ina
TR-9000G.
Since
the
intermediate
frequency
amplifier
uses
a
MOS
FET
:
3SK73,
almost
no
attenuation
occurs
in
the
high
frequency
amplifier
even
if
the
AGC
voltage
is
fed
directly
into
the
GaAs
FET.
RF AMP GAIN
OdB when G2 voltage is 4V
G2 Voltage (Vv)
————- 3SK76 MOSFET
————— 35K 129 GoAsFET
Fig.
2
AGC
attenuation
comparison
3

TR-751A/E
CIRCUIT DESCRIPTION
The TR-751A/E AGC circuit has been designed to allow
the AGC voltage to control the GaAs FET similar to the
control that was obtained with the MOS FET. As shown
in Fig. 3, AGC voltage from an amplifier similar to that
used in previous models is fed into the intermediate fre-
quency amplifier. The AGC voltage is approx. 4V when no
signal is present. The AGC voltage is amplified by the
non-DC current inversion amplifier circuit that is com-
posed of Op Amplifier (1C3). Its output is then applied to
the GaAs FET. The output voltage is set to approx. 2.5V
when no signal is present, or at minimum RF gain. The
AGC characteristics are shown in Fig. 4. The AGC time
constant is automatically switched to slow in SSB mode
or to fast in CW mode. The high sensitivity of the receiver
system is thus obtained without sacrificing any two signal
characteristic.
Additionally, the RF gain control, provides a convenient
method of tuning out undesired signals even when receiving
signals that are too strong from near by local stations.
AGC
BUFFER OErELTOR
VF
AGC TIME CONSTANT
AGC AMP SWITCHING CIRCUIT
RF AMP GAIN
wav.
0d8 when G2 volta
G2 Voltage (v)
Fig. 4 AGC attenuation comparison
RF AMP AGC
VOLTAGE SHIFT CIRCUIT
VF VF
IF AMP AGC
1 r 71
0 +8V
THRESHOLO.
LEVEL AO. 3
2,03
3SK73 c20
SSB IF AMP O—=—| |
To
O RF AMP AGC LINE
NON-DC CURRENT
INVERSION AM
1C3 : NIMASSBC
g RF GAIN
CONTROL
fo)
Sse SOL TIME CONSTANT SWITCHING
Fig. 3 AGC circuit black diagram
©@ SSB squelch circuit
The TR-751A/E SSB suqlech circuit is a noise operated
type squelch. As compared with signal type squelch,
noise detection squelch may be opened even by very weak
signals, such as are frequently encountered in SSB.
The high sensitivity of the squelch circuit provides
advantages
when
receiving
VHF
signals
from
distant
sta-
tions
and
when
scanning.
Generally,
signal
type
squelch
cannot surpass noise detection type in sensitivity, since
they
are
opened
by
changes
in
the
AGC
voltage.
It
means
that, to open a signal type squelch, sufficient voltage level
of signal to deflect the $ meter is required. The sensitivity
of
the
TR-751A/E
squelch
is
0.14V
or
less
(a
weak
signal
which will not deflect the S meter.)
The squelch signal is applied to 1C2 used in FM mode,
through the SSB filter, SSB IF, and buffer amplifier. This
IC, mixes the signal with 10.24MHz to produce 455kHz.
Like the FM IF, the 455kHz signal is also amplified by 1C2
and applied to the same squelch circuit as that used in FM
mode. Since SSB signals do not contain carrier, unlike FM
signals, the time constant circuit is switched between FM
mode and SSB mode to get an appropriate response time.

TR-751A/E
CIRCUIT DESCRIPTION
TRANSMITTER SYSTEM
© General
The transmitter system operates as a single conversion
system,
Audio signals from the microphone are amplified by a
low-noise transistor (Q25) and applied to the SSB or FM
circuits which provide approx. 26dB gain
In SSB, the amplified signal passes through the SSB
microphone gain control, and is amplified by (Q27) and
applied to the balanced modulator (IC4). The balanced
modulator consists of an IC that provides stable carrier
suppression without being influenced by changes in tem-
perature. Signals from the microphone amplifier are mixed
with the carrier to produce a DSB signal. The DSB signal is
applied to the SSB filter (with a center frequency of
10.695MHz) to produce the SSB signal.
In FM, the signal amplified by the SSB/FM common micro-
phone amplifier (Q25) is applied through the buffer ampli-
fier (Q24) and FM microphone gain control, and then to
the pre-emphasis circuit, amplified by (1C1), and limited by
Op amplifier (1C1). High frequency components are then
removed from the signal by a 18dB/oct splatter filter,
and the signal is sent to the FM modulation circuit.
In the FM modulation circuit, signals from the 10.695
MHz crystal oscillator circuit are directly modulated by
varactor diode (D21), variable capacitor. This direct fre-
quency modulation enables a flat transmitter frequency
response to be obtained from low frequencies to high
frequencies. If the frequency deviation becomes excessive,
the deviation level will vary from the upper to the lower
portion of the signal. The TR-751A/E is designed so that
the upper and lower portions of the signal are balanced
even with maximum frequency deviation.
SSB/FM switching is performed by diode switching cir-
cuit
according
to
the
selected
mode,
and
then
amplified
by the transmitter IF circuit. This IF amplifier circuit con-
sists
of
a
dual-gate
MOS
FET,
whose
second
gate
is
pro-
vided
with
ALC
voltage
to
control
the
transmitter
output.
The
transmitter
IF
signal
is
then
mixed
with
the
PLL
signal
by
balanced
mixer
consisting
of
two
FETs
(Q1,
Q2)
to
produce
a
144MHz
signal.
Undesirable
components
are
removed
from
the
signal
by
a
band-pass
filter
to
mini-
mize
spurious
emission.
The
signal
from
the
band-pass
filter
is
then
amplified
twice,
once
by
a
dual-gate
MOS
FET
(Q3)
and
once
by
transistor
(Q4),
to
raise
the
signal
to
the
level
necessary
to
drive
the
Final
unit.
The
TR-751A/E
contains
an
additional
transistor
amplifier
(Q5)
The
signal
from
the
drive
circuit
is
amplified
by
the
power
module
(Q1)
in
the
Final
unit,
and
goes
through
the
ANT
switching
and
diodes
(D5,
D6)
and
low-pass
filter
to
remove
higher
harmonics,
and
is
supplied
to
the
antenna
© CW circuit description
In CW, the balanced modulator is unbalanced by AGC
signal to allow the carrier to pass.
CW keying is performed by switching the balanced
mixer in the drive circuit and a bias voltage is applied to the
first gate of amplifier. Fig. 5 shows the keying waveform.
The leading and trailing edges are smoothed to prevent key
clicks.
To facilitate CW communications, the CW circuit con-
tains CW semi break-in and side tone circuits.
The CW semi break-in circuit is a Schmitt circuit consist-
ing of transistors (Q1—Q4) or the break-in sub assembly.
The delay time can be adjusted with VR7.
The side tone circuit operates whenever the key is
closed. The side tone circuit operates in modes other than
CW, so key adjustment and morse code practice can be
performed. Transistor (Q9) is used as the oscillator. Signals
from the side tone circuit are amplified by the audio amp-
lifier (1C1). The output frequency of approx. 800Hz
can be adjusted with potentiometer (VR4).
TT TM,
ai I
cell
iii |
|
ee LUTATNE EUUGUGLOGEUOCE!:SUEEUEE ALUTUNUELLETUONNL LY
| |--smeee
Fig. 5 CW waveform

TR-751A/E
CIRCUIT DESCRIPTION
@ ALC and SWR protection circuits
Fig.
6
shows
the
basic
ALC
and
SWR
protection
circuits.
The
SWR
protection
circuit
detects
and
amplifies
any
ALC
detection
is
made
by
amplifying
a
sample
from
the
reflected
power
due
to
mismatching
in
the
antenna
with
a
Power
module
in
the
Final
unit..
The
DC
output
signal
is
CM
coupler.
Output
from
the
SWR
protection
Circuit
amplified
by
transistor
(Q7)
lower
the
ALC
which
controls
lowers
the
ALC
reference
voltage
to
reduce
the
gain
of
the
the
gain
of
the
IF
amplifiers.
Low
power
is
selected
by
power
module
for
protection.
controling
the
ALC
Amplifier
(Q7)
with
transistor
(Q8)
If
the
linearity
of
the
Final
is
not
well
balanced
with
ALC
feedback,
SSB
distortion
may
occur.
The
TR-751A/E
is
designed
to
minimize
SSB
distortion.
—
a
FINAL
UNIT
(X45-1490-11)
TE IE
AME
|
ALC
DETECTOR
SWR
PROTECTION
DETECTION
f
1
fi
. ,
024:3SK73(GR)
|
91
:ms7727
= eee
COMPOSITE UNIT (X60-1310-XX)
LOW POWER SW
Low
POWER
SWITCHING
‘ALC
AMP,
PROTECTION
AMP
Fig. 6 ALC and SWR protectioncircuits

PLL SYNTHESIZER
Fig. 7 is the PLL system block diagram,
nd
The
most
important
feature
of
the
TR-751A/E
PLL
system
is
that
it
the
main
loop
VCO
(Loop
A)
is
composed
of
a
sub-unit
to
avoid
the
unit
being
influenced
by
outside
forces
(especially vibration),
which
improve
the
frequency
stability.
During
mobile
operation
in
SSB
or
CW,
this
Provides
a
great
increase
advantage
in
reliability.
The
PLL
system
uses
two
loops
to
form
a
digital
VFO
which
covers
each
band
in
50Hz
steps.
Each
of
the
loops
uses
a
PLL
IC
(TC9172P)
with
pulse
swallow
type
pre-
scaler.
The
B
loop
utilizes
a
2.5kHz
comparison
frequency.
The
range
of
its
VCO
output
fregency
is
from
28
to
27MHz
(frequency
division
ratio
11200
to
10800
:
1).
The
B
loop
VCO
output
is
frequency
divided
by
50
(to
produce
©
560
to
540kHz).
which
is
used
to
produce
a
signal
that
covers
20kHz
from
9.68
to
9.70MHz
in
5OHz
steps.
This
signal
is
then
mixed
with
the
reference
oscillator
frequency
of
10.24MHz.
UNLOCK Sw
6 a7
TR-751A/E
CIRCUIT DESCRIPTION
The
RIT
oscillator
circuit
utilizes
a
signal
of
11.805MHz
which
is
multipled
by
nine.
The
oscillator
frequency
range
can
be
varied
+1.2kHz
or
more
by
varying
the
voltage
of
the
variable
capacitor
in
the
oscillator
(analog
control).
When
the
RIT
switch
is
off,
the
variable
capacitor
voltage
is
fixed,
because
of
high
resistance,
and
the
RIT
oscillator
operates
as
a
stable
local
frequency
oscillator.
The RIT
ON
signal
is
detected
by
the
microprocessor
and
transferred
to
the
PLL
IC
containing
which
contains
an
I/O
port
to
control
the
RIT
switching
circuit.
The
RIT
oscillator
out-
Put
is
mixed
with
9.68
to
9.70MHz
to
produce
a
frequency
fange
from
115.925
to
115.945MHz
for
A
loop
mixing.
The
A
loop
uses
a
20kHz
comparison
frequency
to
control
loop
A
over
a
range
of
IF
17.38
to
19.37MHz
to
yield
a
VCO
output
range
frequency
from
133.305
to
137.305MHz
(frequency
division
ratio
869
to
1069
:
1).
To
cover
the
entire
band
in
50Hz
steps,
the
VCO
output
is
mixed
with
local
oscillator
signals
of
115.925
to
115.945
MHz.
As
described
above,
the
PLL
system
reliability
is
im-
Proved
by
incorporating
the
VCO
A
loop
asa
sub-unit
and
high
density
system
by
using
large
scale
integration.
fea TATBIO"
raw | 10. 20mne 5
b——4 ozenne A
~stoune
tan 10685
fet (133.305 ~137308 139.3065 ~137.3085 139.0:
NA _ 865-1088
7
NB
1120-10890
=
=
_
t
Fig.
7
PLLsystem
block
diagram

TR-751A/E
CIRCUIT DESCRIPTION
DIGITAL CONTROL UNIT
© General
The Control unit consists of two PC boards : one on the
front
panel
and
the
other
on
the
main
chassis.
The
pro-
cessing
is
controlled
by
three
microprocessor
(hereafter
called the MPUs).
Fig.
8
is
the
Control
unit
block
diagram.
The
Control
unit
includes
three
MPUs,
their
interface
ciruits,
an
input
circuit
(consisting
of
a
rotary
encoder,
keys,
and
switches),
a
reset
backup
circuit,
a
mode
switching
circuit,
and
various
other
switching
circuits.
tscan'contnouy
vo
(voiee outs
me |
iw
rao
prorsorser
(woot enances
Yom ic ute
a
if g
oe
‘berter
iden
rome
out)
Fig. 8 Control unit block diagtam

€
€
CIRCUIT DESCRIPTION
@ MPU interface circuits
Fig.
9
shows
how
the
three
MPUs
are
interfaced.
To
exchange
data
between
the
MPUs,
three
clock
and
data
W/O
lines
(SCK,
SI
and
SO)
and
two
each
of
contro!
lines
SCK,
SOR,
DCK,
and
DRQ
are
provided
FRONT PANEL
(X$3-1460-XX) (8/6)
© Reset backup circuit
Fig.
9
also
shows
the
reset
backup
circuit.
When
the
transceiver
power
is
turned
on,
an
approx.
20ms
H
level
Pulse
is
sent
from
the
reset
circuit
using
a
dedicated
reset
IC
(IC201)
to
the
RES
line.
Since
the
RES
line
is
connect-
ed
to
all
MPUs
(MPU-I,
MPU-II,
MPU-III),
the
MPUs
begin
operation
at
the
same
time.
When
the
power
is
turned
off,
1C202
recognizes
that
the
voltage
of
the
5V
line
fell
to
4.5V
or
less,
and
sets
the
low
voltage
fallen
detect
line
(VFD)
to
a
low
level.
The
VFD
signal
is
sent
to
MPU-I
POO
and
MPU
enters
the
backup
mode.
Output
voltage
from
the
lithium
battery
for
backup
is
supplied
to
MPU-I
and
MPU-II
providing
backup
for
two
MPUs.
I MAIN CHASSIS.
) (X53-1460-XX) (A/6)
a
SV LINE
RESET CIRCUIT
5 L LOW VOLTAGE OeTecT |
im — 83 oureut
IC 202 :pstsz3c & (% when the SV line falls )
EQUIVALENT 3 | Ito 4.5v oF less during power on.
CIRCUIT
3
qu
LITHIUM BATTER’
Fig.
9
Intertace
between
MPUs
and
reset
backup
circuit

TR-751A/E
CIRCUIT
DESCRIPTION
@
Key,
switch
and
encoder
circuits
MIC
Pin
6
Fig.
10
shows
the
key,
switch,
and
encoder
input
cir-
Port
bit
0
cuits.
The
front
panel
keys
are
arranged
in
a
matrix
and
key
‘Switch\
Port
[ur
signals
are
sent
to
MPU-II,
using
a
key
scan
technique.
The
UP+DWN
|
0
0
ry
microphone
switch
lines
(PTT,
UP,
DOWN,
etc.)
are
con-
f
RES
0
0
1
nected
to
MPU-II
through
the
protection
diodes,
CR
time
DOWN
0
7
0
constant
circuit,
and
chatter
absorption
circuits.
The
CHL
To
lq
1
encoder
is
also
connected
to
MPU-II
through
the
CR
time
[up
1110
0
Constant
Circuit
and
the
inverter
of
the
Schmitt
trigger
in-
MR
1
|o
1
puts
(1C201)
for
chattering
absorption.
1
0
1 1
[_Ps2
P51
P50
Pag
lv
cK
|
COM/TOME|
VOICE/TONE
7
4
-
RIT
FUNC.
_cso_
|
res
|
CHL
FM/LS8
[3]
US8/CWTa]
REV
tS
SCAN
fg]
_M_
[o]OFFSET
To
wey
hie
R214 072)
0207
4}
0206 (22)
Kt
x
ee ‘
| “eh” pd| ahd
oo bP P| ee
Fig.
10
Key,
switch
and
encoder
input
circuit

> ®
CIRCUIT
DESCRIPTION
©
Mode
voltage
switching
and
standby
circuit
Fig.
11
shows
the
mode
voltage
switching
and
standby
circuit.
When
a
mode
is
selected
with
a
front
panel
key,
the
corresponding
port
on
MPU-I
is
set
to
high
(5V)
and
an
appropriate
mode
voltage
is
transmitted
by
switching
the
8V
line.
When
the
PTT
is
pressed,
MPU-II
sends
information
to
MPU-L,
and
port
P22
of
MPU-I
is
set
to
H,
swtching
Q4.
©
Other
1/0
circuits
1.
Busy
input
circuit
The
Busy
input
circuit
is
used
to
determine
whether
the
scan
or
DCL
system
has
received
a
signal.
The
squelch
signal
from
the
receiver
system
is
switched
by
Q7
and
applied
to
port
P10
of
MPU-I.
This
signal
also
turns
the
BUSY
indicator
on,
using
Q6
and
Q8
for
Switching.
1c2
OTSC126E
EQUIVALENT CIRCUIT
2. Squelch switching circuit
The
squelch
switching
circuit
is
used
to
switch
between
the
squelch
control
on
the
panel
and
internal
VR1
(QI—
Q3).
Usually,
Q3
is
on
to
enable
the
squelch
control
on
the
Panel.
When
the
DCL
system
searches
for
a
open
channel,
Q1
and
Q2
are
switched
on,
and
Q3
is
turned
off
by
signals
from
port
P42
of
MPU-I
to
enable
internal
trimmer
VR1.
3.
Audio
mute
output
(AL)
When
checking
memory
channel
M1,
performing
code
squelch,
or
searching
for
an
open
channel
during
alert
operations,
port
P41
of
MPU-I
is
set
to
H
(5V)
to
mute
audio
output.
4.
Microphone
mute
output
(ME)
The
ME
signal
is
used
to
mute
audio
inputs
from
the
microphone
when
the
DCL
system
transmits
a
control
signal.
Port
P53
of
MPU-III
is
set
to
H
(5V)
to
switch
Q26
in
the
MIC
input
of
the
RX
unit.
This
signal
is
also
used
to
control
a
modem
IC
in
the
modem
unit
MU-1.
Ic3
OTSA143€
EQUIVALENT CIRCUIT
MAIN
SHASSIS
o6~
+
0
ST
(X83-1460-XX)
(A/6)_—susy
LED
conTROL
2
TX:0N
be
ee
SS
EEE
FRONT PANEL
>
(XS3-1460-XX)
(8/6)
[ome Sa]
ON AIR |
LCD ass'y
a
Fig.
11
MODE
voltage
switching
and
standby
circuit

TR-751A/E
CIRCUIT
DESCRIPTION
Test points
=
:
.
=
TP2
|
_ocs
DCL
Chip
Select
|
Data
line
between
MPU-I
and
MPU-II.
Temporarily
set
to
H
when
an
MU.
or
VSa
related
TP6
|
pra
|
DCL
Request
a
Operation
is
performed.
If
this
line
is
not
reset
to
L,
MPU-III
or
its
peripheral
circuit
is
bad
|
Detects
a
voltage
drop
in
the
5V
line.
The
voltage
of
this
line
is
5V
when
power
is
on,
TP7
|
VFO
|
Voltage
Fallen
Detect
|
and
OV
when
power
is
off.
or
when
the
SV
line
falls
to
4.5V
ot
less
When
the
voltage
of
this
|
_line
is
abnormal,
the
VFD
line
is
broken,
or
1C201
or
1C202
is
faulty.
Used
to
monitor
the
your
own
DCL
control
signal
through
the
internal
speaker.
TPS
To
monitor
it,
connect
this
pinto
TP201.
i=
[Connect
only
when
CD-10
is
used.
Microprocessor clock
TT
]
Sends
the
S49kHz
produced
by
frequency
Gividing
X1
(4.19MHz)
by
12.
1c1 | gout | 39 pin
-
|
This
clock
is
supplied
to
CL1
of
MPU-III
(IC4)
through
C12.
=
:
Ica
|
cu
I
13
pin
__|
Clock
input
for
the
above
pin.
The
349kHz
square
wave
can
be
monitored
at
this
pin.
Connectors
VFO | Voltage Fallen Detect
| Same function as TP7 above.
Microprocessor
backup
voltage
|
Power
line
between
MPU-I
(IC1)
and
MPU-III
(IC4).
Backed
up
by
a
lithium
battery
when
the
transceiver
power
is
off.
Set
to
5V
when
Power
is
on,
Reset
Supplies
2
5V
peak
wave
for
approx.
20ms
when
power
is
turned
on.
Slave Chip Select
Slave Request
SRO |
|
Data
line
between
MPU:1
and
MPU-II.
Temporarily
set
to
H
when
a
front
panel
operation
is
made.
When
this line
is
not
reset
to
L,
the
SCS,
SRQ,
SCK,
SDI,
or
SDO
line
is
broken,
or
the
LCD
2.5V
when
power
is
off.
When
the
voltage
drops,
the
battery
is
exhausted,
or
its
peripheral
circuit
(026
of
C15)
is
faulty.
:
os
Reset
line
between
MPU-I,
MPU-II,
and
MPU-IIL,
|
assembly
may
be
faulty.
Table 6 Test pins
Pin
No.
|
Name
|1/0
|
Function
Name
[1/0
Logi
1]
P10
[1
|
BUSY
input
(H:
Busy,
L>
Open)
Nc
|
—
2
Pit__|
1
|
O17
detect
input
m5
‘ts
fa
d :
=u]
3
|
P12
[1
|
D16
detect
input
P60__|
©
|
CL
request
(DR)
(to
1C4)
St]
4
P13
—
|
Not
used
(NC)
|
P61__|
©
|
DCL
chip
select
(DCS)
(to
1C4)
aL
5
|
P30
_
|
—
|
Notused
(NC)
P62__
|
O
|
Slave
request
(SRQ)
(to
1C301)
Lt
6
|
P31
0
|
Output
for
016/017
detection
P63
__|
0
|
Slave
chip
select
(SCS)
(to
1c301)
JU
[7
320
|
Tone
control
output
1750Hz2
(for
WI
|_P50_|
0
|
LSB
mode
select
output
(in
LSB:
H)
|
IL
8
P33
—
|
Not
used
(NC)
P51
|
0
|
CW
mode
select
output
(incw:
4)
|
T
|
@
|
P70
0
|
PLL
serial
data
P52__|
0
|
USB
mode
select
output
(in
usB:
H)
|
SU
wo
|
P71
|
O
|
PLtserial
clock
=
P53__|
©
|
FM
model
select
output
(in
FM:
H)
IL
u
NC
|
=
|
Notused
—_
—~—
P40
|
—
|
Not
used
(NC)
|
12
Not
used
P41__|
©
|
Audio
mute
outputlin
Alert
search|
H)
JTL
132
f
PLLA
loop
enable
SL
|
P42
|
O
[SQselect
output
(in
open
search
=
H)
|
SL
14
PLL
B
loop
enable
if
[p43]
—
|
Notusea
(NC)
7
a
|
15
Reset
input
SU
37
|
vs
[-JTonn
[
16
Connect
to
oscillator
—
38
EVENT
|
—
|
Not
used
(GND)
7
Power
pin
(SV)
___|
38
|
eout
|
0
|
349kH2
output
(To
ICa)
[nu
|
18
Connect
to
oscillator
-
_|
4
P20
|
©
|
Output
for
switching
diode
[0
19
|_
Not
used
(GND)
[oa
P21_|
©
|
Output
for
switching
diode
I
20
Low
voltage
detect
input
(VFD)
LS]
42
P22
_|
O
|
Transmit
select
(transmit
mode
H)
IL
[20
x
_|
Serial
clock input
(SCK,
DCR)
“Lo
43
P23
|
©
|
Transmit
disable
i
it
L.22_
|
80
|
0
|
serial
data
output
(SD0,
DDO)
Il
a
|
NC
|—
[Notused
|
4
SQ
=
Squelch
Table
7
uPD7508HG-545-22
(MPU-I)
pin
functions
(Control
unit
1C1)
12

ae
170
|
Function
Logic
“1
|
Option
VS-1
BUSY
input
“=
|
Not
used
|
Model
clock
input
(from
MU-1)
3
T=
|
Not
used
-
ot
used
(GNO)
eel
4
Option
TU-7
latch
output
(for
K.
TSerial
clock
(OCK)
-
peg
[5
P21
|
—
|
Not
used
|
Seriat
data
output
(0D!)
eat
6
_O
|
Option
VS-1
strobe
output
(SR)
|
Serial
data
input
(000)
[Em
7
“0
|PS4__
Option
VS-1
data
output
OCL
request
(ORQ)
(toMU-1)
[SL
8
“0
[P83
VS-1/TU-7
clock,
data
output
Option
TU-7
clock
output
(for
W.1)
|
IL]
7)
VS-1/TU.7
clock
output
ps2
|
—
|
Notused
(NC)
|
0
[PS1_—
Option
VS.1-
data
output
P53
|
0
|
Modem
enable
output
(to
MU-1)
[7
“o]
Option
VS-1
data
output
P40
_|1/0
|
Model
data
input
and
output
(to
MU)|
JL
uw
:
P41
|
1
|
OCL
chip
select
(OCS)
(from
iC)
|S
[13
Cut
|
1
|349kHz
clock
input
(from
IC1)
“P42
|
—
[Notused
(NC
|
14
[
voo
[|
—
[Power
pin
(SV)
vss
|
—
[GND
7
Table 8 uPD7507SCT-215 (MPU-III) pin functions (Control unit 1C4)
Function
Logic|
Pin
No.
|
Name
[1/0
Function
Logic
Microphone
switch
input
Fur]
41]
sa]
0
|
segment
display
output
|
|
Microphone
switch
output
Lay
42
|
nc
[=
[Notusea
|
Not
used
(NC)
——
[3
[ss
fol
7
|
Petes
St
-
|
S410
|
coment
display
outout
L
|
45
st
[0
LCD
binary
voltage
pin
“T
46
soo
es
47
INT1
|
—
|
Not
used
(GND)
|
[
Not
used
(NC)
_
[48 reset
1
|
Reset
input
Not
used
(NC)
cu1_|
=
[Connect
to
CR
for
clock
oscillator
= [Connect to CR for clock oscillator
— | Not used (NC) o~
O | OCL LED display output
[0 [AUTO LED cisplay output
© | CALL LED display output [
© | Slave request (SRQ) (to 1C1)
[0 [Beep output (on = H)
[0 | Key scan output
| =] Not used (GNO?
1 | Encoder input
[1 [encoder input
1
LCD common display output
Not used (NC)
LCD segment display output
| PTT switch input
© | Key scan outpu
© | Key scan output
GND
0 | Key scan output
1 | Serial data input (S00)
| 0 | Serial date ourout (SON
10 | Serial clock
1 | Slave chip
LCD segment display output
ds A]
elect (SCS) (from IC1)
= _Not used (GNO) =—
a Not used (GND)
[0 | FUNC LED output
© | LCD bias control (Nor..L. Power off: H) |
_Power pin (SV)
1
37
S8___O
_|
Segment
dispiay
otuput
|
38 s7 0]
39 so 0 |
7 fe)
Key scan input
| Microphone switch input I
Table
9
uPD7514G-143-12
(MPU-II)
pin
functions
(LCD
assembly
1C301)
13

TR-751A/E
ELEMENT FUNCTIONS
Final unit (X45-1490-11)
[Element
Funetion
Description
Qi
7
Power
amplifier
_
oa
;
a
:
a
_Dine
+
BAVA
ound
bu
a
Inde
Sot
or
sal
bonis
mich
OG
eH
03.04
Drive
+8
AVR
[
=
-
|
Adjustable
with
VR3.
Normally
base
voltage
is
OV
and
collector
voltage
is
4,0V
(or
SWR
protection
control
in
TX
mode.
When
the
antenna
is
opened,
base
voltage
is
0.7V
and
collector
vol-
tage is 1.7V.
A
short-circuit
occurs
when
DC
power
connection
is
reversed.
If
power
is
not
Protection against reverse
o1
Boner
Cueciion
turned
on
when
correct
DC
power
connection
is
made,
it
may
be
due
to
a
burned
negative
OC
cabie.
7
AVR
temperature
compensation
02
:
for
drive
circuit
|
ALC,
the
RF
output
coupled
with
C9
in
the
Final
unit,
is
rectified
by
D3
and
4
\
BS.
CEC
oeecHon.
D4,
and
supplied
as
a
OC
control
voltage
to
the
preceding
circuitry.
Transmit
mode
:
On.
If
DC
source
current
flows,
and
no
transmitter
output
is
t/recei
|.)
a:0e.be
Treriemit/cqceve
spect
|
present,
either
of
the
diodes
may
be
faulty
-
|
07
RF
meter
detection
__
[Adjustable
with
VR1.
The
RF
meter
reads
8
at
12W/27W.
os
Reflected
wave
detection
Adjustable
with
VR3.
2.5A/3.5A
flows
when
the
antenna
is
short-circuited.
Control unit (X53-1460-XX)
[Element
|
Function
_
Descriation
1c1
:
Microprocessor
I
|
See
Circuit
Description.
_
|
FM
mode:
@)
LOW,
(@)HI
|
USB
mode:
@
LOW,
(OHI
|
CW
mode:
©)
LOW,
@HI
|
LSB
mode: ©
LOW,
®HI
|
When
a
mode
is
selected
with
a
front
ss
gag
|
panel
key,
2
port
(P50
to
P53)
1c2
Mode
+
8
switching
corresponding
to
the
MPU-I
PC
board
aa
is
set
to
H
(5V).
S
aan
|
|
| USB, CW, LSB mode: _@+8V, (LOW
FM mode: @+8V, @LOw
USB mode: @ +8V, (LOW
| CW mode: ©) +8V, @) LOW
LSB mode: © +8V, (@) LOW
Ic3 Mode + 8 switching
See Circuit Description.
see
a
Microprocessor I
5.6V AVR
14

TR-751A/I
€
ELEMENT
FUNCTIONS
€
Element
Function
I
Description
a
Gees
chwtti
saree
auch
switching
|
Sere
search
in
progress
:
On.
The
open
channel
search
level
is
adjusted
oO
‘Squelch
select
_
|
Normal
:
Off,
search
in
progress
:
On.
=
|
3
Panel
squelch
switching
_
[Normal
:
Off,
search
in
progress
:
On
7
_
[
a4
__
Standby
switching
Transmit
mode
:
On.
The
power
circuit
is
switched.
aan
5
CW
transmit
+
B
switching
[CW
transmit
mode
:
On.
-
|
os
BUSY
LED
switching
__
[7
On:
On,
Q7
Off
:
Off
=
a7
7
Scan
switching
SC
High
=
Off,
SC
Low
:
On
7
7
-
08
BUSY
LED
switching
Q6
On
:
On,
Q6
OFF:
OFF.
_
D17,D18
|
Microprocessor
port
protection
|
19
Current
reversal
prevention
USB
+
LSB
=
SSB.
020,021
|
__
Microprocessor
portprotection
|
rae
:
_
022
[
Current
reversal
prevention
[USB
mode
:
On.
IC3
@
outputs
+
Eva
-
D23
Current
reversal
prevention
CW
mode:
On.
IC3
@
outputs
+
8V.
024
Current
reversal
prevention
|
LSB
mode:
On.
1C3@)
outputs
+
BV.
025
i
Current
reversal
prevention
Prevents
current
reversal
from
the
RX.
-
€
026
Current
reversal
prevention
|
Prevents
current
from
flowing
to
the
backup
battery.
=
027
Current
reversal
prevention
Prevents
backup
battery
current
from
flowing
to
inappropriate
circuits
029
|_
Microprocessor
port
protection
Chatter absorption.
1C201
(1/6)
Encoder
rectification
Pot
ex010121
| Chatter absorption.
1€201 (2/6) Encoder rectification — {Bot icsorien
€
Chatter
absorption.
Soke
pwrp
Pol
core
1€201
(3/6)
Standby
rectification
I
Z
|
[Hp
20k
do!
csonenesers
1€201
(4/6)
.(5/6)
Reset
pulse
rectification
i
a
|
Approx.
1.9kHz
201
9 :
€
1€201
(6/6)
Beeper
oscillation
Peg
s2oaier
|
When
the
transceiver
power
is
turned
on,
the
reset
circuit
;
wo
1c202
|
Reset
pulse
generation
Mpa
Cee
eat
rz
sez
fine
arf
|
-a20r—«|s
Beeper
switching
"|
Beeper
On:
Off,
normal
:
On.
—
a202,
|
D
___BCLOn:
On
7
3
[
Q203
FUNC
LED
switching
FUNCLEDOn:On,ss—~S
_
0201
[Current
reversal
prevention
i ;
-
|
_0202
Protection
against
negative
voltage
Negative
pulse
absorption.
_
7
|
_0203-p207
Tent
reversal
prevention
Protection
against
key
scan
pulse
0208-0211
__
For
protecti
"Protection
against
current
from
the
microphone
pins.
oe
r
D212
|
FUNC
LED
|
FUNC
On
:
01
ae
a
|
0213
DCL
LED
~
|
DCLOn:
On.
7
-
7
_
=|
15

TR-751A/E
ELEMENT FUNCTIONS
LCD assembly (W02-037X-05)
Element
Function
=
-
:
4
1C301
Microprocessor
IIL
See
Circuit
Description.
0301
CALL
LED
switching
Call
mode
:
On.
7
_
9302
AUTO
LEDswitching
||
AUTO
mode:
On.
Z
7
-
0301
~__CALLLED
;
CALL
mode
:
On.
0302
AUTOLED
_
AUTO
mode
:
On.
=
0303
7
USB
LED
_
LSB
mode
:
On.
7
J
0304
CW
LED
CW
mode
:
On.
0305
USB
LED USB
mode
:
On.
7
0306
_FMLED
[FMmode:On.
7 -
—
0307
BUSY
LED
|
BUSY
mode
:
On.
0308
ON
AIR
LED |
Transmit
mode
:
On.
Composite
unit
(PLL,
TX)
(X60-1310-XX)
Element
|
Funetion
l
Description
1c1
|
‘Audio
power
amplifier
®
output,
©
input
-
-
|
=
"Operates
in
the
transmit
mode.
These
elements
are
balanced
with
VA1
to
mini-
|
mize
spurious
at
fot
10.695MHz.
bs
(8.6V)
a1.a2
Transmit
mixer
bcbousear
133.305~135.295
mee
een
ene
sosues
a3
T
Transmit
amplifier
Operates
in
the
transmit
mode.
-
7
a4
Transmit
pre-driver
Observe
normal
CMOS
circuitry
precautions
when
eo
Transmit
driver
checking
this
signal.
-
;
a7
ALC
amplification
_
Amplifies
signals
from
the
Final
unit._
|
as
Transmit
output
select
High
:
On,
Low
:
Off,
VR3:
Low
power
adjustment,
VA4:
High
power
adjustment.
a9
Side
tone
oscillation
Approx.
800Hz.
Adjust
to
0.5V/82
with
VRS
(with
the
AF
centered.)
Qi0
[je
Key
detect
switch
No
key
:
Off,
key
in
CW
mode
:
On.
-
ant
_Key
detect
switch
Q10
Off:
On,
Q10
On:
Off.
Qi2
Transmit
switch
Q11
On
or
key
down
:
On,
Q11
Off
or
key
up
-
Off.
DI-5
Variable
capacitor
tuning
(VCT)
:
;
=
D6
;
For
QS
idling
2
D9
ALC
circuit
temperature
compensation
-
_
big
Side
tone
circuit
temperature
compensation
DIT
Side
tone
switching
Key
down
:
On
=
Z
[012,013
Current
reversal
prevention
=
-
7
7
@©
115.925
to
115.945MHz
output.
Seiad.
vee
@
soe
ane
feet.
.
to}
ees
1c2
Mixer
Ree)
ee
y
a
<r
=
1
SAT
de
dedheoks
@
10.24MHz
output.
The
crystal
oscillator
(L77-0720-05)
is
faulty
when
no
signal
is
at
this
pin.
@
Mixer
input
(560
to
540kHz)
1c3
eo
nee
ee
8)
Mixer
output
(9.68
to
9.7MHz)
e
@)
Amplifier
input
(9.68
to
9.7MHz)
|
@
Amplifier
output
(9.68
to
9.7MHz)
16

TR-751A/
ELEMENT FUNCTIONS
Element
Function
ail
7
__
Description
@
input
(10.24MHz)
@
2.5kHz
output
104
Frequency
divider
1/256,
1/4096
|
@)
40kHz
output
@
28
to
27MHz
input
P
-
~
9)
560
to
540kHz
output
waists
om
Al
-
1.65)
He
1C5
Frequency
divider
1/2,
1/50
@
20kHz
output
}
Approx.
1.65Vrms
bead
)
40kHz
input
|
®
iad
560~S40KHe
1c6
|
PLL
Loop
A.
i:
unlock
detection.
Normal
-
2.8V,
unlocked
:
0.3V
1C7
PLL
Loop
8.
:
-
-
=
1c8
8V
AVR
Input
:
13.2V
(CB
line),
output:
8.1V
-
]
.
Adjustable
with
TC3.
133.305
to
137.305MHz.
ars
piecing
led
Approx.
0.47Vrms
at
f
=
144.00MHz
7
Qi4
|
_
Buffer
amplifier
G1:
0.3Vrms,0:1
Terms.
=
i.
ais
Output
amplifier
|
10.24MHz.
TPS
:
approx.
0.4Vrms.
Locked
:
On,
unlocked
:
Off.
eer
016,017
Unlock
switching
|
aig.aig
|
Loop
A
PLL
IF
amplifier
7.38
to
9.36MHz
(A
loop
PLL
IF)
20
|
RIT
crystal
oscillator
11,
805MHz
[
21
|
9
frequency
multiplication
_|
106.245MHz.
22-024
|
Loop
A
PLL
low-pass
filter
RIT
Off:
Off,
RIT
On
:
On.
i}
025,026
RIT
switching
|
|
027-229
Loop
8
PLL
low-pass
filter
30
l
_Bloop
VCO
28-27MHz.
;
_
=
Q31
|
Buffer
amplifier
28-27MHz.
32
|
__Amplifier
28—27MHz
output
,
1.0Vrms.
—
033
RIT
switching
RIT
Off
:
Off,
RIT
On:
On
a
034
___
Carrier
oscillator
Operates
in
SSB
or
CW
mode,
;
|
035
ic
Buffer
amplifier
__|
Operates
in
SSB
or
CW
mode.
J12
CAR
pin
|
0.3Vrms.
036
Amplifier
106.245MHz
014
|
Output
switching
_
Receive
mode
:
On
_
:
-
pid
Otter
Suthia
Transmit
mode
:
On.
5.0V
is
supplied
from
the
RX
unit
in
receive
mode
ees
{OV
in
transmit
mode.)
7

18
ELEMENT FUNCTIONS
Element
Function
i
Description
016
For
varying
RIT
__|
Variable
capacitor
18V153.
017
For
Loop
8
VCO
|
Variable
capacitor
18V153.
-
;
Dig
Cartier
crystal
switching
LSB
mode
:
On.
7
_
Dig
Carrier
crystal
switching
__|
CW
transmit
mode
:
On.
[020
Carrier
crystal
switching
CW
receive
or
USB
mode
:
On.
CW
break-in
(X59-1130-00)
Element
|
Funetion
"Description
-
a
|
KEY
DOWN
detection
|
KEY
DOWN
in
CW
mode
:
On.
a2
|
Schmitt
trigger
circuit
KEY
DOWN
in
CW
mode
:
On.
a3
Schmitt
trigger
circuit
KEY
DOWN
in
CW
mode
:
Off.
a4
Transmit
switching
KEY
DOWN
in
CW
mode
:
On,
information
to
microprocessors.
Composite
unit
(RX)
(X60-1320-XX)
[Element
Function
[
Description
Ici
Noise
amplifier
for
noise
blanker__|
Amplifies
455kHz
in
SSB
or
CW
mode.
FM
458kHz
IF
amplification
and
|
@
FMS
meter
output,
@
Detector
output
ie
detection
|
Squelch
noise
amplifier
|
@
Noise
amplifier
outout
‘SSB
squelch
mixer
|
48
SSB
IF
signal
input.
he
ih
eG)
FMS
meter
inversion
amplifier
|
US
VFB
to
set
the
S
meter
to
OdBx
(antenna
input),
VA6
to
set
the
S
meter
to
full
scale.
|
|
-
2.5V
i
RF
gai
A
1b)
Non-inversion
amplifier
for
RF
AGC
|
Sets
AGC
voltage
to
approx.
2.5V
at
maximum
RF
gain
settings
and
to
approx
~—3.5V
at
minimum
RF
gain
settings.
Carrier
suppression
is
controlled
with
VR8
and
VR9.
@
Microphone
amplifier
input
in
SSB
mode.
Ica
For
SSB
balanced
modulator
|
_
Carrier
is
obtained
by
adding
DC
current
to
unbalance
the
element
in
the
CW
mode.
|
©
Carrier
input
:
10.695MHz,
0.3Vrms
®
10.695MHz
DSB
or
CW
output
“Ics
8V
AVR
Input
:
13.2V,
output:
8.1V.
2
Qi
SSB
first
IF
amplifier
(level
1)
__|
Operates
in
SSB
or
CW
receive
mode
(10.695MHz)
a2
SSB
first
IF
amplifier
(level
2)
__|
Operates
in
SSB
or
CW
receive
mode
(10.695MH2)
7
a3
SSB
first
IF
amplifier
(level
3)
__|
Operates
in
SSB
or
CW
receive
mode
(10.695MHz).
Qa
|
___FMfirst
IF
amplifier
|
Operates
in
receive
mode
(10.695MHz).
05
|
FM
second
mixer
|
Operates
in
receive
mode.
10.24MHz
is
used
to
produce
455kHz
|
fucrey
08a
ag
a6
FM
receive
+
8
switching
|
FM
receive
mode
:
On.
grners
ow
4S
Omers
OV
Fu:
20v
J
a7
FM
receive
+
B
switching
SSB
or
CW
mode
:
On
Sines
Ov)
-
--e
Noise
blanker
AGC
|
Controls
ICT
gain
with
NB
AGC
in
SSB
or
CW
mode
ag
|
‘isis
bletkar
suing
Switches
NB
gate
when
NB
is
on.
Connector
:
3.5V
(FM).
|
Turns
on
when
pulse
noise
is
present.
aio
SSB/CW
receive
+
B
swithing
SSB/CW
mode
:
On.
an
SSB/CW
receive
+
B
switching
SSB/CW
mode
:
On
a2
AGC
buffer
amplifier
|
Operates
in
SSB
or
CW
mode
(10.695MH2).
a
Operates
in
SSB
or
CW
mode
(10.695MHz).
AGC
is
amplified
after
being
1
Mi
as
AGE
relly
rectified
by
010
and 011
:
aia
AGC
time
constant
switching
SSB
mode
:
OF.
=
ais
1
SSBS
meter
amplifier
7
Use
VR3
for
S
meter
Zero
adjustment
(S—9)
—
[
ai6
[|____SS8
$
meter
amplifier
|
Use
VR4
for
S
meter
sensitivity
adjustment
(S—9)
:
2008
SSB
or
CW
receive
mode
:
On
(base
voltage
in
SSB
or
CW
mode
:
7.6V)
a7
$
meter
switching
|
Sets
FM
$
meter
amplifier
output
to
OV

a
ELEMENT
FUNCTIONS
= ~_Funetion
18
_|_
For
FM
transmit
modulation
etreeteeena
Asya)
Sa
Ss
aig
Buffer
amplifier
for
FM
transmit
|
Operates
in
FM
transmit
mode
(10.695MHz)
Modulation
20
|
FM
transmit
+
B
switching
|
EM
transmit
mode:
On.
7
a
21
FM
transmit
+
B
switching
|
SS8/CW
mode
:
On.
;
7
azz
SSB/CW
transmit
+8
switching
|
SSE/CW
transmit:
On.
-
a23
SSB/CW
transmit
+B
switching
__|
Transmit
mode
:
On.
024
|
Transmit
IF
amplifier
“Transmit
mode
:
On
(10.695MHe).
-
-
[|
025
|___
Microphone
amplifier
(level
1)
|
Amplifier
used
in
all
modes
=
026
FM
buffer
amplifier
Use
VR12
for
FM
microphone
gain
adjustment.
27
SSB
microphone
amplifier
|
Use
VR11
for
SSB
microphone
gain
adjustment.
028
Microphone
amplifier
mute
switch
|
Turns
on
when
a
DCL
control
signal
is
sent.
29
|
Receive
+
8
switching
|
Transmit
mode
:
Off,
r
T
j
Q30
|
Receive
+
8
switching
Receive
mode
:
On
031-033
|
_Transmit++9V
AVR
control___|
Operates
in
transmit
mode,
Set
9V
with
VR13
in
transmit
mode
034
|_Amplifier
for
illumination
+
8
AVR
_|
Approx.
10.5V
ne
-
|
_crmcereumanin
|stats
CH
7
036
|
Receive
audio
amplifier
mute
|
feign
PECRESS
In
erenernit
ode.:.On
01
|
Noise
blanker
gate
|
Normal
:
On,
NB
on
for
noise
suppression
:
Off
7
|
:
Normal
:
On,
NB
on
for
noise
suppression
:
Off,
De
Nowe
banter
este
|
Anode
in
S88
oF
CW
mode
:
29V
-
03.04
Crystal
filter
switch
|
Switched
between
SSB/CW
receive
mode
and
SSB/CW
transmit
mode.
05-08
Ring
detection
[_
7
o9
Current
reversal
prevention
-
010,011
AGC
rectification
i
be
|
Protection
EM
S
meter
]
-
|
reverse
deflection
ais
FM
S
meter
deflection
prevention
|
Operation
amplifier
output
is
forced
negative
in
FM
wanamit
|
in
transmit
mode
+8V
mode.
-
014
|_455kHz
IF
amplifier
input
switching
_
SSB/CW
receive
mode
:
On.
-
DIS
Current
reversal
prevention
016
‘|
Second
mixer
output
switching”
SSB/GW
receive
mode
:
On,
D7
Second
mixer
output
switching
__
FM
receive
mode
:
On
=
7
oie
Current
reversal
prevention
FM
receive
mode
:
On.
7
oe
|
019
Noise
rectifier
for
noise
blanker
2
=.
——
a
20
Noise
bianker
switching
c=
|
=
==
021
For
FM
modulation
|
=o.
==
=
022
Transmit
IF
amplifier
input
switching
|
Switched
between
SSB/CW
transmit
mode
and
FM
transmit
it
mode.
a)
Current
reversal
prevention
:
024,025
___
Carrier
switching
[SS8/OW
transmit
mode
:
On.
:
a:
026
|
Balanced
modulator
output
switching
|
SSB/OW
transmit
mode
:
On
is
Transmit
+
9V
AVR
temperature
~~
——
—
f=
____compensation
028
|Current
reversal
prevention
ee
_
a)
___
For
lamp
AVR
reference
voltage
=
7
= =
|
030
For
—6V
stabilization
-
7
7
an
ss...
|___031
|
__
Current
reversal
prevention
+‘.
7
oo
|
032
Squelch
noise
rectifier
7
——
033,034
Current
reversal
prevention
=<
oo
5
dd
aor
RF
amplifier
—_iaskiiar)
SS
ae
a202
|
_Firstmixer
«|
SK7AIL)
=
19

TR-751A/E
20
ELEMENT
FUNCTIONS
FM
microphone
amplifier
(X59-1090-00)
S$/No.
705—707XXXX
:
W,T
Element |
Function
|
Description
tC1
(1/2)
Low-pass
filter
[@.
@
:
output
1C1
(2/2)
Limiting
amplifier
®input,
@)
output.
—6V
DC-DC
(X59-1100-00)
Element
Function
"Description
a
a
Multi-vibrator
|
Supplies
approx.
19kHz
square
wave.
a2
|
Multi-vibrator
D1
Voltage
multiplying
current
AF
preamplifier
(X59-1110-00)
Element
[
Function
Description
ar
Preamplifier
|
Squeich
On
:
On.
a2
|
Low-pass
filter
|
7
Squelch
switch
(X59-1120-00)
Element
|
7
Function
[
Description
Qi
Squelch
switching
Squelch
On
:
On.
a2
Squeich
time
constant
switching
a3
Squelch
switching
|
Squeich
On
:
On.
D1
Base
bias
setting
=
Dasaes
02
Current
reversal
prevention
|
Reversal
prevention
in
SSB
and
CW
modes
FM
microphone
amplifier
(X59-3000-00)
S/No.
705—707XXXX
:
K,M1,M2
FM
microphone
amplifier
(X59-3000-01)
S/No.
708XXXX-—
:
K,M1,M2,W,T
Element
Function
Description
1C1
(1/2)
Low-pass
filter
_
output.
1C1
(2/2)
Limiting
amplifier
®input,
@output
ai
Tone
amplifier
7