Korg EX-800 User manual

HORIi'
KORG PROGRAMMABLE POLYPHONIC SYNTHE MODALES
SEFIVIGE EX-900
MAI\IUAL
CONTE NTS
1. SPECIFICATIONS .
2, MIDI IMPLEMENTATION . . .
3. STRUCTURAL DIAGRAM
4, B LOCK D IAG RAM
5. CIRCUIT DIAGRAM
6. PC BOARD . . .
7. CIRCUIT DESCR IPTIONS
8. TROUBLESHOOTING TABLE
9. CHECK AND ADJUSTMENT PROCEDURE
10. PARTS LIST
KEI() ELECTR()NIC LABORATORY
Tt)KY[)UAPAN
2
5
7
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11
14
16
17
19
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1. SPECIFICATIONS
. Voice
. DCO1
DCO Mode
Noise
VCF
Chorus
DEG 1
(FOR DCO 1)
DEG 2
(FOR DCO 2)
DEG 3 (FOR
vcF & NorsE)
.MG
o MlDl
8 Voice (WHOLE mode)
4 Voice (DOUBLE mode)
Octave (LOW, MlD, HIGH), Waveform
(1.., f-L), 16'8' 4'2'(ON/OFF)
Level (0 - 31)
Octave (LOW, MlD, HIGH), Waveform
( l\, n), 16', 8', 4', 2', (ON/OFF)
Level adjustment, lnterval (0 - 12
semitones), Detune (-20 cent MAX)
(wHoLE, DOUBLE)
Level (0 - 15) (White noise)
Cutoff Frequency (0 - 99), Resonance
(0 - 15), Keyboard Track (OFF, HALF,
FULL), EG lntensity (0 - 15) EG
Polarity ( r,z, A), Trigger mode (for
DEG 3 only) (SINGLE, MULTI)
ON/OFF
Attack time, Decay time, Break Point
level, Slope time, Sustain level,
Release time (ALL 0 - 31).
Attack time, Decay time, Break Point
level, Slope time, Sustain level,
Release time (ALL 0 - 31).
Attack time, Decay time, Break Point
level, Slope time, Sustain level,
Release time (ALL 0 - 31).
Frequency, Delay time, DCO intensi-
ty, VCF intensity (ALL 0 - 15).
Receive Channel (1 - 16), Program
Change (ENABLE/DISABLE), Se-
quencer Clock (lNI EXT), Bend (lN-
TENSTTY)
+/ - 50 cents
. DCO2
o TUNE
Key data receiv- Cr-Co/61 keys (36-96 er MlDl)
able range
Power
Sequencer
Programs
Programmer
. Display
Tape interface
lnput jacks
o Output jacks
Tape switch
Write switch
MlDl jack
DC 9V
o Dimensions
Weight
Accessories
^== trlaS:e. I,CLUME
S-A=-S-:D S-EP SPEED (Slow -
Fas
A* ":c3E
Nurnbe'se'åc tuttoos (1-8), PRO-
GRAM PABÅMETER. BANK HOLD,
UP. DOW\ flPr-E switches
Program N-*be. Parameter Number,
Paramete. 'rär-E Bank hold indicator,
Edit indrcato,'
Save. Loac. Vert Cancel
FROM TAPE (FllGri rOVY), PRO-
GRAM UP ( --r- GND)
Output (R, UMONOT HEAD-
PHONES, TO TAPE
ENABLE/DISABLE
Program (ENABLE/DISAB LE)
Sequencer (ENABLE/D I SABLE)
IN, OUT, TH RU
AC adapter jack (300 mA minimum;
use only recommended KORG
adapter)
W: 404 mm x D: 222.5 mm x H:
64.5 mm
2.6 kg
AC adapter, Cassette tape of Factory
Preload Programs, Rack mount
adaptor (x 2),Screws (x 4), Spin DIN
cord
I
{
-1-

2. MIDI IMPLEMENTATION
1 Transmission data
rransmittabte data consist of system exctusive messases ' 3ll*S::Iy[Ff:.nroy
only. These are used for the computer dump function. Z. frfOfe NUMBER:
kkkkkkk=36-96
System Exclusive Messages
STATUS DATA DESCRIPTION
RAM
DATA
1 1 1 10000 01000010
00100001
00000001
(0000."."
0000.'..)
:
(O0O0ssss
0000ssss)
1111011.
KORG ID
FORMAT ID
EX-800 rD
LSB
,S, tO, DATA 1-woro
LSB CHECK SUr"d
MSB DATA
EOX
DATA
EBROR
MESS
AGE
1 1 10000 01000010
00100001
00000001
00100000
11I101 1
KORG D
FORMAT rD
EX-800 lD
DATA ERROR
MESSAGE
EOX
NOTE:
1. Data error message is sent if there is a check sum or-
ror during memory load. Error message (FOn, 42a,
21x, 01a, 20a, F7x)
2. The request sent by the computer must be: F0x, 42x,
21x, O1x, 10x, F7x (wher€ "H" means hexadecimal).
Memory data is then output in the order: FOa, 42a,
21x, 01x, rTl€tTlor! data check Sum, F7n -
2 Reception data
Channel Messages
NOTE:
lf received data is outside of this range, it will be trans-
posed to nearest note of the same name.
3. Negative numbers are ignored.
4. OMNI ON/OFF is always interpreted as being accom-
panied by POLY-ON.
Separate POLY-ON or MONO-ON messages are
ignored,
5. ppppppp = 0 - 127 (PRoGRAM NUMBER)
However, if number exceeds 63 then subtract 64 to find
value as interpreted.
Example:
74=10
&=0
6. VOLUME CONTROL:
vvvvvvv =7F, is the loudest volume. Volume
decreases as value approaches 00x.
System Real Time Messages
STATUS DESCRIPTION
11111000
11111010
11111100
1111'1 110
SEQUENCER
CLOCK
SEOUENCER
START
SEOUENCER
STOP
ACTIVE
SENSING
CAUTION:
ACTIVE SENSING
lf FEx (STATUS 11111110) is ever received, then another
FEH or other MlDl data must be received every 300ms,
otherwise the voices will be turned off. ]f FEx is never
received then operation will continue as usual.
STATUS 2nd byte 3rd byte DESCRIPTION
1 000nnnn
1 001 nnnn
1 01 1 nnnn
10"1 1 nnnn
101lnnnn
1 01 1 nnnn
1 1 OOnnnn
1 1 I 0nnnn
0kkkkkkk
0kkkkkkk
0000000 1
000000 1 0
000001 1 1
0cccc ccc
oppppppp
0- --
0------
0vvvvvvv
Ovvvv- - -
0vvvv- - -
0vvvvvvv
00000000
0bbbbbbb
NOTE OFF EVENT
NOTE ON EVENT
(vvvvvvv = 1 )
vvvvvvv=0: OFF
DCO MODULATION
VCF MODULATION
VOLUME CONTROL
MODE CHANGE
OMNI OFF (ccccccc=7Cr)
OMNI ON (ccccccc=7Dn)
PROGRAM CHANGE
PITCH BEND
L-
-2-

System Exclusive Messages
STATUS DATA DESCRIPTION
DUMP
DATA
1 11 10000 010000.1 0
00100001
00000001
(oooo....
0000
(O000ssss
0000ssss)
11110111
KORG ID
FORMAT ID
EX-800 lD
LsB i*ot.t DATA 1-word
MSB I
LSB I gHggK 3gY
y5s J DATA
EOX
DATA
DUMP
REOUESI
111 ',l 0000 01000010
00100001
00000001
00100000
11110111
KORG ID
FORMAT ID
EX-800 lD
DATA BEQUEST
EOX
DATA RELATIVE
ADDRESS BYTES
MIDI CH
SEQUENCER
DATA
UNDEFINED
CHORD
MEMORY
BEND DEPTH
UNDEFINED
PROGRAM DATA
0000n
0001 n
0101n
01 02n
01 OAH
01 08n
01 20H
1
256
1
1
ZI
1 345
NOTEg
1. SEQ DATA is as shown below'
E)(AMPLE:
DATA: B4x,02x, B5x,02x,01x,01H, B7x, B9x' -3-4x' 37x'
BCx, 02x, O2x, OZa, 02n,02x,01x, 01x' 00x
2. CHORD MEMORY
0 k"knknknknknkni KEY DATA
00000000: END
3. lmportant: EX-800 does not use undefined data except
for check sum.
Panel Control
NOTE:
1. EX-800 begins RAM data dump about 300msec after
it receives ine tinat F7,.,in the RAM data request above'
2.'E'(One word of RAM data)n Least significant 8 bits
^-'are used for check sum.
3. Send data to EX-800 MlDl lN in the order:
FOn,42t,21n, 01H, ITI€ITlol'! data check sum, F7H, ln-
ternal.
RAM Data Chart
SYMBOL DATA NOTE
ä00n Fine
101 Rest
02n Tie
N
tO lkrkrkrkrktkrkr MSB=0: Notes remain for that timing.
MSB = 1: Block end for that timing
?$
Okr kr kr kr kr kr kr
)l<zlakzlakzl<zkz
'l kakgkskskkske
PARAMETER ÅIO PARAMETER VALUE
85
86
87
88
RCV CH
PROG CHANGE
BEND
SEQ CLK
1-16
0.1
0-64
12
-3-

Program Parameter per ONE note
bit
Byte 1643
52 0
I
+ DCO 2 WAVEFORM-+
I
l
+DCO I WAVEFOBM-+- DCO Z OarOUa _*
I
DCO IcrAVE --+
2DCO 2 FEET ON,/OFF
I
I
DCO I FEET ON//OFF
I
3CHORUS
<F -I
0Nr/OFF DCO 2
++
ON,/OFF '// DCO 2ETUNE
4NOISE LEVEL DCO 2 rt\ TERVAL
5
6
7
8
t)%
i- oco r
I
I LEv-L +
/l
VCFEGINT+
I
(////////,
l'uruDErtruro
l'/////,t/1, ]C I
t\u
l/
== I
I
I
'////////t
VCF
+-
TRIGMODE
DELA FREQ+
9MGV 3F INT- >1- . MGDCO INT+
t0 Xl
-DEG I DECAY
I
Jtr.\, I AIIAUr\
lt xDGI BREAK P
l2 xDEG I SL STAIN DEG I SLOPE X
I3 XDE I RELEA EX
l4 DEG DECAY IJE \, (. F\IIAU
I5 X
-DEG 2LOPE LJE LT 4 Dnf.F\
r6 XDG 2 SUST rlN x
t7 xll DEG 3 ATTACK
lt I
DEG 2 RELE
I
x
sE-
r8 XDEG 3 DECA x
I9 I
DEG 3 SLOP
I
DEG 3 BREA
20 EG 3 RELE SE D]G 3 SUSTA N
2, <- VCF I
KBD
I
TRACK--+ VCF RSONANCE
PRAMETER WITH X EXCEEDS BYTE UNIT.
NO SPACE BETWEEN NOTES
-4-

I
3. STRUCTURAL DIAGRAM
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5. CIRCUIT DIAGRAM K 1M.596
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Value in bracket was used f or Old production
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Each EG signal of
Svoice is coming
out.
X1 DCO2 LEVEL X1
x2 RESO x2
x3 x3
x4 CUT OFF x4
x5 MG X5
x6 VIB X6
x7 BEND x7
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-13-

7. CIRCUIT DESCRIPTIONS
MAIN CIRCUIT DESCRIPTIONS
The EX-800 is intended to be an expander unit for connec-
tion to synthesizers, sequencers, or other equipment that
has a MlDl output. lt is essentially the POLY-800 without a
keybord. However, there are some differences in the MlDl
functions, as detailed in the MlDl IMPLEMENTATION
notes.
The memory backup system is also different. The EX-800
employs an internal lithium battery to protect data in its
memory. The life of this battery is about five years and it
should be replaced after that time has elapsed.
For check and adjustment of the EX-800 please refer to the
PO LY-800 service manual.
Below are simple descriptions of each circuit block.
Refer to circuit diagram for number.
1) Tape interface input circuit:
Consists of amplifier and comparator. When command is
executed, data on this line is input to the CPU accumu-
lator's 7th bit.
2) CPU:
A CMOS 8-bit microprocessor lC24 (80C8b) featuring low
power consumption. Virtually all POLY-800 functions are
handled by this CPU.
3) Reset circuit:
lC40 (PST518) is a 3-pin lC used for reset. lt generates an
initial reset voltage of about 4.2V.
4) Sequencer tempo clock oscillator circuit
The tempo circuit includes lC28 (TC40H074) and 112 ot
lC36 (which is 1 12 of aTL072).
The tempo control is connected to CN2 pin 1 providing
lOHzt2O% at the knob's 0 position and 100H2!2UÄ at the
10 position for CPU interrupts. lf this circuit fails, then
there will be no sound f rom the sequencer section.
5) lnterrupt oscillator circuit:
This oscillator cycle is used for the EG, MG, LED displays,
and S/H time division processing. Oscillator frequency is
24OOHz-3600H2. lnterrupt order is by priority. lf this
circuit fails, EG operation and LED indication may become
erratic.
6) Address Decoder:
TTL circuit decodes addresses for RAM and other lCs.
7) ROM (8192 words x Sbit PROM)
8) RAM (2048 words x Sbit static RAM)
9) Address latch:
lC latches according to CPU ALE (Address Latch Enable)
terminal output signal since CPU uses address LSB Sbits
together with data bus Sbit input.
10) Peripheral l/O:
PA, PB, and PC ports are all used for output. The internal
timer is used f or the interface lC26 (63850) reference clock.
The CPU 3MHz clock frequency is divided by 6 to obtain
500kHz. RAM is used for the prograrn n'orking area.
11) LED display drive circuit:
lC30 (8A618) and lC31 (f\/l54513) form a 6 x 8 matrix for
time sharing indication by the panel's 7-segment LED
d isplay.
12) 8-bit D 'A converter:
Uses CMOS noninverting buffer lC32 (HD14050or "4050"),
and BRg (RKM10L253F or "BR9") a lGpin (R=25kohm)
R-2R ladder resistor in D A converter rvith output of 0V-
4V.
13) External DC power supply ripple filter:
Diode D2 is used to protect the circuit in case of reverse AC
adapter polarity.
14) LED display power supply:
Circuit is designed so that LEDs become dim when battery
voltage drops below rated level. (about 6V)
1 5) +5V power supply:
This circuit design is employed because it maintains normal
operation up until just before the batteries drop below
rated voltage of Volts (about 6V)
1 6) -5V power supply:
A type of DC-DC converter.
18) A/D converter comparator.
19) Master oscillator:
Varactor VC1 and coil KL-003 are used in the oscillator
circuit. This generates a frequency of about ZMHz at the
tune knob's center position. This is divided down (to about
1N4Hz) to sucply:he TG. rCL1, CL2)
Bend and vibrato co:rtrol .oltages are D A converted by
lC35 (3404i and aooliec :o :he oscillator.
20) EG S H c:rcJ ::
EG values calculaieC D'., :he CPU a.e output by time sharing
and input to the TG.
LED diodes for r3€r .o c: ar::-?'€:o smooth the stepped
trans ition.
21) Keyboard pans si., :c. -3,-i 3 'cJ ::
A I x 8 matr,x sfcr*3c !", )-i-C5. rC34 (TC40H138), and
outputs åS r.r,€ 3s 3"-i3,-1 j'3,,- ;*3 COr-lOarator in circuit
diagra'n t 18,"
f,
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-14-
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22) Detune circuit:
Lowers frequency by thinning out clock pulses.
23) Tape interface output circuit.
24!. CV circuit:
Performs time division output and S/H on CV for VCF and
master oscillator.
25) 6-bit latch circuit:
A 6-bit control output circuit with 2 bits for detune, 2 bits
for DCO waveform switching, 1 bit for A/D converter, X-Y
switching, and 1 bit for noise gate control.
26) 6-bit latch circuit:
A 6-bit control output circuit with 5 bits for S/H control
and 1 bit for chorus on/off switching.
27l.VCA + VCF circuit:
The lcl (NJM2069) has three internal VCAs and one
internal 24dBloct VCF (LPF). SlGl and SlG2 respectively
receive mixed DCO1 and DCO2 inputs from the TG;
LEVELl and LEVEL2 are control input terminpls.
The other VCA is for noise only. The 9pin (VCA LIN lN) is
its control terminal.
MG, EG INT and CUTOFF, KBD TRACK are controlled
separately and input to VCF LOG.
See REFERENCE DATA for details.
28) Analog switch circuit:
Performs DCO waveform switching and joystick A/D con-
verter input switching.
29) Noise generator.
30) MlDl interface circuit:
This is a standard type MlDl interface circuit employing
the MlDl interface lC26 (ACIA63850) and high processing
speed photocoupler PC-1. (PC-900)
D22 is used to prevent destruction of the photocoupler
LED in case a reverse voltage is applied. R119 (220 ohm)
and R 121 (22O ohm) resistors are for prevention of damage
in case of excessive current.
The circuit is designed to provide a data transmission rate
of 31.25k baud (11%).
31) Waveform synthesis circuit:
Using the TG's various foot outputs (16', 8', 4', and 2'),
this produces 2-waveforms, one by addition on a 1-1-1=1
basis and the other using the ratio 1=112=114=118.
The block resistor BR5 (RKC 11884 33K) is made up of
four 1/8W 33k resistors (1=1=1=1). BR6 (RMO0470) is
10K ohms using R,2R,4R, 8R (1=112=114=118!'.
32) TG (Tone Generator):
An lC having eight sets of dividers and VCAs. See
REFERENCE DATA for details.
K LM-sgg ,614
KLM-598 consists of the chorus circuit and headphone amp
circuit. The VCF output signal transits noise gate F 1
(2SK381) and is input to compressor lC3 (NE570); then
aC4 lM5224P) detects the envelope.
The clock generator circuit which drives the BBD IC makes
lC7 (M5224P) generate a triangle wave which comparator
lC8 (393) converts to a sawtooth wave with a change of
pitch for a more natural chorus effect.
F2 (2SK381B) at the output is an FET for chorus on/off
switching.
KLM-614 includes the panel section LED display and
switch matrix circuitry.
-15-

8. TROUBLESHOOTING TABLE
The order in which things should be checked naturally coincides with the signal path in the PoLY'8oo' Please refer to this
ftow chart to help you pinpoin, ,orrJ", oi-rn"iirn"tionr. Remember .;;;;;;;; programs to tape before beqinning §ervice
procedures.
lCheck Power\
.suf,ply voltage (No. 13, 1
ls waveform
Check +5V
(No.15),
-5V (No. 16).
Check No.31
circu it lC,
block resistors.
No sound or other
malfunction.
Try loading data
from accessory tape.
the problem
disappear?
generatot (lC3) outPut
sy-nthesizer circuit (No. 31 )
output normal?
s the correct
'signal being inPut at
VCF (lC1) 20 and2l
Check connector
CN-61 pin. ls VCF
output present?-
Check analog
switch circuit
(No.28).
Check lC 1
(NJM2069).
Replace.
Cr,ecf K LM-598 compressor/e xpander
lC (lC3), BBD lC (lC5), etc'
The problem is probably in this circuit
board.
-Clieck E0-E7\ NO
tolsee whether EG control-
(sional is being inPuyo--
- -\ perly or not.
liEG s/H circu
No. 20) getting correct
input?
-Are CLKl and CLK2
(oelng input normally?
place lC12
(HD14051).
ls 8-bit
data bus okay?
The problem is in the main board
(KLM-596). Check CPU, liO, RAM,
ROM, etc. control lines and address
and data buses for Problems.
-16-

9 ctffiCX AND ADJUSTMENT PROCEDURE
Å;*ll-§*lf E rr*, qoc EDU R E
- r,rrf l*"i &- - * itlll ':- :-:,:( :-C adjustment of the EX_g00.
l'l- -,*,;*' :r,-,,- i-r x !,- t.rtr - -?... USe a S-pin DIN Cable leSS
: ir- i- :'- i -t- .:,--=.:: 3^
caution: This product has been thoroughly adjusted at the
factory before shipment. Therefore do not adjust anything
other than those VRs required for servicing.
BEFORE making any calibration adjustments, Be sure test
data is loaded into EX-800.
The following setting chart shows the program data used
for service testing. After inputting the data, save it on tape
for future time saving convenience.
) To AMP
\:nr -: i.r,-8J,0 i,llDl OUT terminal is for memory
:--: -: = :u="::^a; computer (via a MlDl interface).
17 18 33' 41 43 45 48 71 72 73 74 75 76 83 84 86
14-16 17 18 41 42 43 45 48 51 52 53 54 55 56 g3 84 g7
221301600 0 031 031 o064
ro. 13 (cutoff):
11 12 13 14-16 ',17 18 33 41 42 43 45 48 51 52 53 54 55 56 83 g4
31 1 0 12 12 2 0 000310310
15 99 0 0 0
^c. 12 (master oscillator):
't 112 13
031031000
14 (resonance):
11 12 13 14-16 17 18 33 41 42 43 45 48 51 52 53 54 55 56 83 84
231 0 99 15 0000310310
J Power supply circuit (KLM-S96, circuit no. 15):
J: :-': that the specified AC adapter is being used: gV,
I ltl- Å,
' -: , check and adjustment:
- ,* D','\'l (digital voltmeter) to check KLM_5g6 connector
l'*i ) " 6 and confirm +5V it0.OOSV). Adjust VR1 if
-?::SS,a-y.
: -: \/ crr eck :
-:.. lvr,,,] to check KLM-596 connector CN6 pin g and
: : -' "r -5V (witfr in -4.7V - _S.7V)
2 D A converter check and adjustment (KLM-S96, circuit
No. 12):
' S; ect program No.l2
2 Set joystick bend control of poLy-goO at center posi-
: :''r B EN D INT to 10
3) connect DVM to KLM-596 rclo (TL062) pin 7 and
confirm 2.OOIV 10.005V. Adjust VR4 if necessary.
Also confirm:
3.984V t0.00SV for an upward pitch bend and
O.O24V t0.005V for a downward pitch bend.
Note: Adjustment is easiest in the joystick circuit arthough
the idea is to obtain a 4V output from lC 3g (TLO6 2l bV
adjusting the D/A converter when lC g1C5S port A output
is all high.
3. Noise level check and adjustment:
1) Select program no. 1 1.
2) Depress any single key of POLY-800.
3) Connect oscilloscope to KLM-596 CN6A 1 pin and con-
firm noise level of 0.3Vp-p (t 2O%).
4) Adjust VR3 if necessary.
::::tl',,no.
-17 -

4. Master oscillator check and adjustment: 6. Resonance check and adjustment:
Set tune knob to center and bend intensity to maximum. 1) Select program no. 14.
Connect AT-12 to line out jack.
1) Select program no. 12.
2) Depress C3 key of POLY-800.
2l Play C3 key of POLY-800.
3) Confirm that waveform is as shown in figure 2.
4) Adjust VR5 if necessary to prevent oscillation or to cor-
3) Confirm AT-12 indication of - 1 OCT, C, 0 cent. lf nec- rect waveform deviation f rom figure 2 example.
essary, adjust by turning KL-003 coil.
4) Next, push joystick to maximum upward pitch bend
position and confirm AT-12 reading of - 1 OCT, G, +35
cents. Adjust KLM-601 VR2 if necessary.
5) At maximum joystick downward pitch bend AT-12 indi-
cation should be -2 OCT, F, -35 cents. Adjust KLM-601
VR 1 if necessary.
VR3 is a semi-fixed resistor to fix range of tune VR on
front panel.
Confirm +40 - +70 cents when tune VR is at # max
position.
Confirm -4O - -70 cents when tune VR is at b max
position. Fig.2
lf necessary, Adjust VR3.
5. Cutoff check and adjustment:
1) Select program No. 13.
2l Plav C3 key of POLY.800
3) Connect oscilloscope to CNOA pin 1 and observe wave-
form as in figure 1.
4) Adjust VR2 to obtain maximum waveform amplitude.
MAX AMP LEVEL
Fis. 1
1.5msec lt2OoÄl
-t F-
0.3Vp-p
(t2Oo/.1
0.1V/div, l msec/div
-18-