LG F7100 User manual

Service Manual Model : F7100
Service Manual
F7100
P/N : MMBD0035501 Date: July, 2004 / Issue 1.0

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1. INTRODUCTION.................................... 5
1.1 Purpose ................................................. 5
1.2 Regulatory Information .......................... 5
A. Security ............................................. 5
B. Incidence of Harm ............................. 5
C. Changes in Service ........................... 5
D. Maintenance Limitations ................... 5
E. Notice of Radiated Emissions ............ 5
F. Pictures ............................................. 6
G. Interference and Attenuation ............ 6
H. Electrostatic Sensitive Devices ......... 6
1.3 Abbreviations ......................................... 6
2. PERFORMANCE .................................. 8
2.1 H/W Feature .......................................... 8
2.2 Technical Specification .......................... 9
3. TECHNICAL BRIEF ........................... 13
3.1 Transceiver (SI4205-BM, U402) .......... 13
3.2 Power Amplifier Module
(RF3133, U401) .................................... 17
3.3 13 MHz Clock ...................................... 18
3.4 Power Supplies for RF Circuits ............ 18
3.5 Digital Main Processor
(AD6525, U101) ................................... 19
3.6 Analog Main Processor (AD6521, U102)
.............................................................. 23
3.7 Power Management IC
(ADP3522, U202) ................................ 26
3.8 Memory (U201) .................................... 28
3.9 LCD and LCD Backlight ....................... 30
3.10 Keypad Switches and Key Backlight
Illumination ......................................... 33
3.11 Microphone ........................................ 29
3.12 Dual Mode Speaker and MIDI IC ....... 34
3.13 Headset Jack Interface ...................... 36
3.14 Compass ............................................ 37
4. TROUBLE SHOOTING ..................... 38
4.1 RF Components ................................... 38
4.2 RX Trouble ........................................... 39
4.2.1 Checking Regulator Circuit ......... 40
4.2.2 Checking VCTCXO Circuit ......... 41
4.2.3 Checking Transceiver
Control Signal ............................. 42
4.2.4 Checking Antenna Switch &
Mobile Switch ............................. 43
4.2.5 Checking SAW Filter .................. 44
4.2.6 Checking RX IQ .......................... 45
4.3 TX Trouble ........................................... 46
4.3.1 Checking Regulator Circuit ......... 47
4.3.2 Checking VCTCXO Circuit ......... 48
4.3.3 Checking PLL Control Signal ...... 49
4.3.4 Checking TX IQ .......................... 50
4.3.5 Checking PAM Control Signal .....51
4.3.6 Checking Antenna Switch &
Mobile Switch ............................. 52
4.3.7 Checking Antenna Contact ......... 54
4.4 Power On Trouble ................................ 55
4.5 Charging Trouble ................................. 57
4.6 LCD Trouble ........................................ 59
4.7 Receiver Trouble ................................. 61
4.8 Speaker Trouble .................................. 63
4.9 MIC Trouble ......................................... 65
4.10 Vibrator Trouble ................................. 66
4.11 Key Backlight LED Trouble ................ 68
4.12 SIM Detect Trouble ............................ 69
4.13 Ear Jack Trouble ................................ 70
4.14 Compass Trouble .............................. 73
5. DISASSEMBLY INSTRUCTION ..... 76
5.1 Disassembly ........................................ 76
6. DOWNLOAD AND CALIBRATION
.................................................................... 80
6.1 Download ............................................. 80
A. Download Setup .............................. 80
B. Download Procedure ....................... 81
6.2 Calibration ............................................ 87
A. Equipment List ................................ 87
B. Equipment Setup ............................. 87
C. Test Jig Operation ........................... 88
Table Of Contents

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D. Procedure ....................................... 89
7. BLOCK DIAGRAM ............................. 90
8. CIRCUIT DIAGRAM ........................... 91
9. PCB LAYOUT ....................................... 96
10. ENGINEERING MODE .................... 99
10.1 BB Test [MENU 1] ......................... 100
10.1.1 LED ..................................... 100
10.1.2 LCD ..................................... 100
10.1.3 Backligh .............................. 100
10.1.4 Buzzer ................................. 100
10.1.5 Vibrator ............................... 100
10.1.6 ADC (Analog to Digital
Converter) ........................... 101
10.1.7 BATTERY ........................... 101
10.1.8 Audio ................................... 101
10.1.9 DAI (Digital Audio Interface)
............................................. 101
10.2 RF Test [MENU 2] ......................... 102
10.2.1 SAR test .............................. 102
10.3 MF Mode [MENU 3] ....................... 102
10.3.1 All auto test ......................... 102
10.3.2 LED ..................................... 102
10.3.3 Backlight ............................. 102
10.3.4 Buzzer ................................. 102
10.3.5 Vibrator ............................... 102
10.3.6 LCD ..................................... 103
10.3.7 Keypad ................................ 103
10.3.8 MicSpkTest ......................... 103
10.3.9 Compass ............................. 103
11. STAND ALONE TEST ................... 104
11.1 Introduction .................................... 104
A. Tx Test ...................................... 104
B. Rx Test ...................................... 104
11.2 Setting Method .............................. 104
A. COM port ................................... 104
B. Tx .............................................. 104
C. Rx .............................................. 104
11.3 Means of Test ................................ 105
12. AUTO CALIBRATION ................... 107
12.1 Overview ........................................ 107
12.2 Requirements ................................ 107
12.3 Menu and settings ......................... 107
12.4 AGC ............................................... 109
12.5 APC ............................................... 109
12.6 ADC ............................................... 109
12.7 Setting ........................................... 109
12.8 How to do calibration ..................... 109
13. EXPLODED VIEW &
REPLACEMENT PART LIST ...... 111
13.1 Exploded View ............................... 111
13.2 Replacement Part
(Mechanic components) ................. 113
(Main components) ......................... 115
13.3 Accessories ................................... 127

1. INTRODUCTION
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1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the
features of this model.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges for your telecommunications services.
System users are responsible for the security of own system. There are may be risks of toll fraud
associated with your telecommunications system. System users are responsible for programming and
configuring the equipment to prevent unauthorized use. The manufacturer does not warrant that this
product is immune from the above case but will prevent unauthorized use of common-carrier
telecommunication service of facilities accessed through or connected to it. The manufacturer will not
be responsible for any charges that result from such unauthorized use.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly
causing harm or interruption in service to the telephone network, it should disconnect telephone
service until repair can be done. A telephone company may temporarily disconnect service as long as
repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the this phone or compatibility with the
network, the telephone company is required to give advanced written notice to the user, allowing the
user to take appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its authorized
agent. The user may not make any changes and/or repairs expect as specifically noted in this manual.
Therefore, note that unauthorized alternations or repair may affect the regulatory status of the system
and may void any remaining warranty.
E. Notice of Radiated Emissions
This model complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information
such as the following to the end user.
1. INTRODUCTION

1. INTRODUCTION
- 6 -
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly
different.
G. Interference and Attenuation
Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from
unsuppressed engines or electric motors may cause problems.
H. Electrostatic Sensitive Devices ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign.
Following information is ESD handling:
⍥Service personnel should ground themselves by using a wrist strap when exchange system boards.
⍥When repairs are made to a system board, they should spread the floor with anti-static mat which is
also grounded.
⍥Use a suitable, grounded soldering iron.
⍥Keep sensitive parts in these protective packages until these are used.
⍥When returning system boards or parts like EEPROM to the factory, use the protective package as
described.
1.3 Abbreviations
For the purposes of this manual, following abbreviations apply:
APC Automatic Power Control
BB Baseband
BER Bit Error Ratio
CC-CV Constant Current – Constant Voltage
DAC Digital to Analog Converter
DCS Digital Communication System
dBm dB relative to 1 milliwatt
DSP Digital Signal Processing
EEPROM Electrical Erasable Programmable Read-Only Memory
ESD Electrostatic Discharge
FPCB Flexible Printed Circuit Board
GMSK Gaussian Minimum Shift Keying
GPIB General Purpose Interface Bus
GSM Global System for Mobile Communications
IPUI International Portable User Identity
IF Intermediate Frequency
LCD Liquid Crystal Display
LDO Low Drop Output
LED Light Emitting Diode

1. INTRODUCTION
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OPLL Offset Phase Locked Loop
PAM Power Amplifier Module
PCB Printed Circuit Board
PGA Programmable Gain Amplifier
PLL Phase Locked Loop
PSTN Public Switched Telephone Network
RF Radio Frequency
RLR Receiving Loudness Rating
RMS Root Mean Square
RTC Real Time Clock
SAW Surface Acoustic Wave
SIM Subscriber Identity Module
SLR Sending Loudness Rating
SRAM Static Random Access Memory
PSRAM Paeudo SRAM
STMR Side Tone Masking Rating
TA Travel Adapter
TDD Time Division Duplex
TDMA Time Division Multiple Access
UART Universal Asynchronous Receiver/Transmitter
VCO Voltage Controlled Oscillator
VCTCXO Voltage Control Temperature Compensated Crystal Oscillator
WAP Wireless Application Protocol

2.1 H/W Features
2. PERFORMANCE
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2.PERFORMANCE
Item Feature Comment
Standard Battery Li-ion,820mAh
Size : (open) 121.2 X 45.5 X 21mm
(close) 97 X 45.5 X 21mm
Weight : 91g
Charging Time 3Hours
Display 128X160 pixel 65K STN LCD
ANT Internal
Ear Phone Jack Yes
PC synchronization Yes
Speech Coding EFR/FR/HR
Data and Fax Yes
Vibrator Yes
Loud Speaker Yes
Voice Recording Yes
C-mike Yes
Receiver Yes
Travel Adaptor Yes
Option Data Kit

2.2 Technical Specification
2. PERFORMANCE
- 9 -
Item Description Specification
GSM
⍥TX: 890 + n
X
0.2 MHz
⍥RX: 935 + n
X
0.2 MHz (n = 1 ~ 124)
EGSM
1Frequency Band ⍥TX: 890 + (n – 1024)
X
0.2 MHz
⍥RX: 935 + (n – 1024)
X
0.2 MHz (n = 975 ~ 1024)
DCS
⍥TX: 1710 + (n – 512)
X
0.2 MHz
⍥Rx: 1805 + (n – 512)
X
0.2 MHz (n = 512 ~ 885)
2Phase Error RMS < 5 degrees
Peak < 20 degrees
3Frequency Error < 0.1 ppm
GSM, EGSM
Level Power Toler. Level Power Toler.
533 dBm ± 2dB 13 17 dBm ± 3dB
631 dBm ± 3dB 14 15 dBm ± 3dB
729 dBm ± 3dB 15 13 dBm ± 3dB
827 dBm ± 3dB 16 11 dBm ± 5dB
925 dBm ± 3dB 17 9 dBm ± 5dB
10 23 dBm ± 3dB 18 7 dBm ± 5dB
11 21 dBm ± 3dB 19 5 dBm ± 5dB
4Power Level 12 19 dBm ± 3dB
DCS
Level Power Toler. Level Power Toler.
030 dBm ± 2dB 8 14 dBm ± 3dB
128 dBm ± 3dB 9 12 dBm ± 4dB
226 dBm ± 3dB 10 10 dBm ± 4dB
324 dBm ± 3dB 11 8 dBm ± 4dB
422 dBm ± 3dB 12 6 dBm ± 4dB
520 dBm ± 3dB 13 4 dBm ± 4dB
618 dBm ± 3dB 14 2 dBm ± 5dB
716 dBm ± 3dB 15 0 dBm ± 5dB

2. PERFORMANCE
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Item Description Specification
GSM, EGSM
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
600 ~ 󰶁1,200 -60
1,200 ~ 󰶁1,800 -60
1,800 ~ 󰶁3,000 -63
3,000 ~ 󰶁6,000 -65
5Output RF Spectrum 6,000 -71
(due to modulation) DCS
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
600 ~ 󰶁1,200 -60
1,200 ~ 󰶁1,800 -60
1,800 ~ 󰶁3,000 -65
3,000 ~ 󰶁6,000 -65
6,000 -73
GSM, EGSM
Offset from Carrier (kHz) Max. (dBm)
400 -19
600 -21
1,200 -21
6Output RF Spectrum 1,800 -24
(due to switching transient) GSM
Offset from Carrier (kHz) Max. (dBm)
400 -22
600 -24
1,200 -24
1,800 -27
7Spurious Emissions Conduction, Emission Status

2. PERFORMANCE
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Item Description Specification
GSM, EGSM
8Bit Error Ratio BER (Class II) < 2.439% @-102 dBm
DCS
BER (Class II) < 2.439% @-100 dBm
9RX Level Report Accuracy ± 3 dB
10 SLR 8 ± 3 dB
Frequency (Hz) Max.(dB) Min.(dB)
100 -12 -
200 0 -
300 0 -12
11 Sending Response 1,000 0 -6
2,000 4 -6
3,000 4 -6
3,400 4 -9
4,000 0 -
12 RLR 2 ± 3 dB
Frequency (Hz) Max.(dB) Min.(dB)
100 -12 -
200 0 -
300 2 -7
500 *-5
13 Receiving Response 1,000 0 -5
3,000 2 -5
3,400 2 -10
4,000 2
* Mean that Adopt a straight line in between 300 Hz
and 1,000 Hz to be Max. level in the range.
14 STMR 13 ± 5 dB
15 Stability Margin > 6 dB
dB to ARL (dB) Level Ratio (dB)
-35 17.5
-30 22.5
16 Distortion -20 30.7
-10 33.3
033.7
731.7
10 25.5
17 Side Tone Distortion Three stage distortion < 10%
18 System frequency (13 MHz) tolerance ≤2.5 ppm

2. PERFORMANCE
- 12 -
Item Description Specification
19 32.768KHz tolerance ≤30 ppm
Full power
< 243 mA (GSM, EGSM) ; < 209 mA (DVS)
20 Power Consumption
Standby
- Normal < 4 mA (Max. power)
21 Talk Time 2h 30m (RF power level 7)
At least 80 dB under below conditions:
22 Ringer Volume 1. Ringer set as ringer.
2. Test distance set as 50 cm
23 Charge Voltage Fast Charge : < 500 mA
Slow Charge: < 60 mA
Antenna Bar Number Power
5-85 dBm ~
4-90 dBm ~ -86 dBm
24 Antenna Display 3 -95 dBm ~ -91 dBm
2-100 dBm ~ -96 dBm
1-105 dBm ~ -101 dBm
0~-105 dBm
Battery Bar Number Voltage
0~3.62 V
25 Battery Indicator 1 3.62 ~ 3.73 V
23.73 ~ 3.82 V
33.82 V ~
26 Low Voltage Warning 3.62 ± 0.03 V (Call)
3.5 ± 0.03 V (Standby)
27 Forced shut down Voltage 3.35 ± 0.03 V
1 Li-ion Battery
Standard Voltage = 3.7 V
28 Battery Type Battery full charge voltage = 4.2 V
Capacity : 820mAh
Switching-mode charger
29 Travel Charger Input : 100 ~ 240 V, 50/60 Hz
Output : 5.2 V, 600 mA

3. TECHNICAL BRIEF
- 13 -
3.1 Transceiver (SI4205-BM, U402)
The RF parts consist of a transmitter part, a receiver part, a frequency synthesizer part, a voltage
supply part, and a VCTCXO part.
The Aero I transceiver is the integrated RF front end for multi-band GSM/GPRS digital cellular
handsets and wireless data modems. The integrated solution eliminates the IF SAW filter, external low
noise amplifier (LNAs) for three bands, transmit and RF voltage controlled oscillator (VCO modules),
and other discrete components found in conventional designs.
(1) Receiver part
The Aero I transceiver uses a low-IF receiver architecture which allows for the on
chip integration of the channel selection filters, eliminating the external RF image reject
filters and the IF SAW filter required in conventional superheterodyne architectures.
A. RF front end
RF front end consists of Antenna Switch(FL401), two SAW Filters(FL402, FL403)
and dual band LNAs integrated in transceiver (U402).
The Received RF signals(GSM 925MHz ~ 960MHz, DCS 1805MHz ~ 1880MHz) are
fed into the antenna or Mobile switch.
The Antenna Switch(FL401) is used to control the Rx and Tx paths. And, the input
signals VC1 and VC2 of a FL401 are directly connected to baseband controller to switch
either Tx or Rx path on.
The logic and current is given below Table 3-1.
3. TECHNICAL BRIEF
Figure 3-1 Block Diagram of SI4205

3. TECHNICAL BRIEF
- 14 -
Three differential-input LNAs are integrated in SI4205. The GSM input supports the GSM 850 (869-
849 MHz) or E-GSM 900 (925-960MHz) bands. The DCS input supports the DCS 1800 (1805-1880
MHz) band. The PCS input supports the PCS 1900 (1930-1990 MHz) band.
The LNA inputs are matched to the 150Ωbalanced output SAW filters through external LC matching
networks. The LNA gain is controlled with the LNAG[1:0] and LNAC[1:0] bits in register 05h (Figure 3-
2).
B. Intermediate frequency (IF) and Demodulation
A quadrature image-reject mixer downconverts the RF signal to a 100KHz intermediate frequency (IF)
with the RFLO from the frequency synthesizer. The RFLO frequency is between 1737.8 to 1989.9
MHz, and is internally divided by 2 for GSM 850 and E-GSM 900 modes. The mixer output is amplified
with an analog programmable gain amplifier (PGA), which is controlled with the AGAIN[2:0] bits in
register 05h (Figure3-2). The quadrature IF signal is digitized with high resolution A/D converters
(ADCs).
The ADC output is downconverted to baseband with a digital 100KHz quadrature LO signal. Digital
decimation and IIR filters perform channel selection to remove blocking and reference interference
signals. The selectivity setting (CSEL=0) or a low selectivity setting (CSEL=1). The low selectivity filter
has a flatter group channelization filter is in the baseband chip. After channel selection, the digital
output is scaled with a digital PGA, which is controlled with the DGAIN [5:0] bits in register 05h.
The amplified digital output signal go through with DACs that drive a differential analog signal onto the
RXIP,RXIN,RXQP and RXQN pins to interface to standard analog ADC input baseband ICs. No
VC1 VC2 Current
DCS TX OV 2.5 ~ 3.0V 10.0 mA max
GSM TX 2.5 ~ 3.0V 0V 10.0 mA max
GSM/DCS RX 0V 0V < 0.1 mA
Table 3-1 The Logic and current
Figure 3-2 Block Diagram of Receiver part of SI4205

3. TECHNICAL BRIEF
- 15 -
special processing is required in the baseband for offset compensation or extended dynamic range.
Compared to a direct-conversion architecture, the low-IF architecture has a much greater degree of
immunity to dc offsets that can arise from RF local oscillator(RFLO) self-mixing, 2nd order distortion of
blockers, and device 1/f noise.
(2) Transmitter part
The transmit (Tx) section consists of an I/Q baseband upconverter, and offset phase-locked loop
(OPLL) and two output buffers that can drive external power amplifiers (PA), one for the GSM 850
(824-849 MHz) and E-GSM 900 (880-915 MHz) bands and one for the DCS 1800 (1710-1785 MHz)
and PCS 1900 (1850-1910MHz) bands.
A. IF Modulator
The baseband converter(BBC) within the GSM chipset generates I and Q baseband signals for the
Transmit vector modulator. The modulator provides more than 40dBc of carrier and unwanted
sideband rejection and produces a GMSK modulated signal. The baseband software is able to cancel
out differential DC offsets in the I/Q baseband signals caused by imperfections in the D/A converters.
The Tx-Modulator implements a quadrature modulator. A quadrature mixer upconverts the differential
in-phase (TXIP, TXIN) and quadrature (TXQP, TXQN) signals with the IFLO to generate a SSB IF
signal that is filtered and used as the reference input to the OPLL.
The IFLO frequency is generated between 766 and 896 MHz and internally divided by 2 to generate
the quadrature LO signals for the quadrature modulator, resulting in an IF between 383 and 448 MHz.
For the E-GSM 900 band, two different IFLO frequencies are required for spur management.
Therefore, the IF PLL must be programmed per channel in the E-GSM 900 band.
B. OPLL
The OPLL consists of a feedback mixer, a phase detector, a loop filter, and a fully integrated TXVCO.
The TXVCO is centered between the DCS 1800 and PCS 1900 bands, and its output is divided by 2
for the GSM 850 and E-GSM 900 bands. The RFLO frequency is generated between 1272 and 1483
MHz. To allow a single VCO to be used for the RFLO, high-side injection is used for the GSM 850 and
E-GSM 900 bands, and low-side injection is used for the DCS 1800 and PCS 1900 bands. The I and Q
Figure 3-3 Block Diagram of Transmitter part of SI4205

3. TECHNICAL BRIEF
- 16 -
signals are automatically swapped when switching bands. Additionally, the SWAP bit in register 03h
can be used to manually exchange the I and Q signals.
Low-pass filters before the OPLL phase detector reduce the harmonic content of the quadrature
modulator and feedback mixer outputs. The cutoff frequency of the filters is programmable with the
FIF[3:0] bits in register 04h (Figure 3-3), and should be set to the recommended settings detailed in
the register description.
(3) Frequency Synthesizer
The Aero I transceiver integrates two complete PLLs including VCOs, varactors, resonators, loop
filters, reference and VCO dividers, and phase detectors. The RF PLL uses two multiplexed VCOs.
The RF1 VCO is used for receive mode, and the RF2 VCO is used for transmit mode. The IF PLL is
used only during transmit mode. All VCO tuning inductors are also integrated. The IF and RF output
frequencies are set by programming the N-Divider registers, NRF1, NRF2 and NIF. Programming the
N-Divider register for either RF1 or RF2 automatically selects the proper VCO. The output frequency of
each PLL is as follows:
fout = N x f•ı
The DIV2 bit in register 31h controls a programmable divider at the XIN pin to allow either a 13 or 26
MHz reference frequency. For receive mode, the RF1 PLL phase detector update rate (f•ı) should be
programmed f•ı= 100 kHz for DCS 1800 or PCS 1900 bands, and f•ı= 200 kHz for GSM 850 and E-
GSM 900 bands. For transmit mode, the RF2 and IF PLL phase detector update rates are always
f•ı=200 kHz.
Figure 3-4 Block Diagram of Frequency Synthesizer part of SI4205

3. TECHNICAL BRIEF
- 17 -
3.2 Power Amplifier Module (RF3133, U401)
The RF3133 is a high-power, high-efficiency power amplifier module with integrated power control.
The device is self-contained with 50Ωinput and output terminals. The power control function is also
incorporated, eliminating the need for directional couplers, detector diodes, power control ASICs and
other power control circuitry; this allows the module to be driven directly from the DAC output.
The device is designed for use as the final RF amplifier in GSM 850, E-GSM 900, DCS and PCS
handheld digital cellular equipment and other applications in the 824-849 MHz, 880-915 MHz, 1710-
1785 MHz, and 1850-1910 MHz bands.
On-board power control provides over 37 dB of control range with an analog voltage input
(TX_RAMP); and, power down with a logic “low” for standby operation (TX_ENABLE).
External control (BAND_SELECT) is used to select the GSM or DCS band with a logic high or low. A
logic low enables the GSM band whereas a logic high enables the DCS band.
Figure 3-5 Functional Block Diagram of RF3133

3. TECHNICAL BRIEF
- 18 -
3.3 13 MHz Clock
The 13 MHz clock(X401) consists of a TCXO(Temperature Compensated Crystal Oscillator) which
oscillates at a frequency of 13 MHz. It is used within the Si4205, analog base band
chipset(U102,AD6521), digital base band chipset(U101, AD6525), and MIDI (U204) chipset.
3.4 Power Supplies for RF Circuits
Two regulators are used for RF circuits. One is MIC5255 (U410), and the other is one port of ADP3522
(U202).
MIC5255 (U410) supplies power to transceiver (SI4205, U402).One port of ADP3522 supplies power
to VCTCXO (X401).
Main power (VBAT) from battery is used for PAM (RF3133, U401) because PAM requires high power.
(1608)
GND 2
OUT
3
4VCC
VCONT 1
X401
13MHz
2V75_VTCXO
1000p
C434
C437
2.2u
15K
R413R412
100 AFC
Figure 3-6 VCTCXO circuit diagram
VBAT
C457
10u
BYP
43
EN
2
GND
IN 1 OUT
5
MIC5255-2.85BM5
U410
C438
0.01u
10u
C456
RF2.85V
R489
6.8K
CLK_ON
Figure 3-7 U410 circuit diagram
Supplier Voltage Powers enabled signal
U410 2.85 V U402 CLK_ON
U202 2.75 V X401
Battery 3.4 ~ 4.2 V U401
Table 3-2 Power suppliers for RF circuits.

3. TECHNICAL BRIEF
- 19 -
3.5 Digital Main Processor (AD6525, U101)
(1) Architecture Overview
The internal architecture of AD6525 is shown in Figure 3-8. AD6525 regroups three main subsystems
connected together through a dynamic and flexible communication by network. It also includes
onboard system RAM (SRAM) and interfaces with external Flash Memory, Baseband converter
functions, and terminal functions like MMI, SIM and Universal System Connector (USC).
The Digital Signal Processing (DSP) subsystem primarily hosts all the speech processing, channel
equalization and channel codec functions. The code used to implement such functions can be stored
in external Flash Memory and dynamically downloaded on demand into the DSP’s program RAM and
Instruction Cache.
The microcontroller subsystem supports all the GSM terminal software, including the layer 1, 2 and 3
of the GSM protocol stack, the MMI, and applications software such as data services, test and
maintenance. It is tightly associated with on-chip system SRAM and also includes boot ROM memory
with a small dedicated routine to facilitate the initialization of the external Flash Memory via code
download using the on-chip serial interface to the external Flash Memory interface.
The peripheral subsystem is composed of system peripherals such as interrupt controller, real time
clock, watch dog timer, power management and a timing and control module. It also includes
peripheral interfaces to the terminal functions: keyboard, battery supervision, radio and display. Both
the DSP and the MCU can access the peripheral subsystem via the peripheral bus (PBUS).
Figure 3-8 Block Diagram of the AD6525 Internal Architecture

3. TECHNICAL BRIEF
- 20 -
For program and data storage, both the MCU subsystem and the DSP subsystem can access the on
chip system SRAM and external memory such Flash Memory. The access to the SRAM module is
made through the RAM Bus (RBUS) under the control of the bus arbitration logic. Similarly, access to
the Flash Memory is through the parallel External Bus (EBUS).
Figure 3-9 Example of System Interconnection of AD6525 External Interfaces

3. TECHNICAL BRIEF
- 21 -
(2) Interconnection with external devices
A. RTC Block Interface
Countered by external crystal oscillator (MC-146, X101).
The X-tal oscillates 32.768 KHz.
B. LCD Module Interface
Controlled by LCD_CS, LCD_RES, ADD01, WR, DATA[0:15], DIM_CNTL, and LCD_ID.
C. RF Interface
The AD6525 control RF parts through RF_EN, ANT_SW1/2, PA_EN, PA_BAND, RF_PWR_DWN,
S_EN, S_DATA, AND S_CLK.
Description
LCD_CS LCD driver chip enable. LCD driver IC has own CS pin
LCD_RES This pin resets LCD module.
ADD01
This pin determines whether the data to LCD module are
display data or control data. ADD1 can select 16 bit parallel
bus. ADD1 is also used to address flash memory.
WR Write control.
DATA[0:15] Parallel data lines. Color LCD driver chip uses the 16 bit data
interface.
LCD_BL Control signal for white LED(LCD backlight) driver IC.
LCD_ID Reserved for future use.
Table 3-3 LCD module interface
GPO Signal Name Description
4RF_EN RF Enable / Disable
9ANT_SW1 Antenna Switch Band Select
11 ANT_SW2 Antenna Switch Band Select
16 PA_EN PAM Enable / Disable
17 PA_BAND PAM Band Select
18 RF_PWR_DWN Power Down Input
19 S_EN Serial Enable Input
20 S_DATA Serial Data Input
21 S_CLK Serial Clock Input
Table 3-4 RF interface