LG T5100 User manual

Service Manual Model : T5100
Service Manual
T5100
P/N : Date: June, 2004 / Issue 1.0

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* The information in this manual is subject to change without notice and should not be construed as a
commitment by LGE Inc. Furthermore, LGE Inc. reserves the right, without notice, to make changes
to equipment design as advances in engineering and manufacturing methods warrant.
* This manual provides the information necessary to install, program, operate and maintain the T5100.
REVISED HISTORY
DATE ISSUE CONTENTS OF CHANGES S/W VERSION
May / 2004 ISSUE 1 Initial Release

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1. PERFORMANCE..................................... 6
1.1 H/W Feature ............................................ 6
1.2 Technical Specification ........................... 7
2. TECHNICAL BRIEF ............................ 12
2.1 General Description .............................. 12
2.2 Receiver Part ........................................ 12
2.2.1. RF Front End .............................. 13
2.2.2 Demodulator and base-band
processing .................................... 13
2.3 Synthesizer Part .................................... 13
2.4 Transmitter Part .................................... 14
2.4.1 IF Modulator ................................. 15
2.4.2 OPLL ............................................ 15
2.4.3 Power Amplifier Module ............... 16
2.5 26MHz Clock ......................................... 17
2.6. Power Supplies [LDO] .......................... 17
2.7 Digital Baseband ................................... 18
A. General Description .......................... 18
B. Block Description .............................. 18
C. External Devices connected to
memory interface .............................. 20
D. RF Interface (TPU, TSP block) ......... 20
E. SIM interface .................................... 20
F. UART Interface ................................. 21
G. GPIO Map ........................................ 22
2.8 Analog Baseband .................................. 23
A. General Description .......................... 23
B. Audio Signal Processing & Interface
........................................................... 23
C. Baseband Codec(BBC) .................... 24
D. Voltage Regulation(VREG) .............. 24
E. ADC Channels .................................. 26
F. Switch ON/OFF ................................. 26
G. Memories ......................................... 26
2.9 USB ....................................................... 27
2.10 DSP (For Video related process) ........ 27
A. General Description .......................... 27
B. Power circuit ..................................... 27
C.External Memory Interface ................ 28
D.Video Interface .................................. 28
E. External Audio Codec Interface ........ 29
F. DSP Pin description .......................... 30
G. LCD module pin description ............. 32
H.Camera module pin description ......... 33
I. Keypad Connector pin description ..... 34
3. BASEBAND PART TROUBLE
SHOOTING
.................................................................... 36
3.1 Main PCB side components - 1 ............. 36
3.2 Main PCB side components - 2.............. 37
3.3 Keypad side components ...................... 39
3.4 Power-On Trouble ................................. 40
3.5 Charging Trouble .................................. 40
3.6 LCD Display Trouble ............................. 43
3.7 Speaker/Receiver Trouble .................... 46
3.8 Microphone Trouble .............................. 51
3.9 Earphone Trouble ................................. 52
3.10 Vibrator Trouble .................................. 56
3.11 Keypad Backlight Trouble ................... 58
3.12 Folder On/Off and Trouble .................. 60
3.13 SIM Detect Trouble ............................. 63
3.14 Camera Trouble ................................... 65
3.15 Camera Flash Trouble ......................... 67
3.16 Infrared Data Association Trouble........ 69
4. RF PART TROUBLESHOOTING
.................................................................... 71
4.1 RF Components ..................................... 71
4.2 Trouble Shooting of Receiver Part ......... 72
4.2.1 Checking LDO Circuit .................. 73
4.2.2 Checking VCTCXO Circuit ........... 74
4.2.3 Checking RF Chipset Control
Signal ........................................... 75
4.2.4 Checking Mobile S/W and FEM
Circuit ........................................... 76
4.2.5 Checking Rx IQ Circuit ................. 78
4.3 Trouble Shooting Transmitter Part ......... 79
4.3.1 Checking LDO Circuit .................. 80
4.3.2 Checking VCTCXO circuits .......... 80
Table Of Contents

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4.3.3 Checking RF Chipset Control
Signals ......................................... 80
4.3.4 Checking Tx IQ signals ................ 81
4.3.5 Check PAM circuits ...................... 82
4.3.6 Checking Mobile S/W & FEM
circuits .......................................... 83
5. DISASSEMBLY INSTRUCTION .... 84
5.1 Disassembly .......................................... 84
6. Download ...................................... 99
6.1 Download Setup .................................... 99
6.1.1 In case of using the Data kit ......... 99
6.1.2 In case of using the PIF ............... 99
6.2 Download Procedure ........................... 100
6.3 T5100 Multimedia Chip Download ...... 107
7. Service and Calibration .............. 113
7.1 Service S/W ........................................ 113
7.1.1 Overview .................................... 113
7.1.2 Hardware and Software
Environment ............................... 113
7.1.3 Software Installation ................... 113
7.1.4 Common Properties of Service
Software ..................................... 113
7.2 Calibration ........................................... 116
7.2.1 Overview .................................... 116
7.2.2 Equipment List ........................... 116
7.2.3 Equipment Setup ....................... 117
7.2.4 Calibration steps ........................ 117
7.2.5 Test JIG Operation ..................... 120
8. CIRCUIT DIAGRAM ..................... 121
8.1 RF Interface ........................................ 122
8.2 Baseband Interface ............................. 123
8.3 LCD Connector, Camera Connector,
Keypad Connector .............................. 124
8.4 DSP ..................................................... 125
8.5 Memory Interface, USB interface ........ 126
8.6 MIDI, Audio ......................................... 127
8.7 I/O Receptacle, USB Interface, IrDA
Interface .............................................. 128
8.8 Keypad ................................................ 128
9. PCB LAYOUT ...................................... 129
9.1 Main Top ............................................. 129
9.2 Main Bottom ........................................ 130
9.3 Keypad Top ......................................... 131
9.4 Keypad Bottom .................................... 132
10. ENGINEERING MODE ................... 133
11. STANDALONE TEST ...................... 135
11.1 Setting Method ................................ 135
11.1.1 COM Port ............................. 135
11.1.2 Tx Test ................................. 135
11.1.3 Rx Test ................................. 135
12. EXPLODED VIEW &
REPLACEMENT PART LIST ....... 136
12.0 EXPLODED VIEW .......................... 136

1. PERFORMANCE
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1.1 H/W Feature
1. PERFORMANCE
Item Feature Comment
Standard Battery Li-ion, 950mAh
AVG TCVR Current 240mA
Standby Current < 4.5mA
Talk time 4.8hours (GSM TX Level 7)
Standby time 260 hours (Paging Period:9, RSSI: -85dBm)
Charging time 2.5 hours
RX Sensitivity GSM900 : -105dBm, DCS : -105dBm
TX output power GSM, EGSM: 33dBm (Level 5)
DCS : 30dBm (Level 0)
GPRS compatibility Class 10
SIM card type 3V Small
Display 176 x 220 TFT LCD(main)
96 x 96 TFT LCD(sub)
Soft icons
Keypad
Status Indicator 0 ~ 9, #, *, Navigation Key, Up/Down Side
Key, Shutter Side Key, Confirm Key,
Clear Key, Send Key, END/PWR Key
ANT Internal
EAR Phone Jack 4 pole earphone jack
PC Synchronization Yes
Speech coding EFR/FR/HR
Data and Fax Yes
Vibrator Yes
Buzzer No
Voice Recording Yes
C-Mic Yes
Receiver Yes
Travel Adapter Yes
Options Hands-free kit, CLA, Data Kit

1. PERFORMANCE
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1.2 Technical Specification
Item Description Specification
GSM900
TX: 890 + n x 0.2 MHz (n=1 ~ 124)
890 + (n-1024) x 0.2 MHz (n=975 ~ 1023)
RX: TX + 45 MHz
1Frequency Band
DCS1800
TX: 1710 + ( n-511 ) x 0.2 MHz (n = 512 ~ 885)
RX: TX + 95 MHz
2Phase Error RMS < 5 degrees
Peak < 20 degrees
3Frequency Error < 0.1ppm
GSM900
Level Power Toler. Level Power Toler.
533 dBm ᴦ2dB 13 17 dBm ᴦ3dB
631 dBm ᴦ3dB 14 15 dBm ᴦ3dB
729 dBm ᴦ3dB 15 13 dBm ᴦ3dB
827 dBm ᴦ3dB 16 11 dBm ᴦ5dB
925 dBm ᴦ3dB 17 9 dBm ᴦ5dB
10 23 dBm ᴦ3dB 18 7 dBm ᴦ5dB
11 21 dBm ᴦ3dB 19 5 dBm ᴦ5dB
12 19 dBm ᴦ3dB
4Power Level DCS1800
Level Power Toler. Level Power Toler.
030 dBm ᴦ2dB 8 14 dBm ᴦ3dB
128 dBm ᴦ3dB 9 12 dBm ᴦ4dB
226 dBm ᴦ3dB 10 10 dBm ᴦ4dB
324 dBm ᴦ3dB 11 8 dBm ᴦ4dB
422 dBm ᴦ3dB 12 6 dBm ᴦ4dB
520 dBm ᴦ3dB 13 4 dBm ᴦ4dB
618 dBm ᴦ3dB 14 2 dBm ᴦ5dB
716 dBm ᴦ3dB 15 0 dBm ᴦ5dB

1. PERFORMANCE
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Item Description Specification
GSM900
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
600~ <1,200 -60
1,200~ <1,800 -60
1,800~ <3,000 -63
3,000~ <6,000 -65
5Output RF Spectrum 6,000 -71
(due to modulation) DCS1800
Offset from Carrier (kHz). Max. dBc
100 +0.5
200 -30
250 -33
400 -60
600~ <1,200 -60
1,200~ <1,800 -60
1,800~ <3,000 -65
3,000~ <6,000 -65
6,000 -73
GSM900
Offset from Carrier (kHz) Max. (dBm)
400 -19
600 -21
Output RF Spectrum
1,200 -21
6(due to switching transient) 1,800 -24
DCS1800
Max. (dBm) Max. (dBm)
400 -22
600 -24
1,200 -24
1,800 -27

1. PERFORMANCE
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Item Description Specification
7Spurious Emissions Conduction, Emission Status
Conduction, Emission Status
GSM900
8Bit Error Ratio BER (Class II) < 2.439% @-102dBm
DCS1800
BER (Class II) < 2.439% @-102dBm
9Rx Level Report accuracy ᴦ3 dB
10 SLR 8 ᴦ3 dB
Frequency (Hz) Max.(dB) Min.(dB)
100 -12 /
200 0 /
300 0 -12
11 Sending Response 1,000 0 -6
2,000 4 -6
3,000 4 -6
3,400 4 -9
4,000 0 /
12 RLR 2 ᴦ3 dB
Frequency (Hz) Max.(dB) Min.(dB)
100 -12 /
200 0 /
300 2 -7
500 *-5
13 Receiving Response 1,000 0 -5
3,000 2 -5
3,400 2 -10
4,000 2
*Meanthat Adopt a straight line in between 300 Hz
and 1,000 Hz to be Max. level in the range.
14 STMR > 17 dB
15 Stability Margin > 6 dB

1. PERFORMANCE
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Item Description Specification
dB to ARL (dB) Level Ratio (dB)
-35 17.5
-30 22.5
-20 30.7
16 Distortion -10 33.3
033.7
731.7
10 25.5
17 Side tone Distortion Three stage distortion < 10%
18 <Change> System frequency ᴪ2.5 ppm
(13 MHz) tolerance
19 <Change>32.768KHz tolerance ᴪ30ppm
Standby
20 Power consumption - Normal ,ᴪ4.5mA(Mix. power)
21 Talk Time GSM900/Lvl 7 (Battery Capacity 950mA): 288 min
GSM900/Lvl 12(Battery Capacity 950mA): 490 min
Under conditions, at least 250 hours:
1. Brand new and full 950mAh battery
2. Full charge, no receive/send and keep GSM in idle
22 Standby Time mode.
3. Broadcast set off.
4. Signal strength display set at 3 level above.
5. Backlight of phone set off.
At least 65 dB under below conditions:
23 Ringer Volume 1. Ringer set as ringer.
2. Test distance set as 50 cm
24 Charge Current Fast Charge : < 550 mA
Slow Charge: < 100 mA
Antenna Bar Number Power
5–85 dBm ~
25 Antenna Display 4–90 dBm ~ –86 dBm
3–95 dBm ~ –91 dBm
2–100 dBm ~ –96 dBm
1–105 dBm ~ –101 dBm
0~–105 dBm

1. PERFORMANCE
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Item Description Specification
Battery Bar Number Power
03.62V.
26 Battery Indicator 13.68V.
23.74V.
33.87V.
43.88V.ᴦ0.03V
3.62V.ᴦ0.03V (Call)
27 Low Voltage Warning 3.5V.ᴦ0.03V (Standby)
28 Forced shut down Voltage 3.35V ᴦ0.03 V
1 Li-ion Battery
29 Battery Type Standard Voltage = 3.7V
Battery full charge voltage = 4.2V
Capacity: 950mAh
Switching-mode charger
30 Travel Charger Input: 100 ~ 240 V, 60Hz
Output: 5.2V, 800mA

2. TECHNICAL BRIEF
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2.1 General Description
The RF part consists of a transmitter, a receiver, a synthesizer, a voltage supply and a VCTCXO
part. And the main RF Chipset TRF6151 [U702] is a single-chip triple-band transceiver for the
extended global system for mobile communication [GSM900MHz] /Digital communication
system [DCS1800MHz] voice and data transfer applications.
This device integrated direct conversion receive architecture, a transmitter based on a modulation loop
architecture and fractional-N synthesizer part with built in TXVCO and Local-VCO.
2.2 Receiver Part
The Receiver part in TRF6151 [U702] contains all active circuits completely, full receiver chain with the
exception of discrete front-end RF SAW filters. The filtered and amplified signal is down converted in
the RF-mixer to the base-band output. The receive path is supported by internal channel filtering.
2. TECHNICAL BRIEF
N
divider
FL700
FEM
SW404
Mobile
Switch
26MHz
U702
TRF6151
X700
VC-TCXO
LNA
:2/:4
R div.
DCS/PCS Tx
EGSM Tx
DCS
GSM900
PCS
I
Q
Fig 1. Receiver Part Block Digram

2. TECHNICAL BRIEF
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2.2.1. RF Front End
Antenna switch and dual saw filters are integrated in FEM (FL700).
The Received RF signals (GSM 925MHz ~ 960MHz, DCS 1805MHz ~ 1880MHz) are fed into the
antenna and Mobile switch. An antenna matching circuit is between the antenna and the mobile
switch. The Antenna Switch in FEM (FL700) is used to control the Rx and Tx paths. And, the input
signals VC1, VC2 and VC3 of FEM are directly connected to base-band controller to switch either Tx
or Rx path on. FEM (FL700) supports for dualFEM control logics given below Table 3.1
The receiver part uses a direct conversion receiver architecture that allows for the on-chip integration
of the DC offset compensation system, eliminating DC offset from the demodulated signal.
The TRF6151 integrates dual differential input LNAs that are matched to the 100 ohm in EGSM and
100 ohm in DCS balanced-output SAW filters through external LC matching networks.
2.2.2 Demodulator and base-band processing
In direct conversion receiver there is only one mixer down-converting received RF signal to BB signal
directly. TRF6151 has 4 Gain steps. Front end and VGA high gain mode is 66dB, Front-end
intermediate Gain and VGA high gain mode is 60dB, Front-end low gain and VGA high gain mode is
46dB, Front-end and VGA low gain mode is 20dB.
The Rx gain setting is done in the AGC algorithm. The nominal gain of the receiver is set as a function
of the expected signal strength at the antenna input so that a desired level is reached at the Rx I/Q.
The receiver chain in TRF6151 has variable gain parts, LNA, Mixer, LPF, VGA, VGA Filter, Auxiliary
gain control and VGA. The gain settings can be adjustable via 3-wire bus control lines. The base-band
signals pass via integrated low-pass filters to the base-band A/D converters.
The remainder of the channel filtering is performed by the baseband chipset. The demodulator
contains switches to maintain the sense of the baseband I/Q outputs with respect to the incoming RF
signal on EGSM900 and DCS1800.
2.3 Synthesizer Part
The RF main chipset includes a fully integrated VCO with an on-chip LC tank. A fractional-N
synthesizer can phase lock the local oscillator used in both transmit and receive path to a precision
frequency reference input.
The fractional-N operation offers low phase noise and fast setting times, allowing for multiple slot
applications such as GPRS. The counter and mode settings of the synthesizer are also programmed
via 3-wire interface.
Switch Mode VC1 VC2 VC3
EGSM Tx High Low Low
EGSM/DCS RX Low Low Low
DCS TX Low High High
Table 1. Control Logics

2. TECHNICAL BRIEF
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2.4 Transmitter Part
The Transmitter part contains OPLL parts of RF Main Chipset [TRF6151, U702], Power Amplifier
Module [SKY77325, U709] and Front-End Module [SHS-L090SF, FL700]. The transmit section of RF
Main Chipset [TRF6151, U702] consists of an I/Q base-band up-converter, an offset phase-locked
loop [OPLL]. The RF GMSK outputs from the transmit VCO are fed directly to the RF power amplifier
modules.
The peak output power and the profile of the transmitted burst are controlled by means of incorporated
power control circuits inside of PA and DAC output from the Baseband Controller. The PA outputs
pass to the antenna connector via Front-End Module [SHS-L090SF, FL700].
Fig 2. Block Diagram of Synthesizer Part
Dual
Dual
GSM900
LNA 900
Figure 3. FEM Block Diagram

2. TECHNICAL BRIEF
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2.4.1 IF Modulator
The Baseband Converter (BBC) within the Analog Baseband Chipset [TWL3014, U101] generates I/Q
baseband signals for the transmit vector modulator. The Tx-modulator implements a quadrature
modulator. A quadrature mixer up-converts the differential baseband I/Q signals with the IFLO to
generate a IF signal, which signal is filtered and used as the reference input to the OPLL. The IFLO is
divided by two to generate the quadrature LO signals for the quadrature modulator.
2.4.2 OPLL
The OPLL consists of a feedback mixer, a phase detector, a loop filter, and two fully integrated Tx-
VCOs, one is a low band VCO for GSM band and another is a high band VCO for DCS band. The RF
Main Chipset generates the RFLO signal with Main VCOs. The MAINVCO1 is used for GSM900,
DCS1800900.
Low-pass filters before the OPLL phase detect or reduce the harmonic content of the quadrature
modulator and feedback mixer outputs. The cutoff frequency of the filters is programmable with
register setting, which register is contained in the RF main chipset and set with a serial communication
port of the RF main chipset.
The OPLL requires no external duplexer to attenuate transmitter noise and spurious signals in the
receive band.
Additionally, the output of the transmit VCO (TXVCO) is a constant-envelope signal which reduces the
problem of spectral spreading caused by non-linearity in the PA.
Figure 4. Block Diagram of IF Modultaor

2. TECHNICAL BRIEF
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2.4.3 Power Amplifier Module
The Power Amplifier Module [SKY77325, U709] is a dual-band GSM/DCS power amplifier module that
incorporates an indirect closed loop method of power control.
The indirect closed loop is fully self-contained and it does not require loop optimization. It can be
driven directly from the DAC output in the baseband circuit.
On-board power control provides over 37 dB of control range with an analog voltage input [VAPC].
Efficiency is about 53% at GSM and about 53% at DCS.
GSM900
Figure 5. Block Diagram of OPLL
DCS
DCS OUT
GSM 900 OUT
GSM 900 IN
Figure 6. Internal Functional Block Diagram

2. TECHNICAL BRIEF
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2.5 26MHz Clock
The 26MHz clock [X700] consists of a VCTCXO [Voltage Controlled Temperature Compensated
Crystal Oscillator], which oscillates at a frequency of 26 MHz. It is used within the RF Main Chip
[TRF6151, U702], ABB [IOTA, U101], DBB [CALYPSO, U100].
2.6 Power Supplies [LDO]
An external LDO [U704] is used to provide DC power to VCTCXO [X700], Buffer [U703] which is used
for buffering FEM control signals from DBB and the RF Main Chip [TRF6151, U702]
Figure 7. Schematic of PAM circuit
Figure 8. Schematic of VCTCXO circuit
Figure 9. Schematic of LDO circuit

2. TECHNICAL BRIEF
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2.7 Digital Baseband
A. General Description
CALYPSO is a chip implementing the digital base-band processes of a GSM/GPRS mobile phone.
This chip combines a DSP sub-chip (LEAD2 CPU) with its program and data memories, a Micro- -
Controller core with emulation facilities (ARM7TDMIE), internal 8Kb of Boot ROM memory, 4M bit
SRAM memory, a clock squarer cell, several compiled single-port or 2-ports RAM and CMOS gates.
The chip will fully support the Full-Rate, Enhanced Full-Rate and Half-Rate speech coding.
CALYPSO implements all features for the structural test of the logic (full-SCAN, BIST, PMT, JTAG
boundary-SCAN).
B. Block Description
CALYPSO architecture is based on two processor cores ARM7 and DSP using the generic RHEA bus
standard as interface with their associated application peripherals.
CALYPSO is composed from the following blocks:
ARM7TDMIE : ARM7TDMI CPU core
DSP subchip
ARM peripherals:
General purpose peripherals
ARM Memory Interface for external RAM, Flash or ROM
4 Mbit Static RAM with write-bufferns
Figure 10. Top level block diagram of the Calypso G2

2. TECHNICAL BRIEF
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Application peripherals
ARM General purposes I/O with keyboard interface and two PWM modulation signals
UART 16C750 interface (UART_IRDA) with
- IRDA control capabilities (SIR)
- Software flow control (UART mode).
UART 16C750 interface (UART_MODEM) with
- hardware flow protocol (DCD, CTS/RTS)
- autobaud function
SIM Interface.
TPU(Time Processing Unit) : Processing for GSM time base
TSP(Time Serial Port) : GSM data interface with RF and ABB
Memory Interface : External/Internal Memory Interface
nCS0 : FLASH1-2, 16bit access, 3 wait state
nCS1 : FLAHS1-1, 16bit access, 3 wait state
nCS2 : FLASH2-1 16bit access, 3wait state
nCS3 : Ext PSRAM, 16bit access, 3 wait state
nCS4 : MIDI(8bit access), DSP(16bit access),USB(8bit) addressing( See Fig 11 )
nCS6 : Int SRAM, 32bit access, 0 wait state
✽Calypso is internally 39MHz machine (25ns machine cycle), so it requires 3 wait-state for 80ns
access(25✽4 =100 ns).
Figure 11. MIDI,DSP,USB Encoding block
_CS4 A(22) A(21) A(20)
MFI_CS 0 0 1 1
MIDI_CS 0 1 0 1
USB_CS 0 1 1 0

2. TECHNICAL BRIEF
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C. External Devices connected to memory interface
D. RF Interface (TPU, TSP block)
Calypso uses this interface to control IOTA(ABB Processor) and Rita(RF Processor) with GSM Time
Base
E. SIM interface
SIM interface scheme is shown in (Figure 12.).
SIM_IO, SIM_CLK, SIM_RST ports are used to communicate DBB via ABB with plugged sim card and
the Charge Pump in ABB enables 1.8V/3V SIM operation
Interface SPEC
Device Name Maker Write Access Read Access Time
Time
FLASH 1-1 AM50PDL193CHH66I AMD 70ns(min) 70ns(min)
FLASH 1-2 AM50PDL193CHH66I AMD 70ns(min) 70ns(min)
Pseudo-SRAM AM50PDL193CHH66I AMD 70ns(min) 70ns(min)
DSP SH Mobile V Renesas 80ns(max) 80ns(max)
Melody IC YMU762 Yamaha 50ns 80ns
USB IC USBN9604 N.S 80ns 80ns
LCD HD66784 RENESAS 150ns(max) 150ns(max)
Table 2. External Device Spec. connected to memory interface
TSP (Time Serial Port)
Resource Interconnection Description
TSPDO ABB & RF main Chip Control Data
TSPEN0 ABB ABB Control Data Enable Signal
TSPEN1 RF main Chip RF Control Data Enable Signal
TPU (Time Processing Unit) Parallel Port
TSPACT00 RESET_RF RF main Chip Reset Signal
TSPACT01 PA_ON Power Amp ON signal
Table 3. RF Interface Spec.

2. TECHNICAL BRIEF
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SIM_CLK : SIM Card reference clock
SIM_RST : SIM Card async/sync reset
SIM_IO : SIM Card bi-directional data line
F. UART Interface
T5100 two UART Drivers as follow :
- UART1 : Hardware Flow Control / Fax&Data Modem
- UART2 : S/W Debugger & IrDA Modem
UART MODEM(UART1)
Resource Name Remark
TX_MODEM TXD Transmit Data
RX_MODEM RXD Receive Data
CTS_MODEM CTS Clear To Send
RTS_MODEM RTS Request To Send
GPIO 3 DSR Data Set Ready
UART IRDA(UART2)
TXIR_IRDA TXIR_IRDA Infra-Red Transmit Pulse
TX_IRDA TX Transmit Data(UART2)
RXIR_IRDA RXIR_IRDA Infra-Red Receive Pulse
RX_IRDA RX Receive Data (UART2)
SD_IRDA SD_IRDA IrDA transceiver Shut Down Mode
Table 4. UART Interface Spec.
Figure 12. SIM Interface