LG 55LM9600 User manual

Printed in KoreaP/NO : MFL67460305 (1204-REV00)
CHASSIS : LA23E
MODEL : 55LM9600 55LM9600-UC
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
LED LCD TV
SERVICE MANUAL
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only

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CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION .............................................................. 10
EXPLODED VIEW .................................................................................. 18
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

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Only for training and service purposes
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩand 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
IMPORTANT SAFETY NOTICE
SAFETY PRECAUTIONS

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Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement .
1. Application range
This spec sheet is applied LCD TV with ( LA23E ) chassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 ºC ± 5 ºC (77±9 ºF ), CST : 40±5 ºC
2) Relative Humidity: 65 % ± 10 %
3) Power Voltage : Standard input voltage
(220~240V@ 60Hz)
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : UL, CSA, CE, IEC specification
- EMC: FCC, ICES, CE, IEC specification
- Wireless : WirelessHD Specification (Option)
4. General Specification
No Item Specication Remark
1 Market 1) North America
2 Broadcasting System 1) ATSC / NTSC
3 Receiving System 1) VSB/64 & 256 QAM/ NTSC-M
4 Input Voltage AC 100 ~ 240V 50/60Hz FHD + T120Hz
5 Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
6 Screen Size 47/55 inche Wide(1920 × 1080) 47/55LM9600-UC
7 Aspect Ratio 16:9
8 Tuning System FS
9 LCD Module LC470DUT-SEF1 LGD 47LM9600-UC
LC550DUT-SEF1 LGD 55LM9600-UC
10 Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
11 Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %

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5. External input format
5.1. 2D mode
5.1.1. Component input (Y, CB/PB, CR/PR)
5.1.2. RGB Input (PC)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1. 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
3. 720*480 31.50 60.00 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 1280*720 45.00 60.00 74.25 HDTV 720P
6. 1280*720 44.96 59.94 74.176 HDTV 720P
7. 1920*1080 33.75 60.00 74.25 HDTV 1080I
8. 1920*1080 33.72 59.94 74.176 HDTV 1080I
9. 1920*1080 67.50 60.00 148.50 HDTV 1080P
10. 1920*1080 67.432 59.94 148.352 HDTV 1080P
11. 1920*1080 27.00 24.00 74.25 HDTV 1080P
12. 1920*1080 26.97 23.94 74.176 HDTV 1080P
13. 1920*1080 33.75 30.00 74.25 HDTV 1080P
14. 1920*1080 33.71 29.97 74.176 HDTV 1080P
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1 640*350 31.468 70.09 25.17 EGA Х
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1360*768 47.712 60.015 85.50 VESA (WXGA) Х
7 1920*1080 67.5 60 148.8 WUXGA
(Reduced Blanking)
O

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5.1.3. HDMI Input 1 (PC/DTV)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
HDMI-PC
1 31.468 70.09 25.17 25.17 EGA Х
2 31.469 70.08 28.32 28.32 DOS O
3 31.469 59.94 25.17 25.17 VESA(VGA) O
4 37.879 60.31 40.00 40.00 VESA(SVGA) O
5 48.363 60.00 65.00 65.00 VESA(XGA) O
6 54.348 60.053 80.00 85.50 VESA O
7 63.981 60.020 108.00 108.00 VESA (SXGA) O
8 47.712 60.015 85.50 148.5 VESA (WXGA) O
9 1920*1080 67.5 60 148.5 WUXGA(Reduced Blanking) O
HDMI-DTV
1 720*480 31.50 60.00 27.027 SDTV 480P
2 720*480 31.47 59.94 27.00 SDTV 480P
3 1280*720 45.00 60.00 74.25 HDTV 720P
4 1280*720 44.96 59.94 74.176 HDTV 720P
5 1920*1080 33.75 60.00 74.25 HDTV 1080I
6 1920*1080 33.72 59.94 74.176 HDTV 1080I
7 1920*1080 67.50 60.00 148.50 HDTV 1080P
8 1920*1080 67.432 59.94 148.352 HDTV 1080P
9 1920*1080 27.00 24.00 74.25 HDTV 1080P
10 1920*1080 26.97 23.976 74.176 HDTV 1080P
11 1920*1080 33.75 30.00 74.25 HDTV 1080P
12 1920*1080 33.71 29.97 74.176 HDTV 1080P

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5.2. 3D mode
5.2.1. RF Input
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1920*1080 45 60 74.25 HDTV 1080I Side by Side (Half), Top & Bottom
2 1280*720 45 60 74.25 HDTV 720P Side by Side (Half), Top & Bottom
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Remark
1 1280*720p 45.00 60.00 74.25 Side by Side (Half) , Top & Bottom,
Single Frame Sequential
2 1920*1080i 33.75 60.00 74.25 Side by Side (Half) , Top & Bottom
3 1920*1080p 67.50 60.00 148.50 Side by Side (Half) , Top & Bottom
Checkerboard, Single Frame Sequential
Row Interleaving, Column Interleaving
4 1920*1080p 27.00 24.000 74.25 Side by Side (Half) , Top & Bottom
Checkerboard
5 1920*1080p 33.75 30.000 74.25 Side by Side (Half), Top & Bottom
Checkerboard
5.2.6. HDMI 1.3(3D supported mode manually)
5.2.2. USB Input (3D supported mode automatically)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1920*1080 33.75 30.00 74.25 HDTV 1080p Side by Side (Half), Top & Bottom,
Checkerboard, MPO (Photo)
5.2.4. HDMI-PC Input (3D supported mode manually)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Remark
1 1024*768 48.363 60.004 65.000 Side by Side (Half), Top & Bottom
2 1360*768 47.712 60.015 85.500 Side by Side (Half), Top & Bottom
3 1920*1080 67.50 60.00 148.50 Side by Side (Half), Top & Bottom
Checkerboard, Single Frame Sequential
Row Interleaving, Column Interleaving
5.2.5. RGB-PC Input
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Remark
1 1920*1080 67.5 60.000 148.5 Side by Side (Half) , Top & Bottom
2 1360*768 47.712 60.015 85.50 Side by Side (Half) , Top & Bottom
3 1024*768 48.363 60.00 65.00 Side by Side (Half) , Top & Bottom
5.2.3. USB Input (3D supported mode manually)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1920*1080 33.75 30.00 74.25 HDTV 1080p Side by Side (Half), Top & Bottom
Checkerboard, Single Frame
Sequential,
Row Interleaving, Column Inter-
leaving
(Photo : Side by Side, Top & Bot-
tom)

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5.2.7. HDMI 1.4a(3D supported mode automatically)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1280*720p 89.91 / 90.00 59.94 / 60.00 148.35 / 148.50 Mandatory Frame Packing,
2 1280*720p 44.96 / 45.00 59.94 / 60.00 74.18 / 74.25 Mandatory Top & Bottom
3 1920*1080i 33.72 / 33.75 59.94 / 60.00 74.18 / 74.25 Mandatory Side by Side (Half)
4 1920*1080p 43.94 / 54.00 23.97 / 24.00 148.35 / 148.50 Mandatory Frame Packing,
5 1920*1080p 26.97 / 27.00 23.97 / 24.00 74.18 / 74.25 Mandatory Top & Bottom
6 1280*720p 44.96 / 45.00 59.94 / 60.00 74.18 / 74.25 Primary Side by Side (Half)
7 1920*1080i 67.432 / 67.50 59.94 / 60.00 148.35 / 148.50 Primary Frame Packing
8 1920*1080p 67.43 / 67.50 59.94 / 60.00 148.35 / 148.50 Primary Top & Bottom
9 1920*1080p 26.97 / 27.00 23.97 / 24.00 74.18 / 74.25 Primary Side by Side (Half)
10 1920*1080p 67.432 / 67.50 29.976 / 30.00 148.35 / 148.50 Primary Frame Packing,
11 1920*1080p 33.716 / 33.75 29.976 / 30.00 74.18 / 74.25 Primary Top & Bottom
12 1920*1080i 33.72 / 33.75 59.94 / 60.00 74.18 / 74.25 Secondary Top & Bottom
13 1920*1080p 67.43 / 67.50 59.94 / 60.00 148.35 / 148.50 Secondary Side by Side (Half)
14 1920*1080p 33.716 / 33.75 29.976 / 30.00 74.18 / 74.25 Secondary Side by Side (Half)
15 720*480p 62.938 / 63.00 59.94 / 60.00 54.00 / 54.054 Secondary (16:9) Frame Packing,
16 720*480p 31.469 / 31.50 59.94 / 60.00 27.00 / 27.027 Secondary (16:9) Top & Bottom
17 720*480p 31.469 / 31.50 59.94 / 60.00 27.00 / 27.027 Secondary (16:9) Side by Side (Half)
18 720*480p 62.938 / 63.00 59.94 / 60.00 54.00 / 54.054 Secondary (4:3) Frame Packing,
19 720*480p 31.469 / 31.50 59.94 / 60.00 27.00 / 27.027 Secondary (4:3) Top & Bottom
20 720*480p 31.469 / 31.50 59.94 / 60.00 27.00 / 27.027 Secondary (4:3) Side by Side (Half)
21 640*480p 62.938 / 63.00 59.94 / 60.00 50.35 / 50.40 Secondary Frame Packing,
22 640*480p 31.469 / 31.50 59.94 / 60.00 25.175 / 25.20 Secondary Top & Bottom
23 640*480p 31.469 / 31.50 59.94 / 60.00 25.175 / 25.20 Secondary Side by Side (Half)
24 1280*720p 89.91 / 90.00 59.94 / 60.00 148.35 / 148.50 Line Alternative
25 1280*720p 44.96 / 45.00 59.94 / 60.00 148.35 / 148.50 Side by Side (Full)
26 1920*1080i 67.432 / 67.50 59.94 / 60.00 148.35 / 148.50 Field Alternative
27 1920*1080i 33.72 / 33.75 59.94 / 60.00 148.35 / 148.50 Side by Side (Full)
28 1920*1080p 43.94 / 54.00 23.97 / 24.000 148.35 / 148.50 Line Alternative
29 1920*1080p 26.97 / 27.00 23.97 / 24.000 148.35 / 148.50 Side by Side (Full)
30 1920*1080p 67.432 / 67.50 29.976 / 30.00 148.35 / 148.50 Line Alternative
31 1920*1080p 33.716 / 33.75 29.976 / 30.00 148.35 / 148.50 Side by Side (Full)
32 720*480p 62.938 / 63.00 59.94 / 60.00 54.00 / 54.054 16:9 Line Alternative
33 720*480p 31.469 / 31.50 59.94 / 60.00 54.00 / 54.054 16:9 Side by Side (Full)
34 720*480p 62.938 / 63.00 59.94 / 60.00 54.00 / 54.054 4:3 Line Alternative
35 720*480p 31.469 / 31.50 59.94 / 60.00 54.00 / 54.054 4:3 Side by Side (Full)
36 640*480p 62.938 / 63.00 59.94 / 60.00 50.35 / 50.40 Line Alternative
37 640*480p 31.469 / 31.50 59.94 / 60.00 50.35 / 50.40 Side by Side (Full)

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5.3. 2D to 3D Mode
- Remark: 3D Input mode
No. Side by Side Top & Bottom Checkerboard Single Frame
Sequential
Frame Packing Line
Interleaving
Column
Interleaving
1
R
L
R
LLLLL
L
R
L
5.2.10. Component Input
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1280*720 44.96 59.94 74.176 HDTV 720P Side by Side, Top & Bottom
2 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom
3 1920*1080 33.72 59.94 74.176 HDTV 1080I Side by Side, Top & Bottom
4 1920*1080 67.500 60 148.50 HDTV 1080P Side by Side, Top & Bottom
5 1920*1080 67.432 59.94 148.352 HDTV 1080P Side by Side, Top & Bottom
6 1920*1080 27.000 24.000 74.25 HDTV 1080P Side by Side, Top & Bottom
7 1920*1080 26.97 23.976 74.176 HDTV 1080P Side by Side, Top & Bottom
8 1920*1080 33.75 30.000 74.25 HDTV 1080P Side by Side, Top & Bottom
9 1920*1080 33.71 29.97 74.176 HDTV 1080P Side by Side, Top & Bottom
5.2.8. DLNA Input (3D supported mode automatically)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1920*1080 33.75 30.00 74.25 HDTV 1080p Side by Side (Half), Top & Bottom,
Checkerboard, MPO (Photo)
5.2.9. DLNA Input (3D supported mode manually)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1920*1080 33.75 30.00 74.25 HDTV 1080p Side by Side (Half), Top & Bottom
Checkerboard, Single Frame
Sequential,
Row Interleaving, Column Inter-
leaving
(Photo : Side by Side, Top & Bot-
tom)

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ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to LA23E/J Chassis applied LCD TV
all models manufactured in TV factory
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 ±5 °C of temperature and 65±10% of relative humidity if
there is no specific designation.
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15 °C
In case of keeping module is in the circumstance of 0°C, it
should be placed in the circumstance of above 15°C for 2
hours
In case of keeping module is in the circumstance of below
-20°C, it should be placed in the circumstance of above
15°C for 3 hours.
[Caution]
When still image is displayed for a period of 20 minutes or
longer (especially where W/B scale is strong.
Digital pattern 13ch and/or Cross hatch pattern 09ch), there
can some afterimage in the black level area
3. Adjustment items
3.1. Final assembly adjustment
▪ EDID/DDC check
▪ White Balance adjustment
▪ ADC Adjustment check
▪ RS-232C functionality check
▪ Factory Option setting per destination
▪ Ship-out mode setting (In-Stop)
3.2. Etc
▪ Ship-out mode
▪ Tool option menu
▪ USB Download(S/W Update, Option, Service only)
3.3. Automatic Adjustment
3.3.1. Overview
ADC adjustment is needed to find the optimum black level and
gain in Analog-to-Digital device and to compensate RGB
deviation
3.3.2. Equipment & Condition
1) Jig (RS-232C protocol)
2) Inner Pattern
- Resolution : 1080p (Inner Pattern)
- Resolution : 1024*768 RGB (Inner Pattern)
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7±0.1 Vp-p
3.3.3 Adjustment
3.3.3.1. Adjustment method
▪ Using RS-232, adjust items listed in 3.1 in the other shown in
“4.1.3.3”
3.3.3.2. Adj. protocol
3.3.3.3 Adj. order
▪ aa 00 00 [Enter ADC adj. mode]
▪ xb 00 40 [Change input source to Component1(480i)]
▪ ad 00 10 [Adjust 480i Comp1]
▪ xb 00 60 [Change input source to RGB(1024*768)]
▪ ad 00 10 [Adjust 1024*768 RGB]
▪ ad 00 90 End adj.
Ref) ADC adj. RS232C Protocol_Ver1.0
Protocol Command Set ACK
Enter adj. mode aa 00 00 a 00 OK00x
Source change xb 00 40
xb 00 60
b 00 OK40x (Adjust 480i Comp1 )
b 00 OK60x (Adjust 1024*768 RGB)
Begin adj. ad 00 10
Return adj. result OKx (Case of Success)
NGx (Case of Fail)
Read adj. data (main)
ad 00 20
(sub )
ad 00 21
(main)
000000000000000000000000007c007b006dx
(Sub)
000000070000000000000000007c00830077x
Conrm adj. ad 00 99 NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)
End adj. aa 00 90 a 00 OK90x

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4. Manual Adjustment
4.1. MAC Address, ESN Key and Widevine
Key download
4.1.1. Equipment & Condition
1) Play file: keydownload.exe
4.1.2. Communication Port connection
1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)
2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
4.1.3. Download process
1) Select the download items.
2) Mode check: Online Only
3) Check the test process
- US, Canada models: DETECT -> MAC_WRITE ->
WIDEVINE_WRITE
- Korea, Mexico models: DETECT -> MAC_WRITE ->
WIDEVINE_WRITE
4) Play : START
5) Check of result: Ready, Test, OK or NG
6) Printer out (MAC Address Label)
4.1.4. Communication Port connection
1) Connect: PCBA Jig -> RS-232C Port == PC -> RS-232C
Port
4.1.5. Download
1) US, Canada, Mexico models (12Y LCD TV + MAC +
Widevine + ESN Key)
2) Korea, Mexico models (11Y LCD TV + MAC + Widevine
Only)
4.1.6. Inspection
- In INSTART menu, check these keys.

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4.2. PING Test
* LAN card can be verified by using PING test
4.2.1 Adjustment Method(Board)
(1) Connect LAN to the board and power on.
(Default IP can be set to automatic setting. When power
ON, IP can be automatically be achieved from the router)
(2) Press ADJ key in the adjustment remote control.
(3) Check Network status by pressing 13. ACAP PING TEST
in EZ ADJUST. If it operates properly, it will show “Network
is operating properly.” If it does not, it will show “Network is
not working properly.”
4.2.2 Adjustment Method(Manufacturer)
(4) Connect the PC with PING Test program installed and the
LAN port of the SET via Cross LAN Cable. (The IP setting
of the PC has to be 12.12.2.3)
(5) After the PING Test program has been executed, check the
program setting. (IP of the set will be 12.12.2.2. Double
check the setting. Do not check the Modem because it will
not be used.)
(6) Press the Power Only Key in Adjustment remote control.
(IP of the set will be set)
(7) Upon pressing “RUN” in the program, it will show “OK” or
“NG” according to the test result.
● After all the adjustments, to disable the IP setting, press
INSTOP key.
4.3 EDID Download
4.3.1 Overview
▪ It is a VESA regulation. A PC or a MNT will display an optimal
resolution through information sharing without any necessity
of user input. It is a realization of “Plug and Play”.
4.3.2 Equipment
▪ Since embedded EDID data is used, EDID download JIG,
HDMI cable and D-sub cable are not need.
▪ Adjust remocon
4.3.3 Download method
1) Press Adj. key on the Adj. R/C,
2) Select EDID D/L menu.
3) By pressing Enter key, EDID download will begin
4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
5) If Download is failure, Re-try downloads.
※Caution) When EDID Download, must remove RGB/HDMI
Cable.
4.3.3.1. EDID DATA
# HDMI 1(C/S : 43 2C)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 02 03 2E F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 78 03 0C 00 10 00 B8 2D 20 C0 0E 01 4F 00 FE
20 | 08 10 06 10 18 10 28 10 38 10 E3 05 03 01 02 3A
30 | 80 18 71 38 2D 40 58 2C 45 00 A0 5A 00 00 00 1E
40 | 01 1D 80 18 71 1C 16 20 58 2C 25 00 A0 5A 00 00
50 | 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 A0 5A
60 | 00 00 00 1E 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | A0 5A 00 00 00 1A 00 00 00 00 00 00 00 00 00 2C

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# HDMI 2(C/S : 43 1C)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 02 03 2E F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 78 03 0C 00 10 00 B8 3D 20 C0 0E 01 4F 00 FE
20 | 08 10 06 10 18 10 28 10 38 10 E3 05 03 01 02 3A
30 | 80 18 71 38 2D 40 58 2C 45 00 A0 5A 00 00 00 1E
40 | 01 1D 80 18 71 1C 16 20 58 2C 25 00 A0 5A 00 00
50 | 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 A0 5A
60 | 00 00 00 1E 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | A0 5A 00 00 00 1A 00 00 00 00 00 00 00 00 00 1C
# HDMI 3(C/S : 43 0C
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 02 03 2E F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 78 03 0C 00 10 00 B8 4D 20 C0 0E 01 4F 00 FE
20 | 08 10 06 10 18 10 28 10 38 10 E3 05 03 01 02 3A
30 | 80 18 71 38 2D 40 58 2C 45 00 A0 5A 00 00 00 1E
40 | 01 1D 80 18 71 1C 16 20 58 2C 25 00 A0 5A 00 00
50 | 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 A0 5A
60 | 00 00 00 1E 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | A0 5A 00 00 00 1A 00 00 00 00 00 00 00 00 00 0C
# HDMI 4(C/S : 43 FC)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 39
60 | 3F 1F 52 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 43
EDID Block 1, Bytes 128-255 [80H-FFH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 02 03 2E F1 48 90 22 20 05 04 03 02 01 23 09 57
10 | 07 78 03 0C 00 10 00 B8 5D 20 C0 0E 01 4F 00 FE
20 | 08 10 06 10 18 10 28 10 38 10 E3 05 03 01 02 3A
30 | 80 18 71 38 2D 40 58 2C 45 00 A0 5A 00 00 00 1E
40 | 01 1D 80 18 71 1C 16 20 58 2C 25 00 A0 5A 00 00
50 | 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55 00 A0 5A
60 | 00 00 00 1E 26 36 80 A0 70 38 1F 40 30 20 25 00
70 | A0 5A 00 00 00 1A 00 00 00 00 00 00 00 00 00 FC
# RGB(C/S : 5C)
EDID Block 0, Bytes 0-127 [00H-7FH]
0 1 2 3 4 5 6 7 8 9 A B C D E F
-----------------------------------------------------------------------------------------
0 | 00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
10 | 01 16 01 03 68 A0 5A 78 0A EE 91 A3 54 4C 99 26
20 | 0F 50 54 A1 08 00 31 40 45 40 61 40 71 40 81 80
30 | 01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
40 | 45 00 A0 5A 00 00 00 1E 66 21 50 B0 51 00 1B 30
50 | 40 70 36 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
60 | 3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
70 | 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 00 5C

- 14 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.4. White Balance Adjustment
4.4.1. Overview
▪ W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel’s W/B deviation
(2) How-it-works: When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one of
R/G/B is fixed at 192, and the other two is lowered to find
the desired value.
(3) Adj. condition: normal temperature
- Surrounding Temperature: 25±5 °C
- Warm-up time: About 5 Min
- Surrounding Humidity: 20% ~ 80%
4.4.2. Equipment
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED:
CH14)
(2) Adj. Computer (During auto adj., RS-232C protocol is
needed)
(3) Adjust Remocon
(4) Video Signal Generator MSPG-925F 720p/204-Gray
(Model: 217, Pattern: 49)
※Color Analyzer Matrix should be calibrated using CS-1000
4.4.3. Equipment connection
4.4.4. Adjustment Command (Protocol)
(1) RS-232C Command used during auto-adj.
RS-232C COMMAND Explanation
CMD DATA ID
Wb 00 00 Begin White Balance adj.
Wb 00 ff End White Balance adj.
(internal pattern disappears )
(2) Adjustment Map
Adj. item Command
(lower caseASCII)
Data Range
(Hex.)
CMD1 CMD2 MIN MAX
Cool R Gain j g 00 C0
G Gain j h 00 C0
B Gain j i 00 C0
Medium R Gain j a 00 C0
G Gain j b 00 C0
B Gain j c 00 C0
Warm R Gain j d 00 C0
G Gain j e 00 C0
B Gain j f 00 C0
4.4.5. Adj. method
4.4.5.1. Auto adj. method
(1) Set TV in ADJ mode using P-ONLY key (or POWER ON
key)
(2) Place optical probe on the center of the display
- It need to check probe condition of zero calibration before
adjustment.
(3) Connect RS-232C Cable
(4) Select mode in ADJ Program and begin a adjustment.
(5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode (Cool, Medium,
Warm)
(6) Remove probe and RS-232C cable.
▪ W/B Adj. must begin as start command “wb 00 00” , and
finish as end command “wb 00 ff”, and Adj. offset if need
4.4.5.2. Manual adj. method
(1) Set TV in Adj. mode using POWER ON
(2) Zero Calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10cm of the surface..
(3) Press ADJ key -> EZ adjust using adj. R/C -> 9. White-
Balance then press the cursor to the right (KEY►). When
KEY(►) is pressed 216 Gray internal pattern will be
displayed.
(4) One of R Gain / G Gain / B Gain should be fixed at 192,
and the rest will be lowered to meet the desired value.
(5) Adj. is performed in COOL, MEDIUM, WARM 3 modes of
color temperature.
▪ If internal pattern is not available, use RF input. In EZ Adj.
menu 6.White Balance, you can select one of 2 Test-pattern:
ON, OFF. Default is inner (ON). By selecting OFF, you can
adjust using RF signal in 216 Gray pattern.
▪ Adj. condition and cautionary items
(1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to isolate
adj. area into dark surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface (80°~
100°)
(3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.
Color Analyzer
Computer
Pattern Generator
※
Signal Source
Probe
RS-232C
RS-232C
RS-232C
※
If TV internal pattern is used, not needed

- 15 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
4.4.6. Reference (White Balance Adj. coordinate and
color temperature)
▪ Luminance: 204 Gray
▪ Standard color coordinate and temperature using CS-1000
(over 26 inch)
Mode Coordinate Temp △uv
X Y
Cool 0.269 0.273 13,000K 0.0000
Medium 0.285 0.293 9,300K 0.0000
Warm 0.313 0.329 6,500K +0.0030
▪ Standard color coordinate and temperature using CA-210(CH 18) - ALEF
Mode Coordinate Temp △uv
X Y
Cool 0.269±0.002 0.273±0.002 13,000K 0.0000
Medium 0.285±0.002 0.293±0.002 9,300K 0.0000
Warm 0.313±0.002 0.329±0.002 6,500K +0.0030
▪ Standard color coordinate and temperature using CA-210(CH 14) - LGD
Mode Coordinate Temp △uv
X Y
Cool 0.269±0.002 0.273±0.002 13,000K 0.0000
Medium 0.285±0.002 0.293±0.002 9,300K 0.0000
Warm 0.313±0.002 0.329±0.002 6,500K 0.0000
4.4.6.1 ALELF&EDGE LED&IOL White balance table
▪ Edge LED module change color coordinate because of aging time
▪ apply under the color coordinate table, for compensated aging time
Edge (LM860X)
GP4 Aging time
(Min)
Cool Medium Warm
X Y X Y X Y
269 273 285 293 313 329
1 0-2 283 293 299 313 320 339
2 3-5 282 291 298 311 319 337
3 6-9 281 290 297 310 318 336
4 10-19 279 289 295 309 316 335
5 20-35 277 284 293 304 314 330
6 36-49 274 279 290 299 311 325
7 50-79 271 277 287 297 308 323
8 80-149 270 274 286 294 307 320
9 Over 150 269 273 285 293 306 319
4.4.7 THX Adjustment (For US Models)
For THX models, White Balance 4 point automatic control can
be done through the below steps. (Warm axis)
(1) 100 IRE White Balance Adjustment done.
(2) Control Backlight so the Maximum brightness
*In case of 100 IRE adjustment, backlight target value is
125cd/m2.
(3) 4 Point gamma and W/B adjustment done.
*With the controlled maximum brightness, adjust the Gamma
2.2 (60, 40, and 20 IRE / do not adjust at 80 IRE)
*For 10 IRE, set R, G, B gain to 0, 0, and 0, respectively.
4.5. Option selection per country
4.5.1. Overview
(1) Press ADJ key on the Adj. R/C, and then select Country
Group Menu.
(2) Depending on destination, select KR or US, then on the
lower Country option, select US, CA, MX. Selection is done
using +, - KEY
4.6. Tool Option Inspection
▪ Method: Press Adj. key on the Adj. R/C, then select Tool option.
Model Tool 1 Tool 2 Tool 3 Tool 4 Tool 5 Tool 6 Tool 7
47LM9600-UC 32999 45122 30605 20527 55823 1324 63115
55LM9600-UC 33001 45122 30605 20527 55823 1324 63115
4.7. Local Dimming Inspection (Optional)
4.7.1. ALEF models with local dimming
(1) Press ‘TILT” key of the Adj. R/C and check moving
patterns. The black bar patterns moves from top to bottom.
If a local dimming function does not work, a whole screen
shows full white
4.8. Ship-out mode check (In-stop)
▪ After final inspection, press In-Stop key of the Adj. R/C and
check that the unit goes to Stand-by mode.
▪ After final inspection, Always turn on the Mechanical S/W.
4.9. WIFI MAC ADDRESS CHECK
a. Using RS232
Command Set ACK
Transmission [A][l][][Set ID][][20][Cr] [O][K][x] or [N][G]
b. check the menu on in-start
Note that there are Wi-Fi MAC and MAC address.
Wi-Fi MAC is used for wireless network and MAC address is used
for wired network

- 16 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. GND and Internal Pressure check
5.1. Method
(1) GND & Internal Pressure auto-check preparation
- Check that Power Cord is fully inserted to the SET.
(If loose, re-insert)
(2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord; Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER (GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.
5.2. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE
GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
6. EYE-Q Operation check
Step 1) Turn on the TV..
Step 2) Press 'EYE button' on the adjustment remote-
controller.
Step 3) Cover 'Eye Q sensor' on the front of set with your
hands, hold it for 6 seconds.
Step 4) Check "the Sensor Data" on the screen, make certain
that Data is below 10. If Data isn’t below 10 in 6
seconds, Eye Q sensor would be bad. You should
change Eye Q sensor.
Step 5) Uncover your hands from Eye Q sensor, hold it for 6
seconds.
Step 6) Check "Back Light(xxx)" on the screen, check data
increase . You should change Eye Q sensor.
7. Magic Motion Remote Control Inspection
- Required Instruments: Inspection RF-remote control,
Inspection IR-KEY-CODE remote control.
- Prior to the test, AA battery for the RF-remote control should
be adequate.
(Change the battery for each LOT is recommended)
- Test procedures
(1) Press the ‘START’ key on the controller to pair with the set.
(2) Press the ‘OK’ key in the controller and check whether the
cursor appears on the set.
(3) Press ‘Vol+ (STOP)’ key to de-pair with the set.
8. 3D function test
8.1 Test equipment
(1) Pattern Generator MSHG-600 or MSPG-6100 (HDMI 1.4
support)
(2) Pattern: HDMI mode (model No. 872, pattern No. 83)
8.2 Test method
(1) Input 3D test signal as Fig.1.
(2) Press ‘OK” key as a 3D input OSD is shown.
(3) Check pattern as Fig2 without 3D glasses. (3D mode
without 3D glasses)
Fig.2
<OK in 3D mode without 3D glasses>
<Step 2>
<Step 5> <Step 6>
<Step 3>
<Step 4>

- 17 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
9. HDMI ARC Function Inspection
9.1. Test equipment
- Optic Receiver Speaker
- MSHG-600 (SW: 1220 ↑)
- HDMI Cable (for 1.4 version)
9.2 Test method
(1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI1)
(2) Check the sound from the TV Set
(3) Check the Sound from the Speaker or using AV & Optic
TEST program (It’s connected to MSHG-600)
* Remark: Inspect in Power Only Mode and check SW version
in a master equipment
.
10. USB S/W Download
(optional, Service only)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is lower
than that of TV set, it didn’t work. Otherwise USB data is
automatically detected.
(3) Show the message “Copying files from memory”
(5) Updating Completed, The TV will restart automatically
(6) If your TV is turned on, check your updated version and
Tool option.
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. If all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
* After downloading, TOOL OPTION setting is needed again.
(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)
(5) Updating Completed, The TV will restart automatically
(6) If your TV is turned on, check your updated version and
Tool option.
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. If all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
* After downloading, TOOL OPTION setting is needed again.
(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)
(4) Updating is staring.

- 18 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
A2
A21
A5
A24
AG1
300
200
510
120
121
122
560
570
501
840
850
810
710
400
521
820
860
830
540
530
200D
LV1
700
910
920
541
Except for Location No. 120, 121, 510, 521, 530, 540
HOME
/

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EB_ADDR[9]
BOOT_MODE0
EB_DATA[0] EB_DATA[1]
EB_ADDR[3]
EB_DATA[3] EB_DATA[2] EB_DATA[4]
EB_ADDR[2]
EB_ADDR[11]
EB_DATA[5]
EMMC_DATA[7]
EMMC_DATA[6]
EB_DATA[6]
EMMC_DATA[5]
EB_DATA[7]
EB_ADDR[12] EB_ADDR[13]
EB_ADDR[6]
EMMC_DATA[0]
EB_ADDR[14]
EMMC_DATA[1]
EB_ADDR[0]
BOOT_MODE1
EMMC_DATA[2]
EB_ADDR[5]
EMMC_DATA[3]
EB_ADDR[7]
EMMC_DATA[4]
EB_ADDR[4]
EB_ADDR[1]
EB_ADDR[8]
EB_ADDR[10]
PLLSET1
R197 3.3K
+3.3V_NORMAL
I2C_SDA2
/PCM_CE2
R143
22
OPT
I2C_SDA5
+3.3V_NORMAL
/PCM_CE1
R133 10K
OPT
R180 3.3K
R168 10K CI
I2C_SCL2
HW_OPT_7
R167 10K CI
I2C_SDA4
CAM_IREQ_N
UART1_TX
R187
4.7K
R198 3.3K
I2C_SCL6
M_RFModule_ISP
BOOT_MODE1
HW_OPT_6
XO_MAIN
HW_OPT_0
HW_OPT_8
I2C_SDA2
CAM_CD2_N
RF_SWITCH_CTL
HW_OPT_2
R102 22
OPT
HW_OPT_4
R181 3.3K
FRC_RESET
/RST_HUB
TCK0
HW_OPT_1
UART1_RX
SOC_TX
CAM_REG_N
R196 3.3K
/USB_OCD3
R132 10K
OPT
I2C_SCL3
BOOT_MODE0
+3.3V_NORMAL
PLLSET0
TDI0
XIN_MAIN
CAM_CD1_N
C111
0.1uF
CAM_WAIT_N
UART1_RX
+3.3V_NORMAL
R166 10K CI
R131 10K
OPT
ERROR_OUT
R103 22
OPT
R199 3.3K
I2C_SCL5
DSUB_DET
R150 22
+3.3V_NORMAL
I2C_SCL1
M_RFModule_RESET
CAM_INPACK_N
UART1_TX
R112
1M
R185
4.7K
OPT
SC_DET
TDO0
SOC_RX
TMS0
I2C_SCL5
I2C_SDA1
I2C_SCL4
M_REMOTE_TX
R186
4.7K
SOC_RESET
+3.3V_NORMAL
HW_OPT_3
R134 10K
OPT
R188
4.7K
OPT
HW_OPT_5
R142
22
OPT
I2C_SDA3
I2C_SDA6
/RST_PHY
TRST_N0
I2C_SCL2
I2C_SDA5
M_REMOTE_RX
COMP1_DET
HW_OPT_8
HW_OPT_1
R125 10K
UD
R138 10K
OPTIC
R100 10K
FRC_EXTERNAL
R139 10K
NON_OPTIC
R107 10K
FRC_INTERNAL
R140 10K
3D_DEPTH
R154 10K
DVB_S_TUNER
HW_OPT_2
R152 10K
DVB_T2_TUNER
R155 10K
NON_DVB_S_TUNER
HW_OPT_5
R153 10K
NON_DVB_T2_TUNER
HW_OPT_7
R141 10K
NON_3D DEPTH
HW_OPT_3
+3.3V_NORMAL
R146 10K
1GByte R145 10K
OPT
R148 10K
NON_CP_BOX
R111 10K
FRC3
R124 10K
FHD
HW_OPT_4
R147 10K
CP_BOX
HW_OPT_6
R110 10K
URSA5
HW_OPT_0
HW_OPT_9
HW_OPT_9
R158 10K
NON_DVB_C2_TUNER R156 10K
DVB_C2_TUNER
HP_DET
PCM_RST
/TU_RESET
/S2_RESET
I2C_BE_SDA1I2C_SDA1
R151 22
R160 22
R162 22 I2C_BE_SCL1
FRC3_RESET
I2C_SCL1
FRC_RESET
LOCAL_DIM_EN
R170
10K
FRC3
SMARTCARD_RST
SMARTCARD_VCC SMARTCARD_DET
SMARTCARD_DATA
SMARTCARD_CLK
SMARTCARD_PWR_SEL
SMARTCARD_DATA
SMARTCARD_PWR_SEL
SMARTCARD_DET
SMARTCARD_CLK
SMARTCARD_RST
SMARTCARD_VCC
I2C_SDA3
I2C_SCL3
HDMI_INT
HDMI_S/W_RESET
MHL_DET
SW1
JTP-1127WEM
DEBUG
12
4 3
Q100
2N7002K
S D
G
Q103
2N7002K
S D
G
+5V_NORMAL
Q104
2N7002K
S D
G
Q105
2N7002K OPT
S D
G
+3.3V_NORMAL
R201 2.7K 1/16W 5%
C100 8pF 50V
C101 8pF 50V
+5V_NORMAL
R202 100K
R203 100K
OPT
R126 10K
NOT_ZORAN_FRC R121 10K
ZORAN_FRC
HW_OPT_10
HW_OPT_10
+3.3V_NORMAL
PLLSET1
EMMC_DATA[0-7]
R176 22
OPT
EB_OE_N
WIFI_DP
BOOT_MODE0
USB_HUB_IC_IN_DM
EMMC_CLK
R174 22
OPT
WIFI_DM
USB_DP3
USB_CTL3
EMMC_CMD
EMMC_RST
EB_DATA[0-7]
DTV_ATV_SELECT
USB_DM3
USB_HUB_IC_IN_DP
AV1_CVBS_DET
EB_BE_N1 EB_BE_N0
BOOT_MODE1
EB_WE_N
EB_ADDR[0-14]
PLLSET0
R105 22
EPHY_RXD0
EPHY_REFCLK
R108 22
EPHY_TXD1
EPHY_EN
EPHY_CRS_DV
EPHY_TXD0
EPHY_MDIO
EPHY_RXD1
EPHY_MDC
R106 22
I2C_SCL3
I2C_SCL5
I2C_SDA4
I2C_SCL6
I2C_SCL4
I2C_SDA6
I2C_SDA3
I2C_SCL1
I2C_SDA1
I2C_SDA2
I2C_SDA5
I2C_SCL2
XIN_MAIN
XO_MAIN R104 560
1%
TDO0
TDI0
TMS0
TCK0
TRST_N0
PCM_5V_CTL
+5V_NORMAL
+3.3V_NORMAL
+3.3V_NORMAL
3D_DEPTH_RESET
FLASH_WP
MO_SENS_TO_MAIN_DOWN
MO_SENS_TO_MAIN_UP
MOTOR_CLOSE_SW
MOTOR_OPEN_SW
MOTOR_CW
MOTOR_CCW
MOTOR_CLOSE_SW
MO_SENS_TO_MAIN_DOWN
MOTOR_CW
MOTOR_CCW
MO_SENS_TO_MAIN_UP
MOTOR_OPEN_SW
R109
10K
+3.3V_NORMAL
P100
12507WS-04L
DEBUG
1
2
3
4
5
R184 1.2K R183 1.2K
OLED_TCON_RESET
OPTIC_FPGA_RESET
FPGA_LVDS_INFO
OPTIC_SERDES_RESET
OPTIC_SERDES_RESET
OPTIC_FPGA_RESET
OLED_TCON_RESET
EPHY_INT
3D_DEPTH_RESET
IRB_SPI_SS
IRB_SPI_CK
IRB_SPI_MOSI
IRB_SPI_MISO
IR_B_RESET
IRB_SPI_MISO
IRB_SPI_SS
IRB_SPI_CK
IRB_SPI_MOSI
IR_B_RESET
EPHY_INT
SEL_USB3 SEL_USB2
/RST_PHY
SEL_USB3
SC_DET
SEL_USB1
SEL_USB1
HP_DET
SEL_USB2
IC102
R1EX24256BSAS0A
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
/USB_OCD2 R101 22
HP_AMP_MUTE R117
22
OPT
DiiVA_POD_CTL
DiiVA_POD_CTL
IC100
LG1152D-B1
LG1152_NON_RM
XIN_MAIN
A22
XO_MAIN
B22
OPM1
AB16
OPM0
AB17
PORES_N
AE3
TRST_N0
V23
TMS0
U25
TCK0
V25
TDI0
V24
TDO0
U24
TRST_N1
Y22
TMS1
AA22
TCK1
AB20
TDI1
AB21
TDO1
W22
PLLSET1
AB9
PLLSET0
AB8
BOOT_MODE1
AB15
BOOT_MODE0
AB14
EXT_INTR3/GPIO48
Y23
EXT_INTR2/GPIO63
W25
EXT_INTR1/GPIO62
W24
EXT_INTR0/GPIO61
W23
UART0_RX/GPIO49
Y5
UART0_TX/GPIO50
W6
UART1_RX
AA6
UART1_TX
Y6
UART2_RX
AB5
UART2_TX
AA5
SPI_DI0/GPIO39
AB23
SPI_DO0/GPIO38
AB24
SPI_SCLK0/GPIO37
AA25
SPI_CS0/GPIO36
AB25
SPI_DI1/GPIO35
Y25
SPI_DO1/GPIO34
AA23
SPI_SCLK1/GPIO33
Y24
SPI_CS1/GPIO32
AA24
SCL0/GPIO60
AB6
SDA0/GPIO59
AB4
SCL1/GPIO58
AC5
SDA1/GPIO57
AC4
SCL2/GPIO56
AD4
SDA2/GPIO71
AE4
SCL3/GPIO70
AE5
SDA3/GPIO69
AD5
SCL4/GPIO68
AE6
SDA4/GPIO67
AD6
SCL5/GPIO66
AC6
SDA5/GPIO65
AC7
RMII_REF_CLK
AD2
RMII_CRS_DV
AB1
RMII_MDIO
AB2
RMII_MDC
AB3
RMII_TXEN
AC2
RMII_TXD1
AC3
RMII_TXD0
AE1
RMII_RXD1
AD3
RMII_RXD0
AD1
CAM_CE1_N
W26
CAM_CE2_N
V28
CAM_CD1_N
Y27
CAM_CD2_N
Y26
CAM_VS1_N
W28
CAM_VS2_N
W27
CAM_IREQ_N
AA28
CAM_RESET
AB26
CAM_INPACK_N
AA27
CAM_VCCEN_N
AA26
CAM_WAIT_N
Y28
CAM_REG_N
V27
CAM_IOIS16_N
V26
SC_CLK/GPIO90
R25
SC_DETECT/GPIO93
U23
SC_VCCEN/GPIO89
T25
SC_VCC_SEL/GPIO88
T24
SC_RST/GPIO91
T23
SC_DATA/GPIO92
R24
SD_CLK/GPIO76
C22
SD_CMD/GPIO73
C23
SD_CD_N/GPIO75
A23
SD_WP_N/GPIO74
B23
SD_DATA3/GPIO72
A24
SD_DATA2/GPIO87
B24
SD_DATA1/GPIO86
C24
SD_DATA0/GPIO85
A25
USB_DP1
B27
USB_DM1
A27
USB_DP2
A26
USB_DM2
B26
USB_TXR_RKL
C25
USB_ANALOGTEST
B25
BT_USB_DP
AA1
BT_USB_DM
AA2
BT_TXR_RKL
AA4
BT_ANALOGTEST
Y4
EMMC_RST E28
EMMC_CLK F27
EMMC_CMD F26
EMMC_DATA7 C26
EMMC_DATA6 E27
EMMC_DATA5 E26
EMMC_DATA4 D27
EMMC_DATA3 D28
EMMC_DATA2 C27
EMMC_DATA1 C28
EMMC_DATA0 D26
NAND_CS1 R23
NAND_CS0 P24
NAND_ALE N25
NAND_CLE P23
NAND_REN N24
NAND_WEN P25
GPIO31 AC1
GPIO30 V7
GPIO29 W5
GPIO28 W4
GPIO27 V6
GPIO26 V5
GPIO25 V4
GPIO24 U6
GPIO23 U5
GPIO22 U4
GPIO21 T6
GPIO20 T5
GPIO19 T4
GPIO18 R6
GPIO17 R5
GPIO16 R4
GPIO15 P6
GPIO14 P5
GPIO13 P4
GPIO12 N6
GPIO11 N5
GPIO10 N4
GPIO9 N3
GPIO8 M6
GPIO7 AC23
GPIO6 AC24
GPIO5 AE24
GPIO4 AD23
GPIO3 AE23
GPIO2 AC22
GPIO1 AD22
GPIO0 AE22
EB_CS3/GPIO64 M25 EB_CS2/GPIO79 M24 EB_CS1/GPIO78 M23 EB_CS0/GPIO77 N23
EB_OE_N T27 EB_WE_N T28 EB_WAIT U27
EB_BE_N1 U26 EB_BE_N0 U28
EB_ADDR17/GPIO84 J22 EB_ADDR16/GPIO83 K22 EB_ADDR15/GPIO82 J23
EB_ADDR14 L26 EB_ADDR13 L27 EB_ADDR12 L25 EB_ADDR11 N26 EB_ADDR10 N27
EB_ADDR9 M26 EB_ADDR8 L28 EB_ADDR7 L24 EB_ADDR6 L23 EB_ADDR5 K28 EB_ADDR4 K27 EB_ADDR3 K26 EB_ADDR2 K25 EB_ADDR1 K24 EB_ADDR0 K23
EB_DATA15 V22 EB_DATA14 U22 EB_DATA13 T22 EB_DATA12 R22 EB_DATA11 P22 EB_DATA10 N22
EB_DATA9 M22 EB_DATA8 L22 EB_DATA7 T26 EB_DATA6 R28 EB_DATA5 R27 EB_DATA4 R26 EB_DATA3 P28 EB_DATA2 P27 EB_DATA1 P26 EB_DATA0 N28
R178 2.2K R179 2.2K R182 2.2K R195 2.2K
R173
R175
X101
24MHz
4
GND_2 1X-TAL_1
2GND_1
3
X-TAL_2
FPGA_LVDS_INFO
D100
RCLAMP0502BA
OPT
SOC_RESET
R113
4.7K
IC100-*1
LG1152_RM
XIN_MAIN
A22
XO_MAIN
B22
OPM1
AB16
OPM0
AB17
PORES_N
AE3
TRST_N0
V23
TMS0
U25
TCK0
V25
TDI0
V24
TDO0
U24
TRST_N1
Y22
TMS1
AA22
TCK1
AB20
TDI1
AB21
TDO1
W22
PLLSET1
AB9
PLLSET0
AB8
BOOT_MODE1
AB15
BOOT_MODE0
AB14
EXT_INTR3/GPIO48
Y23
EXT_INTR2/GPIO63
W25
EXT_INTR1/GPIO62
W24
EXT_INTR0/GPIO61
W23
UART0_RX/GPIO49
Y5
UART0_TX/GPIO50
W6
UART1_RX
AA6
UART1_TX
Y6
UART2_RX
AB5
UART2_TX
AA5
SPI_DI0/GPIO39
AB23
SPI_DO0/GPIO38
AB24
SPI_SCLK0/GPIO37
AA25
SPI_CS0/GPIO36
AB25
SPI_DI1/GPIO35
Y25
SPI_DO1/GPIO34
AA23
SPI_SCLK1/GPIO33
Y24
SPI_CS1/GPIO32
AA24
SCL0/GPIO60
AB6
SDA0/GPIO59
AB4
SCL1/GPIO58
AC5
SDA1/GPIO57
AC4
SCL2/GPIO56
AD4
SDA2/GPIO71
AE4
SCL3/GPIO70
AE5
SDA3/GPIO69
AD5
SCL4/GPIO68
AE6
SDA4/GPIO67
AD6
SCL5/GPIO66
AC6
SDA5/GPIO65
AC7
RMII_REF_CLK
AD2
RMII_CRS_DV
AB1
RMII_MDIO
AB2
RMII_MDC
AB3
RMII_TXEN
AC2
RMII_TXD1
AC3
RMII_TXD0
AE1
RMII_RXD1
AD3
RMII_RXD0
AD1
CAM_CE1_N
W26
CAM_CE2_N
V28
CAM_CD1_N
Y27
CAM_CD2_N
Y26
CAM_VS1_N
W28
CAM_VS2_N
W27
CAM_IREQ_N
AA28
CAM_RESET
AB26
CAM_INPACK_N
AA27
CAM_VCCEN_N
AA26
CAM_WAIT_N
Y28
CAM_REG_N
V27
CAM_IOIS16_N
V26
SC_CLK/GPIO90
R25
SC_DETECT/GPIO93
U23
SC_VCCEN/GPIO89
T25
SC_VCC_SEL/GPIO88
T24
SC_RST/GPIO91
T23
SC_DATA/GPIO92
R24
SD_CLK/GPIO76
C22
SD_CMD/GPIO73
C23
SD_CD_N/GPIO75
A23
SD_WP_N/GPIO74
B23
SD_DATA3/GPIO72
A24
SD_DATA2/GPIO87
B24
SD_DATA1/GPIO86
C24
SD_DATA0/GPIO85
A25
USB_DP1
B27
USB_DM1
A27
USB_DP2
A26
USB_DM2
B26
USB_TXR_RKL
C25
USB_ANALOGTEST
B25
BT_USB_DP
AA1
BT_USB_DM
AA2
BT_TXR_RKL
AA4
BT_ANALOGTEST
Y4
EMMC_RST E28
EMMC_CLK F27
EMMC_CMD F26
EMMC_DATA7 C26
EMMC_DATA6 E27
EMMC_DATA5 E26
EMMC_DATA4 D27
EMMC_DATA3 D28
EMMC_DATA2 C27
EMMC_DATA1 C28
EMMC_DATA0 D26
NAND_CS1 R23
NAND_CS0 P24
NAND_ALE N25
NAND_CLE P23
NAND_REN N24
NAND_WEN P25
GPIO31 AC1
GPIO30 V7
GPIO29 W5
GPIO28 W4
GPIO27 V6
GPIO26 V5
GPIO25 V4
GPIO24 U6
GPIO23 U5
GPIO22 U4
GPIO21 T6
GPIO20 T5
GPIO19 T4
GPIO18 R6
GPIO17 R5
GPIO16 R4
GPIO15 P6
GPIO14 P5
GPIO13 P4
GPIO12 N6
GPIO11 N5
GPIO10 N4
GPIO9 N3
GPIO8 M6
GPIO7 AC23
GPIO6 AC24
GPIO5 AE24
GPIO4 AD23
GPIO3 AE23
GPIO2 AC22
GPIO1 AD22
GPIO0 AE22
EB_CS3/GPIO64 M25 EB_CS2/GPIO79 M24 EB_CS1/GPIO78 M23 EB_CS0/GPIO77 N23
EB_OE_N T27 EB_WE_N T28 EB_WAIT U27
EB_BE_N1 U26 EB_BE_N0 U28
EB_ADDR17/GPIO84 J22 EB_ADDR16/GPIO83 K22 EB_ADDR15/GPIO82 J23
EB_ADDR14 L26 EB_ADDR13 L27 EB_ADDR12 L25 EB_ADDR11 N26 EB_ADDR10 N27
EB_ADDR9 M26 EB_ADDR8 L28 EB_ADDR7 L24 EB_ADDR6 L23 EB_ADDR5 K28 EB_ADDR4 K27 EB_ADDR3 K26 EB_ADDR2 K25 EB_ADDR1 K24 EB_ADDR0 K23
EB_DATA15 V22 EB_DATA14 U22 EB_DATA13 T22 EB_DATA12 R22 EB_DATA11 P22 EB_DATA10 N22
EB_DATA9 M22 EB_DATA8 L22 EB_DATA7 T26 EB_DATA6 R28 EB_DATA5 R27 EB_DATA4 R26 EB_DATA3 P28 EB_DATA2 P27 EB_DATA1 P26 EB_DATA0 N28
MAIN & GPIO
1
A0’h
System Configuration
BOOT_MODE0
PLL SET[1:0] ==> Internal Pull-UP. N.C is high
00 : CPU clock(1056Mhz), Main0,1/2 DDR (792/792 Mhz)
01 : CPU clock(792Mhz), Main0,1/2 DDR (672/792 Mhz)
10 : CPU clock(1152Mhz), Main0,1/2 DDR (792/672 Mhz)
11 : CPU clock(984Mhz), Main0,1/2 DDR (792/792 Mhz)
I2C PULL UP
Write Protection
- Low : Normal Operation
- High : Write Protection
BOOT_MODE1
LG1152 B1
BOOT MODE
"11" or "01" : NOR
"10" : eMMC
"00" : NAND
NVRAM
Debug
MAIN Clock(24Mhz)
JTAG I/F FOR MAIN
Clock for LG1152
BackEnd 2
Pannel Resol
OPTIC I/F
FrontEnd 1
3D Depth IC
FrontEnd 2
CP BOX
BackEnd 1
DDR Size
Place to LVDS Wafer
For ISP
Delete PV
for DiiVA(China)
T2 Tuner
MODEL_OPT_1
MODEL_OPT_3
MODEL_OPT_9
MODEL_OPT_10
Enable
10
DDR Reserved
MODEL OPTION 8 is just for CP Box
It should not be appiled at MP
NON_3D_Depth_IC
1
NON_OPTIC
Support
OPTIC
LOW
0
0
Not Support
MODEL_OPT_6
MODEL_OPT_0
Zoran FRC
DDR_Default
MODEL_OPT_4
LG FRC3
FHD
S Tuner
1
0 1
CP BOX
Support
HIGH
Not Support
3D DEPTH
SoC
internal
FRC
Disable
3D_Depth_IC
MODEL_OPT_7
NO_FRC
UD
MODEL_OPT_5
Support
Not Support
MODEL_OPT_8
MODEL_OPT_2
Not Support
URSA5
Support
C2 Tuner
(For UD)
Place near Jack side
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
11/05/31
AVSS25_REF
+2.5V_NORMAL
VDD18
VDD33_USB
VDD33
VDD18
VDD18_LVTX
VDD18_LVRX
VDD18_MAIN_XTAL
VCC1.5V_DE
VCC1.5V_MAIN
VREF_M2
VREF_M0
VREF_M1
AVDD10_OSPREY
+0.9V_VDD
MAIN_XTAL
VDD33
VDD33_CVBS
VDD33_HDMI
VDD33_XTAL
VDD25_VSB
VDD25_CVBS
VDD25_REF
VDD25_COMP
VDD25_AUD
VDD25_LVTX
VDD18_A
AVDD10_DEMOD
AVDD10_VSB
AVDD10_LVTX
VDDC_XTAL
MAIN_XTAL
+2.5V_NORMAL
10uFC414
C406 0.1uF
C400 0.1uF
10uFC332
C402 0.1uF
L306
BLM18PG121SN1D
C350
0.1uF
10uFC307
L314
BLM18PG121SN1D
10uFC413
VREF_M0
L316
BLM18PG121SN1D
+1.8V_NORMAL
C381 0.1uF
+1.5V_DDR
L315
BLM18PG121SN1D
VDD25_COMP
C409 0.1uF
10uFC341
10uFC375
C329 0.1uF
VDD25_LVTX
L304
BLM18PG121SN1D
L326
BLM18PG121SN1D
C410 0.1uF
VREF_M1
+3.3V_NORMAL
VDD33
VDD25_VSB
L318
BLM18PG121SN1D
10uFC396
+3.3V_NORMAL
L317
BLM18PG121SN1D
10uFC378
C382 0.1uF
+1.0V_VDD
C388 0.1uF
VDDC_XTAL
C315 0.1uF
C377 0.1uF
VCC1.5V_MAIN
+1.8V_NORMAL
10uFC369
L321
BLM15BD121SN1
+1.8V_NORMAL
10uFC303
C390 0.1uF
AVDD10_OSPREY
10uFC422
C314 0.1uF
10uFC366
+2.5V_NORMAL
C423 0.1uF
R302
1K 1%
C370 0.1uF
C325 0.1uF
L323
BLM18PG121SN1D
C416 0.1uF
C337 0.1uF
C351
0.1uF
C317 0.1uF
VCC1.5V_MAIN
C321 0.1uF
10uFC397
C343 0.1uF
+2.5V_NORMAL
+3.3V_NORMAL
C334 0.1uF
+1.8V_NORMAL
C342 0.1uF
C318 0.1uF
VDD25_REF
VREF_M2
C333 0.1uF
AVSS25_REF
L312
BLM18PG121SN1D
C418 0.1uF
C345 0.1uF
L308
BLM18PG121SN1D
VDD18_A
+1.5V_DDR
R304
1K 1%
C324 0.1uF
VDD25_AUD
C336 0.1uF
C338 0.1uF
+0.9V_VDD
C393 0.1uF
10uFC415
VDD33_CVBS
C322 0.1uF
10uFC301
C306 0.1uF
C300
0.1uF
+1.0V_VDD
C327 0.1uF
AVDD10_DEMOD
10uFC302
C308
1000pF
C316 0.1uF C310 0.1uF
+1.0V_VDD
C319 0.1uF
L302
BLM18PG121SN1D
AVDD10_LVTX
L303
BLM18PG121SN1D
C340 0.1uF
C311 0.1uF
10uFC312
L301
BLM18PG121SN1D
C404 0.1uF
VDD25_CVBS
L305
BLM18PG121SN1D
VDD18_LVTX
+0.9V_VDD
10uFC359
C391 0.1uF
10uFC421
C368 0.1uF
C394 0.1uF
C363
1000pF
L325
BLM18PG121SN1D
+0.9V_VDD
VDD18
+1.0V_VDD
R303
1K 1%
L319
BLM18PG121SN1D
10uFC398
C383 0.1uF
C346 0.1uF
+1.8V_NORMAL
C417 0.1uF
C353 0.1uF
VDD33_HDMI
L309
BLM18PG121SN1D
C384 0.1uF
L324
BLM18PG121SN1D
R300
1K 1%
C323 0.1uF
C419 0.1uF
C320 0.1uF
VCC1.5V_DE
C392 0.1uF
10uFC305
VCC1.5V_DE
C313 0.1uF
10uFC347
+1.0V_VDD
10uFC374
+3.3V_NORMAL
10uFC309
VDD33_XTAL
C411 0.1uF
10uFC379
10uFC395
C386 0.1uF
L313
BLM18PG121SN1D
+3.3V_NORMAL
+2.5V_NORMAL
C408 0.1uF
L310
BLM18PG121SN1D
+2.5V_NORMAL
C385 0.1uF
10uFC401
VCC1.5V_MAIN
R301
1K 1%
VDD33_USB
10uFC372
C403 0.1uF
VDD18_MAIN_XTAL
C399 0.1uF
10uFC371
R305
1K 1%
L300
BLM18PG121SN1D
C389 0.1uF
VDD18_LVRX
L320
BLM15BD121SN1
C362
1000pF
AVDD10_VSB
L322
BLM18PG121SN1D
MDS62110205
M308
GASKET except ATSC
GASKET_8.0X6.0X7.5H
MDS62110205
M310
OPT
MDS62110205
M311
ATSC
C407 0.1uF
C405 0.1uF
OPT
C304 0.1uF
MDS62110205
M312
ESD
+0.9V_VDD
MDS62110205
M314
ESD
MDS62110206
M309
OPT
SMR-T-6-6.5-8
MDS62110205
M315
ESD
IC100
LG1152D-B1
VDD33_1
U8
VDD33_2
U9
VDD33_3
U10
VDD33_4
V8
VDD33_5
V9
VDD33_6
V10
AVDD33_USB_1
J21
AVDD33_USB_2
K21
AVDD33_BT_USB_1
AA10
AVDD33_BT_USB_2
AA11
VDD18_1
W18
VDD18_2
W19
VDD18_3
Y18
VDD18_4
Y19
VDD18_5
AG28
VDD18_6
AH27
VDD18_LTX_1
AA7
VDD18_LTX_2
AA8
VDD18_LTX_3
AA9
VDD18_LTX_4
AG1
VDD18_LVRX_1
AA12
VDD18_LVRX_2
AA13
VDD18_LVRX_3
AB12
VDD18_DISPPLL
J28
VDD18_DR3PLL
B28
VDD18_MAIN_XTAL
G22
VDD15_M2_1
F9
VDD15_M2_2
G8
VDD15_M2_3
G9
VDD15_M2_4
G10
VDD15_M2_5
G11
VDD15_M2_6
H8
VDD15_M2_7
H9
VDD15_M2_8
H10
VDD15_M2_9
H11
VDD15_M0_1
F22
VDD15_M0_2
G13
VDD15_M0_3
G14
VDD15_M0_4
G16
VDD15_M0_5
G17
VDD15_M0_6
G18
VDD15_M0_7
G19
VDD15_M0_8
G20
VDD15_M0_9
G21
VDD15_M0_10
H13
VDD15_M0_11
H14
VDD15_M0_12
H16
VDD15_M0_13
H17
VDD15_M0_14
H18
VDD15_M0_15
H19
VDD15_M0_16
H20
VDD15_M0_17
H21
VREF_M2_0
L4
VREF_M1_0
F13
VREF_M1_1
G12
VREF_M0_0
F14
VREF_M0_1
G15
VDDC10_OSPREY_1
L20
VDDC10_OSPREY_2
M20
VDDC10_OSPREY_3
M21
VDDC10_OSPREY_4
M27
VDDC10_OSPREY_5
M28
VDDC10_OSPREY_6
N20
VDDC10_OSPREY_7
N21
VDDC10_OSPREY_8
P20
VDDC10_OSPREY_9
P21
VDDC10_OSPREY_10
R20
VDDC10_OSPREY_11
R21
VDDC09_1
K8
VDDC09_2
K9
VDDC09_3
K10
VDDC09_4
K11
VDDC09_5
L8
VDDC09_6
L9
VDDC09_7
L10
VDDC09_8
L11
VDDC09_9
M8
VDDC09_10
M9
VDDC09_11
M10
VDDC09_12
M11
VDDC09_13
N8
VDDC09_14
N9
VDDC09_15
N10
VDDC09_16
N11
VDDC09_17
P8
VDDC09_18
P9
VDDC09_19
P10
VDDC09_20
P11
VDDC09_21
R8
VDDC09_22
R9
VDDC09_23
R10
VDDC09_24
R11
VDD09_LTX_1
Y7
VDD09_LTX_2
Y8
VDD09_LTX_3
AF1
AVDD09_DR3PLL
F28
VDDC_MAIN_XTAL
H22
SP_VQPS
AA19
GND_MAIN_XTAL
G23
GND_1
G7
GND_2
H7
GND_3
H12
GND_4
H15
GND_5
J7
GND_6
J8
GND_7
J9
GND_8
J10
GND_9
J11
GND_10
J12
GND_11
J13
GND_12
J14
GND_13
J15
GND_14
J16
GND_15
J17
GND_16
J18
GND_17
J19
GND_18
J20
GND_19
K7
GND_20
K12
GND_21 K13
GND_22 K14
GND_23 K15
GND_24 K16
GND_25 K17
GND_26 K18
GND_27 K19
GND_28 K20
GND_29 L7
GND_30 L12
GND_31 L13
GND_32 L14
GND_33 L15
GND_34 L16
GND_35 L17
GND_36 L18
GND_37 L19
GND_38 L21
GND_39 M7
GND_40 M12
GND_41 M13
GND_42 M14
GND_43 M15
GND_44 M16
GND_45 M17
GND_46 M18
GND_47 M19
GND_48 N7
GND_49 N12
GND_50 N13
GND_51 N14
GND_52 N15
GND_53 N16
GND_54 N17
GND_55 N18
GND_56 N19
GND_57 P7
GND_58 P12
GND_59 P13
GND_60 P14
GND_61 P15
GND_62 P16
GND_63 P17
GND_64 P18
GND_65 P19
GND_66 R7
GND_67 R12
GND_68 R13
GND_69 R14
GND_70 R15
GND_71 R16
GND_72 R17
GND_73 R18
GND_74 R19
GND_75 T7
GND_76 T8
GND_77 T9
GND_78 T10
GND_79 T11
GND_80 T12
GND_81 T13
GND_82 T14
GND_83 T15
GND_84 T16
GND_85 T17
GND_86 T18
GND_87 T19
GND_88 T20
GND_89 T21
GND_90 U7
GND_91 U11
GND_92 U12
GND_93 U13
GND_94 U14
GND_95 U15
GND_96 U16
GND_97 U17
GND_98 U18
GND_99 U19
GND_100 U20
GND_101 U21
GND_102 V11
GND_103 V12
GND_104 V13
GND_105 V14
GND_106 V15
GND_107 V16
GND_108 V17
GND_109 V18
GND_110 V19
GND_111 V20
GND_112 V21
GND_113 W7
GND_114 W8
GND_115 W9
GND_116 W10
GND_117 W11
GND_118 W12
GND_119 W13
GND_120 W14
GND_121 W15
GND_122 W16
GND_123 W17
GND_124 W20
GND_125 W21
GND_126 Y9
GND_127 Y10
GND_128 Y11
GND_129 Y12
GND_130 Y13
GND_131 Y14
GND_132 Y15
GND_133 Y16
GND_134 Y17
GND_135 Y20
GND_136 Y21
GND_137 AA14
GND_138 AA15
GND_139 AA16
GND_140 AA17
GND_141 AA18
GND_142 AA20
GND_143 AA21
GND_144 AB7
GND_145 AB10
GND_146 AB11
GND_147 AB13
GND_148 AB22
IC101
LG1152AN-B2
VDD33_1
P1
VDD33_2
P2
AVDD33_CVBS_1
P14
AVDD33_CVBS_2
R14
AVDD33_HDMI_1
F18
AVDD33_HDMI_2
H16
VDD33_XTAL
M16
VDD25_VSB
L15
VDD25_CVBS_2
R13
VDD25_CVBS_1
R12
VDD25_CVBS_3
V13
AVDD25_REF
P10
VDD25_COMP_3
R10
VDD25_COMP_1
P9
VDD25_COMP_2
R9
VDD25_COMP_4
V7
VDD25_AAD
J16
VDD25_AUD_1
P6
VDD25_AUD_2
P7
VDD25_AUD_3
V6
VDD25_LVTX_1
B18
VDD25_LVTX_2
G12
VDD25_LVTX_3
G13
VDD18_1
N1
VDD18_2
N2
VDDC10_1
G6
VDDC10_2
G7
AVDD10_CVBS
R15
AVDD10_VSB
K15
AVDD10_LVTX_1
D17
AVDD10_LVTX_2
D18
AVDD10_LLPLL
N7
VDDC_XTAL
L16
VQPS
G4
AVSS25_REF
N10
GND_XTAL
K16
GND_1
D16
GND_2
G5
GND_3
G8
GND_4
G9
GND_5
G10
GND_6
G11
GND_7
G14
GND_8
G15
GND_9
H4
GND_10
H5
GND_11
H6
GND_12
H7
GND_13
H8
GND_14
H9
GND_15
H10
GND_16
H11
GND_17
H12
GND_18
H13
GND_19
H14
GND_20
H15
GND_21
J4
GND_22
J5
GND_23
J6
GND_24
J7
GND_25 J8
GND_26 J9
GND_27 J10
GND_28 J11
GND_29 J12
GND_30 J13
GND_31 J14
GND_32 J15
GND_33 K4
GND_34 K5
GND_35 K6
GND_36 K7
GND_37 K8
GND_38 K9
GND_39 K10
GND_40 K11
GND_41 K12
GND_42 K13
GND_43 K14
GND_44 L4
GND_45 L5
GND_46 L6
GND_47 L7
GND_48 L8
GND_49 L9
GND_50 L10
GND_51 L11
GND_52 L12
GND_53 L13
GND_54 L14
GND_55 M4
GND_56 M5
GND_57 M6
GND_58 M7
GND_59 M8
GND_60 M9
GND_61 M10
GND_62 M11
GND_63 M12
GND_64 M13
GND_65 M14
GND_66 M15
GND_67 M17
GND_68 N4
GND_69 N5
GND_70 N6
GND_71 N8
GND_72 N9
GND_73 N11
GND_74 N12
GND_75 N13
GND_76 N14
GND_77 N15
GND_78 N16
GND_79 P3
GND_80 P4
GND_81 P5
GND_82 P13
GND_83 P15
GND_84 P16
GND_85 R3
GND_86 R16
GND_87 R17
GND_88 R18
GND_89 T13
GND_90 U13
ZD301
5V
ESD_LG1152
ZD300
5V
ESD_LG1152
10uFC326
MDS62110205
M317
ESD
MDS62110205
M318
OPT
MDS62110205
M322 GASKET_8.0X6.0X7.5H
MDS62110217
M320
ESD
MDS62110217
M316
ESD
MDS62110217
M319
ESD
MDS62110218
M300
MDS62110218
M301 ALBLOCK
MDS62110218
M321 ALBLOCK
MDS62110218
M302 ALBLOCK
MDS62110218
M303 MDS62110218
M305 HEATSINK
MDS62110218
M304 HEATSINK
MDS62110218
M306
MDS62110218
M307
C349 0.33uF C348 0.33uF
MDS62110205
M313
OPT
MAIN POWER 3
LG1152
For secure BOOT OTP
Will be change to LOW for MP
Will be change to LOW for MP
For HDCP OTP
LG1152A
LG1152D
Max 40mA
Max 5900mA
Max 20mA
Max 256mA
Max 1mA
Max 100mA
Max 120mA
Max 6mA
Max 40mA
Max 93mA
Max 250mA
Max 50mA
Max 680mA
Max 1mA
Max 40mA
Max 340mA
Max 49mA
Max 12mA
+1.5V_Bypass Cap
Max 360mA
(18)
Max 31mA
Max 10mA
Max 1320mA
Max 35mA
Max 28mA
Max 48.8mA
Max 250mA
Max 35mA
On Package Decap : 0.1uF *6ea
On Package Decap : 0.1uF *3ea
On Package Decap : 0.1uF *2ea
On Package Decap : 0.1uF *3ea
On Package Decap : 0.1uF *1ea
On Package Decap : 0.1uF *1ea
On Package Decap:0.1uF *1ea
On Package Decap : 0.1uF *1ea On Package Decap : 0.1uF *1ea
On Package Decap : 0.1uF *1ea
On Package Decap : 0.1uF *1ea On Package Decap : 0.1uF *1ea
On Package Decap : 0.1uF *1ea
On Package Decap : 0.1uF *1ea
On Package Decap : 0.1uF *1ea
On Package Decap : 0.1uF *1ea
On Package Decap : 0.1uF *1ea On Package Decap : 0.1uF *1ea
On Package Decap:0.1uF *1ea
On Package Decap:0.1uF *1ea
For Tuner Sensitivity / Under DDR
For Tuner Sensitivity / Under TUNER
For ATSC
For HeatSinK, AL Block / SMD Top SMD Bottom SMD TOP FOR ESD
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only