LG 60PB6500 User manual
North/Latin America http://aic.lgservice.com
Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
Internal Use Only
Printed in KoreaP/NO : MFL68122504 (1402-REV00)
CHASSIS : PB41A
MODEL : 60PB6500 60PB6500-SA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
PLASMA TV
SERVICE MANUAL
- 2 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION ................................................................ 5
BLOCK DIAGRAM.................................................................................. 11
EXPLODED VIEW .................................................................................. 12
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
- 3 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩand 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
Leakage Current Hot Check (See below Figure)
Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
Leakage Current Hot Check circuit
IMPORTANT SAFETY NOTICE
To Instrument's
exposed
METALLIC PARTS
Good Earth Ground
such as WATER PIPE,
CONDUIT etc.
AC Volt-meter
SAFETY PRECAUTIONS
- 4 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement
.
1. Application range
This spec sheet is applied all of the 42” 50”, 60” PDP TV with PB41A chassis.
2. Requirement for Test
Each part is tested as below without special appointment.
(1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F),
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
(5) The receiver must be operated for about 5 minutes prior to the adjustment.
3. Test method
(1) Performance: LGE TV test method followed
(2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
4. Model General Specification
No Item Specication Remark
1 Receiving System 1) DVB-T2 / NTSC-M / PAL-M / PAL-N
2 Available Channel 1) VHF : 2~13
2) UHF : 14~69
3) DTV : 2~69
4) CATV : 1~125
DTV : DVB-T2
3 Input Voltage 1) AC 110 ~ 240V 50/60Hzz
4 Market Colombia
60 inch Wide(1920 × 1080)
6 Aspect Ratio 16:9
7 Tuning System FS
8 Module PDP60R6#### (1920 × 1080)
9 Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10 Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
- 5 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet applies to PB41A chassis applied PDP TV all
models manufactured in TV factory.
2. Specification
(1) Because this is not a hot chassis, it is not necessary to
use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs.
(3) The adjustment must be performed in the circumstance of
25 °C ± 5 °C of temperature and 65 % ± 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-220
V~, 50/60 Hz.
(5) Before adjustment, execute Heat-Run for 5 minutes.
■ After Receive 100% Full white pattern (06CH) then
process Heat-run
(or “8. Test pattern” condition of Ez-Adjust status)
■How to make set white pattern
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select “10. Test
pattern” and, after select “White” using navigation
button, and then you can see 100% Full White pattern.
* In this status you can maintain Heat-Run useless any
pattern generator
* Notice: if you maintain one picture over 20 minutes
(Especially sharp distinction black with white
pattern – 13Ch, or Cross hatch pattern – 09Ch)
then it can appear image stick near black level.
3. Adjustment items
3.1. PCB Assembly adjustment
■Adjust 480i Comp
■Adjust 1080p Comp
●If it is necessary, it can adjustment at Manufacture Line
●You can see set adjustment status at “9. ADJUST
CHECK” of the “In-start menu”
3.2. Set Assembly Adjustment
■EDID (The Extended Display Identification Data )
■Color Temperature (White Balance) Adjustment
■Make sure RS-232C control
■Selection Factory output option
4. PCB Assembly Adjustment
4.1. Using RS-232C
- Adjust 3 items at 3.1. PCB assembly adjustments
" 4.1. ■Adjustment sequence" one after the order.
■Adjustment sequence
■Necessary items before Adjustment items
●Pattern Generator : (MSPG-925FA)
●Adjust 480i comp1
(MSPG-925FA:model :209, pattern :65) - comp1 Mode
●Adjust 1080p comp1
(MSPG-925FA:model :225 , pattern :65) - comp1 Mode
* If you want more information then see the below Adjustment
method (Factory Adjustment)
■Adjustment sequence
●aa 00 00: Enter the ADc Adjustment mode.
●xb 00 40: change the mode to component1 (No actions)
●ad 00 10: Adjust 480i comp
●ad 00 10: Adjust 1080p comp
●xb 00 90: Endo of Adjustmennt
Order command Set response
1. Inter the
Adjustment
mode
aa 00 00 a 00 OK00x
2. Change
the Source
XB 00 40
XB 00 60
b 00 OK40x (Adjust 480i Comp1 )
(Adjust 1080p Comp1)
b 00 OK60x (Adjust 1080p RGB)
3. Start
Adjustment
ad 00 10
4. Return the
Response
OKx ( Success condition )
NGx ( Failed condition )
5. Read
Adjustment
data
( main )
ad 00 20
( main )
ad 00 30
(main : component1 480i, RGB 1080p)
000000000000000000000000007c007b006dx
(main : component1 1080p)
000000070000000000000000007c00830077x
6. Conrm
Adjustment
ad 00 99 NG 03 00x (Failed condition)
NG 03 01x (Failed condition)
NG 03 02x (Failed condition)
OK 03 03x (Success condition)
7. End of
Adjustment
ad 00 90 d 00 OK90x
< See ADC Adjustment RS232C Protocol_Ver1.0 >
- 6 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
5. Factory Adjustment
-> PU41A : USE INTERNAL ADC(LM1) : using internal pattern.
5.1. Auto Adjust Component 480i/1080p
■Summary : Adjustment component 480i/1080i is Gain and
Black level setting at Analog to Digital converter,
and compensate the RGB deviation
■Using instrument
●Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator
(It can output 480i/1080i horizontal 100% color bar
pattern signal, and its output level must setting
0.7V±0.1V p-p correctly)
●You must make it sure its resolution and pattern cause
every instrument can have different setting
●Adjustment method 480i Comp1, Adjust 1080p Comp
(Factory adjustment)
●ADC 480i Component adjustment
- Check connection of Component
- MSPG-925FA -> Model: 209, Pattern 65
●Set Component 480i mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to Component
mode and its screen to “NORMAL”
●ADC 1080p Component adjustment
- Check connection Component
- MSPG-925FA -> Model: 225, Pattern 65
●Set Component 1080p mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to Component
mode and its screen to “NORMAL”
●After get each the signal, wait more a second and enter
the “IN-START” with press IN-START key of Service
remocon. After then select “7. External ADC” with
navigator button and press “Enter”.
●After Then Press key of Service remocon “Right Arrow
(VOL+)”
●You can see “ADC Component Success”
●Component1 1080p Adjust is same method.
●Component 1080p Adjustment in Component input mode
* caution : Set Volume 0 after adjustment
5.2. Use Internal ADC(S7R)
- ADJ(EZ ADJUST) -> 6.ADC Calibration -> ADC
Calibration(START)
* EDID (The Extended Display Identification Data)/DDC
(Display Data Channel) Download.
■Summary
● It is established in VESA, for communication between
PC and Monitor without order from user for building
user condition. It helps to make easily use realize
“Plug and Play” function.
● For EDID data write, we use DDC2B protocol.
- Auto Download
■ After enter Service Mode by pushing “ADJ” key,
■ Enter EDID D/L mode.
■ Enter “START” by pushing “OK” key.
* Caution:
- Never connect HDMI & D-sub Cable when the user
downloading .
- Use the proper cables below for EDID Writing
< Adjustment pattern : 480i / 1080p 60Hz Pattern >
- 7 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
* Edid data and Model option download(RS232)
- Manual Download
■ Write HDMI EDID data
● Using instruments
- Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.
- S/W for DDC recording (EDID data write and read)
- D-sub jack
- Additional HDMI cable connection Jig.
● Preparing and setting.
- Set instruments and Jig. Like pic.5), then turn on PC
and Jig.
- Operate DDC write S/W (EDID write & read)
- It will operate in the DOS mode.
■ EDID data (Model name = LG TV)
<FHD>
- MODEL NAME : 60PB6500
- AC3 (C/S : 0x96, 0x66)
- HDMI
- See Working Guide if you want more information about EDID
communication.
- Adjustment Color Temperature(White balance)
■ Using Instruments
● Color Analyzer: CA-210 (CH 10)
- Using LCD color temperature, Color Analyzer (CA-
210) must use CH 10, which Matrix compensated
(White, Red, Green, Blue compensation) with CS-
2100. See the Coordination bellowed one.
● Auto-adjustment Equipment (It needs when Auto-adjust-
ment – It is availed communicate with RS-232C : Baud
rate: 115200)
● Video Signal Generator MSPG-925F 720p, 216Gray
(Model: 217, Pattern 78)
■ Connection Diagram (Auto Adjustment)
● Using Inner Pattern
● Using HDMI input
NO Enter
download MODE
EDID data Model
option download
Item download ‘Mode In’ download
CMD 1 A A
CMD 2 E E
Data 0 0 *Note1
0 *Note2
When transfer the
‘Mode In’,
Carry the command.
Automatically download
(The use of a internal
Data)
< For write EDID data, setting Jig and another instruments >
Item Adjust ‘Mode Out’’ Adjustment Conrmation
CMD 1 A A
CMD 2 E E
Data 0 9 9
0 9
To check Download
on Assembly line.
00 FF FF FF FF FF FF 00 1E 6D 01 00 01 01 01 01
01 18 01 03 80 A0 5A 78 0A EE 91 A3 54 4C 99 26
0F 50 54 A1 08 00 31 40 45 40 61 40 81 80 01 01
01 01 01 01 01 01 02 3A 80 18 71 38 2D 40 58 2C
45 00 40 84 63 00 00 1E 66 21 50 B0 51 00 1B 30
40 70 36 00 40 84 63 00 00 1E 00 00 00 FD 00 3A
3E 1E 53 10 00 0A 20 20 20 20 20 20 00 00 00 FC
00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 01 96
02 03 21 F1 4D 10 9F 04 13 05 14 03 02 12 20 22
15 01 26 15 07 50 09 57 07 67 03 0C 00 10 00 B8
2D 02 3A 80 18 71 38 2D 40 58 2C 45 00 40 84 63
00 00 1E 01 1D 80 18 71 1C 16 20 58 2C 25 00 40
84 63 00 00 9E 01 1D 00 72 51 D0 1E 20 6E 28 55
00 40 84 63 00 00 1E 0E 1F 00 80 51 00 1E 30 40
80 37 00 40 84 63 00 00 1C 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 66
< connection Diagram for Adjustment White balance >
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Only for training and service purposes
■ White Balance Adjustment
If you can’t adjust with inner pattern, then you can adjust
it using HDMI pattern. You can select option at “Ez-Adjust
Menu – 7. White Balance” there items “NONE, INNER,
HDMI”. It is normally setting at inner basically. If you can’t
adjust using inner pattern you can select HDMI item, and
you can adjust.
In manual Adjust case, if you press ADJ button of service
remocon, and enter “Ez-Adjust Menu – 7. White Balance”,
then automatically inner pattern operates. (In case of
“Inner” originally “Test-Pattern. On” will be selected in The
“Test-Pattern. On/Off”.
● Connect all cables and equipments like Pic.5)
● Set Baud Rate of RS-232C to 115200. It may set 115200
orignally.
● Connect RS-232C cable to set
● Connect HDMI cable to set
■ RS-232C Command (Commonly apply)
● “wb 00 00”: Start Auto-adjustment of white balance.
● “wb 00 10”: Start Gain Adjustment (Inner pattern)
● “jb 00 c0” :
● …
● “wb 00 1f”: End of Adjustment
* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-
end)
● “wb 00 ff”: End of white balance adjustment (inner pattern
disappear)
■Adjustment Mapping information
● When Color temperature (White balance) Adjustment
(Automatically)
- Press “Power only key” of service remocon and operate
automatically adjustment.
- Set BaudRate to 115200.
● You must start “wb 00 00” and finish it “wb 00 ff”.
● If it needs, then adjustment “Offset”.
■ White Balance Adjustment (Manual adjustment)
● Test Equipment: CA-210
- Using PDP color temperature, Color Analyzer (CA-210)
must use CH 10, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the
Coordination bellowed one.
● Manual adjustment sequence is like bellowed one.
- Turn to “Ez-Adjust” mode with press ADJ button of service
remocon.
- Select “10.Test Pattern” with CH+/- button and press
enter. Then set will go on Heat-run mode. Over 30
minutes set let on Heat-run mode.
- Let CA-210 to zero calibration and must has gap more
10cm from center of PDP module when adjustment.
- Press “ADJ” button of service remocon and select
“7.White-Balance” in “Ez-Adjust” then press “►” button of
navigation key. (When press “►” button then set will go to
full white mode)
- Adjust at three mode (Cool, Medium, Warm)
- If “cool” mode
Let B-Gain to 192 and R, G, B-Cut to 64 and then control
R, G gain adjustment High Light adjustment.
- If “Medium” and “Warm” mode Let R-Gain to 192 and R,
G, B-Cut to 64 and then control G, B gain adjustment
High Light adjustment.
- All of the three mode
Let R-Gain to 192 and R, G, B-Cut to 64 and then control
G, B gain adjustment High Light adjustment.
- With volume button (+/-) you can adjust.
- After all adjustment finished, with Enter (■ key) turn to
Ez-Adjust mode. Then with ADJ button, exit from
adjustment mode
* Attachment: White Balance adjustment coordination and
color temperature.
● Using CS-1000 Equipment.
- COOL : T=11000K, ∆uv=0.000, x=0.276 y=0.283
- MEDIUM : T=9300K, ∆uv=0.000, x=0.285 y=0.293
- WARM : T=6500K, ∆uv=0.000, x=0.313 y=0.329
RS-232C
COMMAND
[CMD ID DATA]
M
I
N
CENTER
(DEFAULT)
M
A
X
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 184 192 192 192
G Gain jh Jb je 00 187 183 159 192
B Gain ji Jc jf 00 192 161 95 192
R Cut 64 64 64 127
G Cut 64 64 64 127
B Cut 64 64 64 127
RS-232C COMMAND
[CMD ID DATA]
Meaning
wb 00 00 White Balance adjustment start.
wb 00 10 Start of adjust gain
(Inner white pattern)
wb 00 1f End of gain adjust
wb 00 20 Start of offset adjust
(Inner white pattern)
wb 00 2f End of offset adjust
wb 00 ff End of White Balance adjust
(Inner pattern disappeared)
- 9 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
● When tester will measure on Cool condition, adjust W30 on
TV display menu.
● When tester will measure on medium condition, adjust 0 on
TV display menu.
● When tester will measure on warm condition, adjust W30 on
TV display menu.
● Using CA-210 Equipment. (10 CH)
- Contrast value: 216 Gray
- Brightness spec.
5.3. Test of RS-232C control.
- Press In-Start button of Service Remocon then set the
“4.Baud Rate” to 115200. Then check RS-232C control and
5.4. Selection of Country option.
- Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone.
■ Models: All models which PU31A Chassis (See the rst
page.)
■ Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-“ Button
■ Select one of these three (USA, CANADA, MEXICO) de-
pends on its market using “Vol. +/-“button.
* Caution : Don’t push The INSTOP KEY after completing the
function inspection.
* Caution : Inspection only PAL M / NTSC
6. GND and ESD Testing
6.1. Prepare GND and ESD Testing.
■ Check the connection between set and power cord
6.2. Operate GND and ESD auto-test.
■ Fully connected (Between set and power cord) set enter the
Auto-test sequence.
■ Connect D-Jack AV jack test equipment.
■ Turn on Auto-controller(GWS103-4)
■ Start Auto GND test.
■ If its result is NG, then notice with buzzer.
■ If its result is OK, then automatically it turns to ESD Test.
■ Operate ESD test
■ If its result is NG, then notice with buzzer.
■ If its result is OK, then process next steps. Notice it with
Good lamp and STOPER Down.
6.3. Check Items.
■ Test Voltage
● GND: 1.5KV/min at 100mA
● Signal: 3KV/min at 100mA
■ Test time: just 1 second.
■ Test point
● GND test: Test between Power cord GND and Signal
cable metal GND.
● ESD test: Test between Power cord GND and Live and
neutral.
■ Leakage current: Set to 0.5mA(rms)
6.4. POWER PCB Ass’y Voltage adjustment
(Va, Vs voltage adjustment)
6.4.1. Test equipment : D.M.M 1EA
6.4.2. Connection Diagram for Measuring
: refer to g.1
6.4.3. Adjustment method
6.4.3.1. Vs adjustment (refer g.1)
(1) Connect + terminal of D.M.M. to Vs pin of P811, connect
-terminal to GND pin of P811
(2) After turning VR901, voltage of D.M.M adjustment as same
as Vs voltage which on label of panel left/top ( deviation ;
±1.0V)
6.4.3.2. Va adjustment (refer g.1)
(1) After receiving 100% Full White Pattern, HEAT RUN.
(2) Connect + terminal of D.M.M. to Va pin of P811, connect
-terminal to GND pin of P811
(3) After turning VR502,voltage of D.M.M adjustment as same
as Va voltage which on label of panel left/top (deviation;
±1.0V)
Color
temperature
Test
Equipment
Color Coordination
x y
COOL CA-210 0.276 ± 0.002 0.283 ± 0.002
MEDIUM CA-210 0.285 ± 0.002 0.293 ± 0.002
WARM CA-210 0.313 ± 0.002 0.329 ± 0.002
Item White average
brightness
Brightness uniformity
Min 27.41 -15
Typ 34.55
Max +15
Unit cd/m² %
Remark - 100% Window White
Pattern
- 100IRE(255Gray)
- Picture: Vivid(Medium)
- 85IRE(216Gray) 100%
Window White Pattern
- Picture: Vivid(Medium)
(g.1) PCB Assy Voltage adjustment
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Only for training and service purposes
7. Default Service option.
7.1. ADC-Set.
■ R-Gain adjustment Value (default 128)
■ G-Gain adjustment Value (default 128)
■ B-Gain adjustment Value (default 128)
■ R-Offset adjustment Value (default 128)
■ G-Offset adjustment Value (default 128)
■ B-Offset adjustment Value (default 128)
7.2. White balance. Value.
7.3. Temperature Threshold
■ Threshold Down Low 20
■ Threshold Up Low 23
■ Threshold Down High 70
■ Threshold Up High 75
8. USB DOWNLOAD(*.epk le download)
■ Put the USB Stick to the USB socket
■ Press Menu key, and move OPTION
■ Press “FAV” Press 7 times
■ Select download le (epk le)
■ After download is nished, remove the USB stick.
■ Press “IN-START” key of ADJ remote control, check the
S/W version.
9. Tool option
Center(Default)
COOL Mid Warm
R Gain 192 192 192
G Gain 192 192 192
B Gain 192 192 192
R Cut 64 64 64
G Cut 64 64 64
B Cut 64 64 64
Sufx : WZ,WH,WF,WD,WS 60PB6500-SA
Tool option 1 16411
Tool option 2 2577
Tool option 3 16257
Tool option 4 14184
Tool option 5 51218
Tool option 6 400
Country Group Code 03
Country Group BR
Country BR
- 11 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
172mV 115mV
540mV 420mV
M1L
RS-232C
RS-232C (Commercial)
DEMOD
X-tal
(24MHz)
Serial Flash
8M x 8bit
DDR2
64Mbit
IF
AV/COMP
(Hybrid)
Y(CVBS)/Cb/Cr
AV/COMP/DVI
L/R
L/R
HDMI (Side)
TMDS/DDC
Video
Front
End
Audio
Front
End
HDMI
RX
LVDS out
HD/ FHD
HD/SD
Video
Encoder
TAS5733
(Digital AMP)
I2S
MCLK
Audio
DSP
SPDIF Out
UART
RX/TX
Air/Cable
NTSC
/ATSC
Side USB
USB2.0
LVDS
Con.
HD
FHD
IF(ATSC)
Analog
Demod
IF(NTSC)
EEPROM
64K x 8bit
MODULE
UART
BLOCK DIAGRAM
- 12 - LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
900
910
400
580
200
520 120
560
301
305
300
302
303
304
208
206
201
204
240
205
601
LV1
A2
A10 A9
202
207
203
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_ADDR[7]
CI_ADDR[0]
CI_ADDR[9]
CI_ADDR[14]
CI_ADDR[1]
CI_ADDR[10]
CI_ADDR[4]
CI_ADDR[6]
BUF2_FE_TS_DATA[0-7]
CI_ADDR[12]
CI_ADDR[3]
CI_ADDR[8]
CI_ADDR[5]
CI_ADDR[13]
CI_ADDR[2]
CI_ADDR[11]
PCM_D[0-7]
PCM_D[3]
PCM_D[4]
PCM_D[5]
PCM_D[6]
PCM_D[7]
PCM_D[0]
PCM_D[1]
PCM_D[2]
BUF2_FE_TS_DATA[0]
BUF2_FE_TS_DATA[1]
BUF2_FE_TS_DATA[2]
BUF2_FE_TS_DATA[3]
BUF2_FE_TS_DATA[4]
BUF2_FE_TS_DATA[5]
BUF2_FE_TS_DATA[6]
BUF2_FE_TS_DATA[7]
BUF1_FE_TS_DATA[0-7]
BUF2_FE_TS_DATA[2]
BUF2_FE_TS_DATA[5]BUF1_FE_TS_DATA[5]
BUF1_FE_TS_DATA[2]
BUF2_FE_TS_DATA[4]
BUF2_FE_TS_DATA[7]
BUF2_FE_TS_DATA[1]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[4]
BUF1_FE_TS_DATA[1]
BUF2_FE_TS_DATA[3]
BUF2_FE_TS_DATA[6]
BUF2_FE_TS_DATA[0]
BUF1_FE_TS_DATA[6]
BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[0]
AV/SC1_R_IN
BUF2_FE_TS_DATA[0-7]
+3.3V_CI
BUF1_FE_TS_DATA[0-7]
REG /PCM_REG
SCART1_MUTE
CI_IOWR
PCM_A[7]
PCM_A[6]
BUF2_FE_TS_SYN
SC_ID_DSUB_HSYNC
PCM_D[0-7]
P_17V
CI_TS_VAL
/PCM_CE
CI_OE
BUF2_FE_TS_DATA[0-7]
CI_TS_CLK
CI_TS_DATA[5]
PCM_5V_CTL
BUF2_FE_TS_CLK
PCM_A[2]
PCM_A[10]
SCART1_Rout
PCM_A[8]
CI_WE
SC_DSUB_G+
CI_IORD
+3.3V
SC_DSUB_R+
/CI_CD1
CI_ADDR[13]
/PCM_IOWR
CI_IORD
CI_ADDR[14]
CI_ADDR[0-14]
SC_DSUB_B+
/PCM_IORD
PCM_A[13]
PCM_A[1]CI_ADDR[6]
BUF1_FE_TS_CLK
/PCM_WAIT
CI_TS_DATA[6]
AV/SC1_L_IN
AV/SC1_CVBS_IN
/PCM_IRQA
CI_OE
PCM_A[12]
PCM_A[0]
CI_TS_DATA[7]
CI_WE
CI_TS_DATA[2]
CI_ADDR[3]
CI_TS_DATA[4]
BUF2_FE_TS_VAL_ERR
CI_ADDR[8]
PCM_A[3]
BUF1_FE_TS_SYN
CI_DET
CI_TS_DATA[0]
CI_IOWR
SCART1_Lout
CI_TS_SYNC
CI_ADDR[0]
PCM_A[5]
CI_ADDR[1]
CI_ADDR[2]
/PCM_WE
PCM_A[11]
CI_TS_DATA[3]
BUF2_FE_TS_SYN
CI_ADDR[12]
CI_ADDR[4]
PCM_A[4]
CI_ADDR[7]
BUF2_FE_TS_CLK
SC_FB_DSUB_VSYNC
BUF1_FE_TS_VAL_ERR
CI_ADDR[5]
BUF2_FE_TS_VAL_ERR
+5V_CI_ON
+5V
CI_ADDR[11]
CI_ADDR[10]
PCM_A[9]
+3.3V_CI
+3.3V
REG
/CI_CD2
/PCM_OE
CI_TS_DATA[1]
+5V_CI_ON
PCM_A[14]
CI_ADDR[9]
PCM_RST
+5V
+3.3V_CI
AV2_L_IN
AV2_R_IN
AV2_CVBS_DET
+5V
DTV/MNT_VOUT
/CI_CD1
/CI_CD2
IC104-*1
SN74LVC1G32DCKR
OR_GARE_CI_TI
3
GND
2
B
4Y
1
A5VCC
CI_DET
/PCM_CD
+3.3V_CI +3.3V_CI
+5V
+5V
SC1/COMP1_DET
AV2_L_IN1
AV2_R_IN1
R120
2.7K
EU
R121
10K
R151
10K
EU
AR102 33
EU
R103
100
EU
R123 33
EU
R145
6.8K
EU
R153
5.6K
EU
AR103
33
EU
R104
10K
R114
10K
EU
R116
470K
R148
15K
EU
AR105 33
EU
R149
15K
EU
AR106 33
EU
R126
12K
R132 100
EU
R138
2K
EU
AR109
33EU
AR110
33
EU
R100 33
EU
R101 33
EU
AR108
33EU
R111
10K
EU
AR104
33
EU
R124
10K
R110
0
READY
R127
12K
R102
100
EU
R130 33EU
R131 33EU
R165
10K
EU
R112
0
READY
R133
10K
EU
R139
2K
EU
R105 1K
GROWTH
AR100 33
EU
R154
5.6K
EU
R115
470K
AR107 33
EU
R150
10K
EU
R109
10K
EU
R128 0
READY
R152
6.8K
EU
R137
470
EU
R140
470
EU
R156 33
EU
R157 33
EU
R155 100EU
R119
75
EU
R106
75
EU
R108
75
EU
R107
75
EU
R117
75
EU
R1674
100K
EU
AR111
100
1/16W EU AR112
100
1/16W EU
R159
220K
EU
R158
220K
EU
R134
47
EU
R125
10K
EU
R1660
EU
R129 10K
EU
R135
10K
EU
R147
75
EU
R169
0
EU
R168
0
EU
R1700
EU
R171 1K
EU
C111
220pF
50V
EU
C107
5600pF
50V
EU
JK102
10067972-000LF
EU
G1G2
57
21
52
16
10
47
41
5
36
59
23
45
54
18
49
43
13
7
38
2
25
56
20
51
15
9
46
40
4
35
58
22
53
17
11
48
42
12
6
37
1
24
55
19
50
44
14
8
39
3
2660
2761
2862
2963
3064
31
32
33
34
65
66
67
68
69
C100
22uF
10V
EU
C108
5600pF
50V
EU
IC100
TC74LCX244FT
EU
3
2Y4
2
1A1
4
1A2
1
1OE
6
1A3
5
2Y3
7
2Y2
8
1A4
9
2Y1
10
GND 11 2A1
12 1Y4
13 2A2
14 1Y3
15 2A3
16 1Y2
17 2A4
18 1Y1
19 2OE
20 VCC
C137
0.1uF
16V
EU
C101
0.1uF
16V
EU
C114
27pF
50V
EU
L101
EU
120-ohm
C109
27pF
50V
EU
IC101
AZ4580MTR-E1
3
IN1+
2
IN1-
4
VEE
1
OUT1
5IN2+
6IN2-
7OUT2
8VCC
MMBT3904(NXP)
Q101
EU
JK100
PSC008-02
EU
1AUDIO_R_OUT
2AUDIO_R_IN
3AUDIO_L_OUT
4AUDIO_GND
5B_GND
6AUDIO_L_IN
7B_OUT
8ID
9G_GND
10 D2B_IN
11 G_OUT
12 D2B_OUT
13 R_GND
14 RGB_GND
15 R_OUT
16 RGB_IO
17 SYNC_GND1
18 SYNC_GND2
19 SYNC_OUT
20 SYNC_IN
21 COM_GND
23
SHIELD
22 AV_DET
MMBT3904(NXP)
Q102
EU
C115
27pF
50V
EU
C136
0.1uF
16V
READY
C105
0.1uF
16V
EU
JP112
JP113
JP114
JP115
VA100
EU
IC102
AP2151WG-7
EU
3FLG
2GND
4
EN
1OUT
5
IN
C117
1000pF
50V
C118
1000pF
50V
C103
1uF
25V
EU
L100
BLM18PG121SN1D
EU
C119
330pF
EU
C120
330pF
EU
IC104
74LVC1G32GW
OR_GARE_CI_PHILIPS
3GND
2A
4 Y
1B 5 VCC
C102 2pF
C104
0.1uF
EU
16V
VA101
EU
C112
10uF
10V
EU
C113
10uF
10V
EU
VA104
VA105
EU
VA102
EU
VA103 VA106
C138
0.1uF
READY
C139
68pF
50V
EU
L102
CM2012FR22KT
220nH
EU
C140
68pF
50V
EU
SCART,CI Slot
L14
1
DTV_R_OUT
<CI SLOT>
<Full SCART>
2013-08-06
PDP L14
EAX65405603
10
JIG_GND
<CI DETECT>
<CI SWITCH>
<CI ENABLE>
<3.3V_CI>
Close to mstar
Close to mstar
Close to mstar
AV_COMMON
Copyright © 2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Fiber Optic
Fiber Optic
USB DOWN STREAM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PM_RXD
SPDIF_OUT
CEC_REMOTE_S7
+5V
+3.3V_ST
+3.3V_ST
CEC_REMOTE
PM_TXD
RGB_DDC_SCL
AV2_CVBS_DET
CEC_REMOTE
D0-_HDMI3
HPD4
D1+_HDMI3
DDC_SCL_4
CK+_HDMI3
D0+_HDMI3
5V_DET_HDMI_2
D1-_HDMI3
CK-_HDMI3
D2-_HDMI3
DDC_SDA_4
D2+_HDMI3
RGB_DDC_SDA
AV/SC1_CVBS_IN
MHL_CD_SENSE
5V_HDMI_3
+5V
DDC_SDA_4
DDC_SCL_4
+3.3V_ST
5V_HDMI_3
+3.3V_ST
SIDE_USB_DP
+5V_USB
SIDE_USB_DM
JK204-*1
2F01TC1-CLM97-4F
SPDIF-JACK-FOXCONN
3
VIN
2
VCC
1
GND
4
SHIELD
COMP2_DET
+3.3V
COMP2_L_IN
COMP2_Pr+
COMP2_Y+
COMP2_Pb+
AV_CVBS_DET
COMP2_R_IN
AV2_L_IN1
AV2_R_IN1
AV2_R_IN
AV2_L_IN
R278
10K
R285
100
R284 22
R276 100
USA
R268
100
R283 22
R279
10K
R277
100
USA
R231
33
R238
1.8K
R244
3.3K
R246
33
R203
0GROWTH
R234
0GROWTH
R230
75
GROWTH
R222
300K
R209 100
R248
2.7K
R247
2.7K
R252
75
R256 10K
R262
12K
R254
470K
R265
10K
R259
10K
R255
470K
R251
75
R263
12K
R253
75
R266
1K
R267
1K
R25710K
R286
0GROWTH
R287
0GROWTH
C227
0.1uF
16V
MAX3232
C225
0.1uF
16V
MAX3232
IC206
MAX3232CDR
MAX3232
3C1-
2V+
4C2+
1C1+
6V-
5C2-
7DOUT2
8RIN2
9
ROUT2
10
DIN2
11
DIN1
12
ROUT1
13
RIN1
14
DOUT1
15
GND
16
VCC
C229
0.1uF
16V
MAX3232
JP241
C226
0.1uF
16V
MAX3232
C220
10pF
50V
JK204
JST1223-001
SPDIF-JACK-SOLTEAM
1
GND
2
VCC
3
VINPUT
4
FIX_POLE
C219
0.1uF
16V
C228
0.1uF
16V
MAX3232
JK202
PPJ231-01
GROWTH
8
6
7
5
4
P603
12505WS-04A00
1
2
3
4
5
C206
0.047uF
25V
D210
READY
5.6V
D201
ESD_HDMI
D211
MMBD6100
A2
C
A1
D212
MMBD6100
A2
C
A1
P602
12507WS-04L
1
2
3
4
5
JK203
3AU04S-305-ZC-(LG)
1234
5
D213
RCLAMP0502BA
READY
C201
10uF
10V
ZD200
5V
READY SD05 C200
0.1uF
16V
JK214
PEJ038-4G6
USA
3 M3_DETECT
4 M4
5 M5_GND
1 M1
6 M6
JK201
14
13
5D1_GND
20
BODY_SHIELD
12
11
2D2_GND
19
18
10 CK+
4D1+
1D2+
17
9D0-
8D0_GND
3D2-
16
7D0+
6D1-
15
VA211
VA217
VA208
VA210
C205
1000pF
50V
C204
1000pF
50V
VA212
VA216
VA209
JK208
PPJ234-22
3
[YL/GN]SWITCH
1
[YL/GN]FIX
2
[YL/GN]SHUNT
4
[BL]EARTH
5
[BL]SWITCH
6
[RD1]EARTH
8
[RD1]SWITCH
7
[RD1]SHUNT
9
[WH]SWITCH
10
[RD2]SHUNT
11
[RD2]SWITCH
12
[RD2]FIX
IC208
RCLAMP0524PA
ESD_HDMI_SEMTECH
1
8
2
7
3
6
4
5
9
10
IC209
RCLAMP0524PA
ESD_HDMI_SEMTECH
1
8
2
7
3
6
4
5
9
10
C230
10uF
10V
READY
<SPDIF>
<RS232C>
L14
JACK INTERFACE
2
2013-08-06
10
<AV (Growth & SCA)>
<FOR COMMERCIAL>
<Mstar Debug 4P>
MHL Spec
<HDMI/MHL>
<CEC>
<SIDE USB>
<COMPONENT>
Copyright © 2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TUNER
BUF1_FE_TS_DATA[6]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[2]
BUF1_FE_TS_DATA[5]
BUF1_FE_TS_DATA[1]
BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[0]
BUF1_FE_TS_DATA[4]
TU_GND_B
R309 33
IF_AGC_MAIN
C310
100pF
50V
F_NIM
+3.3V_TU
C302
0.1uF
16V
F_NIM
R306
0
C301
0.1uF
16V
AR302 0
F_NIM
R310
1K
IF_P_MSTAR
+3.3V_TU
AR300 0
F_NIM
C312
0.1uF
16V
RF_SWITCH_CTL
TU_SCL
BUF1_FE_TS_CLK
C308
47pF
50V
AR301 0
F_NIM
R305
10
DEMOD_RESET
C321
0.1uF
16V
DEMOD_SCL
RF_SWITCH_CTL
R308 33
TU_GND_B
+3.3V_TU
R303 22
F_NIM
TU_GND
BUF1_FE_TS_VAL_ERR
C309
47pF
50V
L301
BLM18PG121SN1D
F_NIM
+3.3V_S2_DE
C300
100pF
50V
TU_GND_B
IF_N_MSTAR
C303
20pF
50V
F_NIM
C307
100pF
50V
R322
1K
RF_SWITCH_CTL
TU_GND_B
R301 22
F_NIM
R300
10
F_NIM
+3.3V_TU
+1.2V_TU
C305
0.1uF
16V
F_NIM
C319
22uF
10V
C314
0.1uF
16V
F_NIM
BUF1_FE_TS_DATA[0-7]
BUF1_FE_TS_SYN
TU_SDA
R323
20K
RF_SWITCH_CTL
C326
0.1uF
16V
F_NIM
LNB_OUT
R312
1K
TU_GND_B
C313
0.1uF
16V
F_NIM
C324
0.1uF
C311
100pF
50V
F_NIM
LNB_TX
FE_TS_ERR
R304
10
R302
51
F_NIM
C304
20pF
50V
F_NIM
L300
UBW2012-121F
+3.3V_LNA
C320
0.1uF
16V
C322
22uF
10V
C306
0.1uF
16V
TU_GND
DEMOD_SDA
+3.3V_LNA
+3.3V_S2_DE
R329
0READY
R327
0READY
R325
0READY
R328
0READY
TU_GND
R324
0
DVB-T/C_Tuner
R326
0READY
TU_GND
TU_GND
TDJH-G101D
TU300
DVB-T/C_Tuner
47
SHIELD
6IF[P]
7IF[N]
8NC_2
9NC_3
1B1[+3.3V]
2NC_1
3IF_AGC
4SCL
5SDA
A1
A1 B1 B1
R330
2.2K
READY
R331
2.2K
READY
+3.3V_S2_DE
+3.3V_S2_DE
TDJK-T101F
TU303
TU_BR_PA
47
SHIELD
6IF[P]
7IF[N]
8NC_1
9NC_2
1B1[+3.3V]
2RF_S/W_CTL
3IF_AGC
4SCL
5SDA
A1
A1 B1 B1
TU302
TDJM-K101F
TU_CO
1B1[+3.3V]
2RF_SW_CTL
3AIF_AGC
4SCL_RF
5SDA_RF
6AIF[P]
7AIF[N]
8NC_1
9NC_2
10 NC_3
11 NC_4
12 ERROR
13 GND_1
14 MCLK
15 SYNC
16 VAILD
17 D0
18 D1
19 D2
20 D3
21 D4
22 D5
23 D6
24 D7
25 RESET_DEMOD
26 B2[+3.3V]
27 SCL_DEMOD
28 B3[+1.1V]
29 NC_5
30 SDA_DEMOD
47
SHIELD
B1 B1
A1
A1
TU301
TDJM-G101D
DVB-T2/C/S2_Tuner
1B1[+3.3V]
2NC_1
3AIF_AGC
4SCL_RF
5SDA_RF
6AIF[P]
7AIF[N]
8NC_2
9NC_3
10 NC_4
11 B2[+3.3V]
12 ERROR
13 GND_1
14 MCLK
15 SYNC
16 VALID
17 D0
18 D1
19 D2
20 D3
21 D4
22 D5
23 D6
24 D7
25 RESET_DEMOD
26 B3[+3.3V]
27 SCL_DEMOD
28 B4[+1.1V]
29 F22_OUTPUT
30 SDA_DEMOD
31 LNB
47
47
32 GND
B1 B1
A1
A1
C323
10uF
10V
F_NIM
C328
10pF
READY
C327
10pF
READY
TDJH-H101F
TU300-*1
TU_KR
47
SHIELD
6IF[P]
7IF[N]
8NC_2
9NC_3
1B1[+3.3V]
2NC_1
3IF_AGC
4SCL
5SDA
A1
A1 B1 B1
TU301-*1
TDJM-G105D
TU_Thailand
1B1[+3.3V]
2NC_1
3AIF_AGC
4SCL_RF
5SDA_RF
6AIF[P]
7AIF[N]
8NC_2
9NC_3
10 NC_4
11 B2[+3.3V]
12 ERROR
13 GND_1
14 MCLK
15 SYNC
16 VAILD
17 D0
18 D1
19 D2
20 D3
21 D4
22 D5
23 D6
24 D7
25 RESET_DEMOD
26 B3[+3.3V]
27 SCL_DEMOD
28 B4[+1.1V]
29 F22_OUTPUT
30 SDA_DEMOD
47
SHIELD
B1 B1
A1
A1
3 10
2013-08-06
TU300-1 ATSC
TU301
TDJH=H101F
TDJH-G101D
close to Tuner
HNIM
HNIM X
OPT4
X
W/O AD
W/O AD
TDJM-G101D
W/O AD
<+3.3V_LNA>
TU302
DVB-S2/T2
TU303
HNIM
TDJM-K101F
X
should be guarded by ground
TDJK-T101F
TUNER OPT2
DVB-T2
<L14 TUNER T2/C/S2>
OPT1 OPT3
TU300
<+3.3V_S2_DE>
SBTVD
DVB-T/C
GND seperation for DVB-T2, SVBTVD tuner
L14
Tuner
Copyright © 2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCM_D[6]
PCM_D[7]
PCM_D[5]
PCM_D[0-7]
PCM_D[0]
PCM_D[3]
PCM_D[1]
PCM_D[2]
PCM_D[4]
PCM_A[12]
PCM_A[8]
PCM_A[1]
PCM_A[9]
PCM_A[6]
PCM_A[13]
PCM_A[11]
PCM_A[14]
PCM_A[5]
PCM_A[0]
PCM_A[7]
PCM_A[3]
PCM_A[2]
PCM_A[4]
PCM_A[10]
BUF1_FE_TS_DATA[7]
BUF1_FE_TS_DATA[6]
BUF1_FE_TS_DATA[3]
BUF1_FE_TS_DATA[1]
BUF1_FE_TS_DATA[5]
BUF1_FE_TS_DATA[0]
BUF1_FE_TS_DATA[2]
BUF1_FE_TS_DATA[4]
CI_TS_DATA[6]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[5]
CI_TS_DATA[4]
CI_TS_DATA[3]
CI_TS_DATA[7]
CI_TS_DATA[0]
C436
10uF
C487 0.1uF
10uFC455
C431 0.1uF
C482 0.1uF
L401
BLM18PG121SN1D
C438 0.1uF
P_SCL
C441 0.1uF
I2C_SCL
10uFC435
+3.3V
10uFC434
+1.5V_DDR
C401
0.1uF
C478 0.1uF
+1.10V_VDDC
D400
BAW56 GEANDE
+1.10V_VDDC
C442
0.1uF
C484 0.1uF
AVDD_NODIE
C480 0.1uF
C465 10uF
VDD33
C440 0.1uF
L400
BLM18PG121SN1D
C445
0.1uF
SOC_RESET
+3.3V_ST
I2C_SDA
10uFC457
+3.3V_ST
C474 0.1uF
C402
0.1uF
C490 0.1uF
C444
0.1uF
C432
0.1uF
P_SDA
+3.3V
R403
100K
R408
10
C4003
0.1uF
C4004
0.1uF
C497
10uF
10V
R451
2.2K
R450
2.2K
CEC_REMOTE_S7 R406
22
P_SDA
SPDIF_OUT
C4032.2uF
C404
2.2uF
AV/SC1_L_IN
AV/SC1_R_IN
SCART1_Lout
SCART1_Rout
P_SCL R404
22
LED_R/BUZZ
COMP2_DET
KEY2
KEY1
17V_DET
VS_DET
SPI_SCK
R407 33
SPI_SDI
SPI_SDO
R413 33
/SPI_CS
R414 33
RGB_DDC_SCL
R41522
R41622 RGB_DDC_SDA
PM_TXD
PM_RXD
I2C_SCL
I2C_SDA
AC_DET
R417
100
RL_ON
5V_ON
RXB4+
RXB4-
RXB3+
RXB3-
RXBCK+
RXBCK-
RXB2-
RXB2+
RXB1+
RXB1-
RXB0+
RXB0-
RXA4-
RXA4+
RXA3-
RXA3+
RXACK+
RXACK-
RXA2-
RXA2+
RXA1-
RXA1+
RXA0+
RXA0-
PM_MODEL_OPT_0
DEMOD_RESET
RF_SWITCH_CTL
AMP_SCL
5V_DET_HDMI_2
/AMP_RESET
AMP_SDA
PCM_5V_CTL
PCM_D[0-7]
PCM_A[0-14]
PCM_RST
/PCM_IRQA
/PCM_IOWR
/PCM_OE
/PCM_IORD
/PCM_WE
/PCM_CE
/PCM_WAIT
/PCM_REG
USB1_OCD
USB1_CTL
AR400
22
/PF_CE1
/PF_CE0
/PF_WP
PF_ALE
AR401
22
/PF_OE
/PF_WE
/F_RB
BUF1_FE_TS_CLK
BUF1_FE_TS_VAL_ERR
BUF1_FE_TS_SYN
BUF1_FE_TS_DATA[0-7]
CI_TS_SYNC
CI_TS_CLK
CI_TS_VAL
CI_TS_DATA[0-7]
C462 0.1uF
IF_P_MSTAR
C461 0.1uF
IF_N_MSTAR
TU_SDA
TU_SCL
R471 100
C469
0.047uF
25V
L410
BLM18PG121SN1D
R469
10K
IF_AGC_MAIN
+3.3V
C468
0.1uF
C4140.047uF EU
R436
33 EU
C415
0.047uF EU R43568 EU
R43768 EU
C4160.047uF EU
C4170.047uF EU R43833 EU
R42868 EU
C4180.047uF EU
R42933 EU
C4190.047uF EU
SC_FB_DSUB_VSYNC
SC_ID_DSUB_HSYNC
SC_DSUB_R+
SC_DSUB_B+
SC_DSUB_G+
R44433
R43433
R44633
COMP2_Pr+
R44568
COMP2_Pb+
C4390.047uF
C429
0.047uF
COMP2_Y+
C4330.047uF
C4370.047uF
C4280.047uF
R43368
R443
68
C4300.047uF
IR
DDC_SDA_4
CK-_HDMI3
D0-_HDMI3
D1-_HDMI3
D2-_HDMI3
HPD4
CK+_HDMI3
D0+_HDMI3
D1+_HDMI3
D2+_HDMI3
DDC_SCL_4
R464
2.2K R474
2.2K
UART_TXD
UART_RXD
R447
1M
X400
24MHz
4
GND_2
1
X-TAL_1
2
GND_1
3
X-TAL_2
AVDD_DMPLL
+1.10V_VDDC
VDD33
AVDD_NODIE
VDD33
+1.5V_DDR
+1.10V_VDDC
VDD33
AVDD_NODIE
AVDD_AU33
C424
0.1uF
AVDD_DMPLL
10uF
10V
C409
L404
BLM18PG121SN1D
L407
BLM18PG121SN1D
L406
BLM18PG121SN1D
C423
0.1uF
AVDD_AU33
C410
0.1uF
C412
0.1uF
R42533 AV/SC1_CVBS_IN
R42633C4490.047uF
R48168C4130.047uF
DTV/MNT_VOUT
COMP2_Y+
C4480.047uF
AUD_MASTER_CLK_0
AUD_SCK
SIDE_USB_DM
SIDE_USB_DP
L403
BLM18SG121TN1D
SOC_RESET
R419
22 EU
/PCM_CD
PM_LED
MODEL_OPT_1
MODEL_OPT_4
MODEL_OPT_6
10uF
10V
C408
10uF
10V
C407
MODEL_OPT_0
MODEL_OPT_2
AVDD5V_MHL
R405 22
EU
MHL_OCP_EN
MHL_CD_SENSE
R4820
DISP_EN
MODEL_OPT_5
+1.10V_VDDC
AUVRM
AUVRM
AUD_LRCK
AUD_LRCH
C491
0.1uF
+1.10V_VDDC
+1.10V
/VBUS_EN
C493
10uF
C492
10uF
SCART1_MUTE
UART_TXD
UART_RXD
CI_DET
MODEL_OPT_7
MODEL_OPT_3
/MHL_OCP_DET
AMP_MUTE
DEMOD_SDA
DEMOD_SCL
R400100
R453
1.8K
R452
1.8K
R420
22
R421
22
R454
0
R455
0
+3.3V
R486
10K
READY
R485
10K
READY
R488
10K
READY
R487
10K
READY
/FLASH_WP
VS_ON
IC1202
LGE2132(M1A_256M)
NON_BRAZIL
GPIO78
Y1
GPIO79
W4
I2C_SCKM3/I2C_DDCR_CK/GPIO77
K17
I2C_SDAM3/I2C_DDCR_DA/GPIO76
J15
SDAM2/GPIO55
U8
SCKM2/GPIO56
T7
SCKM0/GPIO58
U7
SDAM0/GPIO59
V7
I2S_IN_BCK/GPIO159
F6
I2S_IN_SD/GPIO160
G6
I2C_SCKM1/GPIO80
AA4
I2C_SDAM1/GPIO81
Y4
ET_TXD[0]/GPIO62
J6
EXT_TX_CLK/GPIO64
K6
I2S_IN_WS/GPIO158
G7
ET_COL/GPIO60
J4
ET_TXD[1]/GPIO61
J5
LCK/GPIO194
H19
LDE/GPIO195
G20
LHSYNC/GPIO196
G19
LVSYNC/GPIO197
G21
UART2_RX/GPIO69
J17
UART2_TX/GPIO70
J16
UART3_TX/GPIO52
E8
UART3_RX/GPIO53
D7
GPIO46[CTS]
U6
GPIO47[RTS]
V6
UART1_TX/GPIO48
K15
UART1_RX/GPIO49
L16
ET_TX_EN/GPIO63
H5
ET_RXD[0]/GPIO65
K5
ET_MDC/GPIO66
K4
ET_MDIO/GPIO67
H6
ET_RXD[1]/GPIO68
L5
PCMADR[0]/NF_AD[0]/GPIO130
U17
PCMADR[1]/NF_AD[1]/GPIO129
R18
PCMADR[2]/NF_AD[2]/GPIO127
V17
PCMADR[3]/NF_AD[3]/GPIO126
R16
PCMADR[4]/NF_AD[4]/GPIO104
U16
PCMADR[5]/NF_AD[5]/GPIO106
T17
PCMADR[6]/NF_AD[6]/GPIO107
W18
PCMADR[7]/NF_AD[7]/GPIO108
U20
PCMADR[8]/GPIO113
Y19
PCMADR[9]/GPIO115
AA19
PCMADR[10]/GPIO119
AA20
PCMADR[11]/GPIO117
W21
PCMADR[12]/GPIO109
V20
PCMADR[13]/GPIO112
Y17
PCMADR[14]/GPIO111
V18
PCMCD_N/GPIO135
V19
PCMCE_N/GPIO120
W19
PCMDATA[0]/GPIO131
U18
PCMDATA[1]/GPIO132
V16
PCMDATA[2]/GPIO133
W17
PCMDATA[3]/GPIO125
Y20
PCMDATA[4]/GPIO124
R15
PCMDATA[5]/GPIO123
AA18
PCMDATA[6]/GPIO122
T15
PCMDATA[7]/GPIO121
Y21
PCMIORD_N/GPIO116
W20
PCMIOWR_N/GPIO114
V21
PCMIRQA_N/GPIO110
Y18
PCMOE_N/GPIO118
T16
PCMREG_N/GPIO128
R17
PCM_RESET/GPIO134
T18
PCMWAIT_N/GPIO105
W16
PCMWE_N/GPIO198
U15
TS0CLK/GPIO92 V10
TS0DATA[0]/GPIO82 T14
TS0DATA[1]/GPIO83 T13
TS0DATA[2]/GPIO84 U13
TS0DATA[3]/GPIO85 V15
TS0DATA[4]/GPIO86 U12
TS0DATA[5]/GPIO87 V13
TS0DATA[6]/GPIO88 U14
TS0DATA[7]/GPIO89 T11
TS0SYNC/GPIO91 T12
TS0VALID/GPIO90 V12
TS1CLK/GPIO103 Y14
TS1DATA[0]/GPIO93 Y16
TS1DATA[1]/GPIO94 AA15
TS1DATA[2]/GPIO95 Y13
TS1DATA[3]/GPIO96 AA16
TS1DATA[4]/GPIO97 W12
TS1DATA[5]/GPIO98 AA13
TS1DATA[6]/GPIO99 W14
TS1DATA[7]/GPIO100 W13
TS1SYNC/GPIO102 Y15
TS1VALID/GPIO101 W15
PM_SPI_SCZ1/GPIO_PM[6]/GPIO13 B3
PM_SPI_SCK/GPIO1 A3
PM_SPI_SCZ0/GPIO0 A4
PM_SPI_SDI/GPIO2 C3
PM_SPI_SDO/GPIO3 A2
RP B1
TN C2
TP C1
RN B2
SPDIF_IN/GPIO161 D2
SPDIF_OUT/GPIO162 D1
HWRESET D8
IRIN/GPIO5 E5
DDCA_CK/UART0_RX G4
DDCA_DA/UART0_TX G5
PWM0/GPIO71 J18
PWM1/GPIO72 K18
PWM2/GPIO73 K16
PWM3/GPIO74 L18
PWM4/GPIO75 L17
NF_ALE/GPIO146 T8
NF_CEZ/GPIO142 T9
NF_CLE/GPIO141 U9
NF_RBZ/GPIO147 U11
NF_REZ/GPIO144 V9
NF_WEZ/GPIO145 U10
NF_WPZ/GPIO199 T10
IF_AGC W2
SIFM W1
SIFP W3
IM V2
IP V1
XIN AA2
XOUT Y2
IC1202
LGE2132(M1A_256M)
NON_BRAZIL
ARC0
M4
RXC0N
W7
RXC0P
Y8
RXC1N
W8
RXC1P
Y9
RXC2N
AA9
RXC2P
W9
RXCCKN
AA7
RXCCKP
Y7
CEC/GPIO6
N2
DDCDA_CK/GPIO27
E3
DDCDA_DA/GPIO28
E2
DDCDC_CK/GPIO31
W6
DDCDC_DA/GPIO32
AA6
HOTPLUGA/GPIO23
L4
HOTPLUGC/GPIO25
Y6
RXA0N
F1
RXA0P
G3
RXA1N
G1
RXA1P
G2
RXA2N
H3
RXA2P
H2
RXACKN
F3
RXACKP
F2
EAR_OUTL
U4
EAR_OUTR
T4
AUL1
P2
AUL2
R2
AUL3
T1
AUR1
R3
AUR2
R1
AUR3
T3
AUOUTL0
U2
AUOUTR0
V3
AUVAG
T2
CVBSOUT1 T6
CVBS0 V5
CVBS1 U5
CVBS2 T5
VCOM V4
I2S_OUT_BCK/GPIO165 E4
I2S_OUT_MCK/GPIO163 F4
I2S_OUT_SD/GPIO166 F7
I2S_OUT_WS/GPIO164 F5
USB0_DM C4
USB1_DM Y12
USB0_DP B4
USB1_DP AA12
BIN0M J2
BIN0P J3
GIN0M K3
GIN0P J1
RIN0M K2
RIN0P K1
HSYNC0 M6
VSYNC0 L6
BIN1M L2
BIN1P L3
GIN1M M1
GIN1P M2
RIN1M N1
RIN1P N3
SOGIN1 M3
IC1202
LGE2132(M1A_256M)
NON_BRAZIL LVA4P/TTL_B[0]/HCONV/GPIO170
U19
LVA4M/TTL_B[1]/E_O/GPIO171
T20
LVA3P/TTL_B[2]/FB/GPIO172
T21
LVA3M/TTL_B[3]/OPT_P/GPIO173
T19
LVACKP/TTL_B[4]/MCLK/GPIO174
R21
LVACKM/TTL_B[5]/GCLK/GPIO175
R20
LVA2P/TTL_B[6]/GST/GPIO176
R19
LVA2M/TTL_B[7]/POL/GPIO177
P20
LVA1P/TTL_G[0]/EPI0+/GPIO178
P19
LVA1M/TTL_G[1]/EPI0-/GPIO179
N20
LVA0P/TTL_G[2]/EPI1+/GPIO180
N21
LVA0M/TTL_G[3]/EPI1-/GPIO181
N19
LVB4P/TTL_G[4]/EPI2+/GPIO182
M21
LVB4M/TTL_G[5]/EPI2-/GPIO183
M20
LVB3P/TTL_G[6]/EPI3+/GPIO184
M19
LVB3M/TTL_G[7]/EPI3-/GPIO185
L20
LVBCKP/TTL_R[0]/EPI4+/GPIO186
L19
LVBCKM/TTL_R[1]/EPI4-/GPIO187
K20
LVB2P/TTL_R[2]/EPI5+/GPIO188
K21
LVB2M/TTL_R[3]/EPI5-/GPIO189
K19
LVB1P/TTL_R[4]/EPI6+/GPIO190
J21
LVB1M/TTL_R[5]/EPI6-/GPIO191
J20
LVB0P/TTL_R[6]/EPI7+/GPIO192
J19
LVB0M/TTL_R[7]/EPI7-/GPIO193
H20
SAR0/GPIO35 D5
SAR1/GPIO36 F8
SAR2/GPIO37 E7
SAR3/GPIO38 E6
SAR4/GPIO39 D6
GPIO_PM[13]/GPIO20 W10
GPIO_PM[14]/GPIO21 Y10
PM_LED/GPIO4 P3
GPIO_PM[0]/GPIO7 Y3
PM_SPI_SCZ2/GPIO_PM[10]/GPIO17 Y5
GPIO_PM[15]/GPIO22 W11
GPIO_PM[4]/GPIO11 D3
GPIO_PM[7]/GPIO14 AA3
GPIO_PM[8]/GPIO15 W5
PWM_PM/GPIO200 D4
PM_UART_TX/GPIO_PM[1]/GPIO8 L15
PM_UART_RX/GPIO_PM[5]/GPIO12 Y11
IC1202
LGE2132(M1A_256M)
NON_BRAZIL AUVRM U3
GND_1 A6
GND_2 A13
GND_3 A15
GND_4 A18
GND_5 B12
GND_6 B14
GND_7 B16
GND_8 B17
GND_9 B19
GND_10 B20
GND_11 C9
GND_12 C10
GND_13 C21
GND_14 D9
GND_15 E20
GND_16 F9
GND_17 F11
GND_18 F13
GND_19 F15
GND_20 F17
GND_21 F19
GND_22 F21
GND_23 G8
GND_24 G9
GND_25 G10
GND_26 G11
GND_27 G12
GND_28 G13
GND_29 G14
GND_30 G15
GND_31 G16
GND_32 G17
GND_33 G18
GND_34 H7
GND_35 H8
GND_36 H9
GND_37 H10
GND_38 H11
GND_39 H12
GND_40 H13
GND_41 H14
GND_42 H15
GND_43 H16
GND_44 H17
GND_45 H18
GND_46 J7
GND_47 J8
GND_48 J9
GND_49 J10
GND_50 J11
GND_51 J12
GND_52 J13
GND_53 J14
GND_54 K8
GND_55 K10
GND_56 K11
GND_57 L10
GND_58 M5
GND_59 M7
GND_60 M8
GND_61 M9
GND_62 M10
GND_63 N4
GND_64 N5
GND_65 N6
GND_66 N7
GND_67 N8
GND_68 N9
GND_69 N10
GND_70 P4
GND_71 P5
GND_72 P6
GND_73 P7
GND_74 P9
GND_75 P10
GND_76 P15
GND_77 P16
GND_78 P17
GND_79 P18
GND_80 R10
GND_81 R11
GND_82 R12
GND_83 R13
GND_84 R14
GND_EFUSE K7
AVDD_AU33
R4
AVDD_DDR0_CLK
L11
AVDD_DDR1_CLK
L13
AVDD_DDR0_CMD
M11
AVDD_DDR1_CMD
K13
AVDD_DDR0_D_1
C5
AVDD_DDR0_D_2
K12
AVDD_DDR0_D_3
L12
AVDD_DDR1_D_1
C6
AVDD_DDR1_D_2
K14
AVDD_DDR1_D_3
L14
AVDD_DRAM_1
B5
AVDD_DRAM_2
B6
AVDD_DVI_USB_MPLL_1
R8
AVDD_DVI_USB_MPLL_2
R9
AVDD_MOD_1
L7
AVDD_MOD_2
L8
AVDD_NODIE
P8
AVDD_PLL
K9
AVDD3P3_DMPLL
R5
AVDDL_MOD
P11
DVDD_DDR_1
C7
DVDD_DDR_2
M13
DVDD_NODIE
R6
DVDD_RX_1_1
A7
DVDD_RX_1_2
M12
DVDD_RX_2_1
B7
DVDD_RX_2_2
M14
VDDC_1
N11
VDDC_2
N12
VDDC_3
N13
VDDC_4
N14
VDDC_5
N15
VDDC_6
P12
VDDC_7
P13
VDDC_8
P14
VDDP
L9
AVDD5V_MHL
AA10
AV2_CVBS_DET
AV_CVBS_DET
C4582.2uF
C4562.2uF
COMP2_L_IN
COMP2_R_IN
SC1/COMP1_DET
LNB_CTL
C411
1uF
C446
1uF
C467 1uF
C472 1uF
C452 8pF
X-TAL_8pF
C451 8pF
X-TAL_8pF
R410
220
10uF
10V
C427
C426
33pF
READY
C425
33pF
READY
IC1202-*1
LGE2131(M1A_128M)
BRAZIL
GPIO78
Y1
GPIO79
W4
I2C_SCKM3/I2C_DDCR_CK/GPIO77
K17
I2C_SDAM3/I2C_DDCR_DA/GPIO76
J15
SDAM2/GPIO55
U8
SCKM2/GPIO56
T7
SCKM0/GPIO58
U7
SDAM0/GPIO59
V7
I2S_IN_BCK/GPIO159
F6
I2S_IN_SD/GPIO160
G6
I2C_SCKM1/GPIO80
AA4
I2C_SDAM1/GPIO81
Y4
ET_TXD[0]/GPIO62
J6
EXT_TX_CLK/GPIO64
K6
I2S_IN_WS/GPIO158
G7
ET_COL/GPIO60
J4
ET_TXD[1]/GPIO61
J5
LCK/GPIO194
H19
LDE/GPIO195
G20
LHSYNC/GPIO196
G19
LVSYNC/GPIO197
G21
UART2_RX/GPIO69
J17
UART2_TX/GPIO70
J16
UART3_TX/GPIO52
E8
UART3_RX/GPIO53
D7
GPIO46[CTS]
U6
GPIO47[RTS]
V6
UART1_TX/GPIO48
K15
UART1_RX/GPIO49
L16
ET_TX_EN/GPIO63
H5
ET_RXD[0]/GPIO65
K5
ET_MDC/GPIO66
K4
ET_MDIO/GPIO67
H6
ET_RXD[1]/GPIO68
L5
PCMADR[0]/NF_AD[0]/GPIO130
U17
PCMADR[1]/NF_AD[1]/GPIO129
R18
PCMADR[2]/NF_AD[2]/GPIO127
V17
PCMADR[3]/NF_AD[3]/GPIO126
R16
PCMADR[4]/NF_AD[4]/GPIO104
U16
PCMADR[5]/NF_AD[5]/GPIO106
T17
PCMADR[6]/NF_AD[6]/GPIO107
W18
PCMADR[7]/NF_AD[7]/GPIO108
U20
PCMADR[8]/GPIO113
Y19
PCMADR[9]/GPIO115
AA19
PCMADR[10]/GPIO119
AA20
PCMADR[11]/GPIO117
W21
PCMADR[12]/GPIO109
V20
PCMADR[13]/GPIO112
Y17
PCMADR[14]/GPIO111
V18
PCMCD_N/GPIO135
V19
PCMCE_N/GPIO120
W19
PCMDATA[0]/GPIO131
U18
PCMDATA[1]/GPIO132
V16
PCMDATA[2]/GPIO133
W17
PCMDATA[3]/GPIO125
Y20
PCMDATA[4]/GPIO124
R15
PCMDATA[5]/GPIO123
AA18
PCMDATA[6]/GPIO122
T15
PCMDATA[7]/GPIO121
Y21
PCMIORD_N/GPIO116
W20
PCMIOWR_N/GPIO114
V21
PCMIRQA_N/GPIO110
Y18
PCMOE_N/GPIO118
T16
PCMREG_N/GPIO128
R17
PCM_RESET/GPIO134
T18
PCMWAIT_N/GPIO105
W16
PCMWE_N/GPIO198
U15
TS0CLK/GPIO92 V10
TS0DATA[0]/GPIO82 T14
TS0DATA[1]/GPIO83 T13
TS0DATA[2]/GPIO84 U13
TS0DATA[3]/GPIO85 V15
TS0DATA[4]/GPIO86 U12
TS0DATA[5]/GPIO87 V13
TS0DATA[6]/GPIO88 U14
TS0DATA[7]/GPIO89 T11
TS0SYNC/GPIO91 T12
TS0VALID/GPIO90 V12
TS1CLK/GPIO103 Y14
TS1DATA[0]/GPIO93 Y16
TS1DATA[1]/GPIO94 AA15
TS1DATA[2]/GPIO95 Y13
TS1DATA[3]/GPIO96 AA16
TS1DATA[4]/GPIO97 W12
TS1DATA[5]/GPIO98 AA13
TS1DATA[6]/GPIO99 W14
TS1DATA[7]/GPIO100 W13
TS1SYNC/GPIO102 Y15
TS1VALID/GPIO101 W15
PM_SPI_SCZ1/GPIO_PM[6]/GPIO13 B3
PM_SPI_SCK/GPIO1 A3
PM_SPI_SCZ0/GPIO0 A4
PM_SPI_SDI/GPIO2 C3
PM_SPI_SDO/GPIO3 A2
RP B1
TN C2
TP C1
RN B2
SPDIF_IN/GPIO161 D2
SPDIF_OUT/GPIO162 D1
HWRESET D8
IRIN/GPIO5 E5
DDCA_CK/UART0_RX G4
DDCA_DA/UART0_TX G5
PWM0/GPIO71 J18
PWM1/GPIO72 K18
PWM2/GPIO73 K16
PWM3/GPIO74 L18
PWM4/GPIO75 L17
NF_ALE/GPIO146 T8
NF_CEZ/GPIO142 T9
NF_CLE/GPIO141 U9
NF_RBZ/GPIO147 U11
NF_REZ/GPIO144 V9
NF_WEZ/GPIO145 U10
NF_WPZ/GPIO199 T10
IF_AGC W2
SIFM W1
SIFP W3
IM V2
IP V1
XIN AA2
XOUT Y2
IC1202-*1
LGE2131(M1A_128M)
BRAZIL
B_DDR3_A[0] E11
B_DDR3_A[1] F12
B_DDR3_A[2] D10
B_DDR3_A[3] B10
B_DDR3_A[4] E15
B_DDR3_A[5] B11
B_DDR3_A[6] F14
B_DDR3_A[7] C11
B_DDR3_A[8] D14
B_DDR3_A[9] A12
B_DDR3_A[10] F16
B_DDR3_A[11] D13
B_DDR3_A[12] D15
B_DDR3_A[13] C12
B_DDR3_A[14] E13
B_DDR3_BA[0] A9
B_DDR3_BA[1] D16
B_DDR3_BA[2] A10
B_DDR3_MCLK C13
B_DDR3_MCLKZ B13
B_DDR3_MCLKE E17
B_DDR3_ODT B8
B_DDR3_RASZ C8
B_DDR3_CASZ B9
B_DDR3_WEZ D11
B_RESET F10
B_DDR3_CS0 D12
B_DDR3_DQSL A19
B_DDR3_DQSU B18
B_DDR3_DQML C16
B_DDR3_DQMU D21
B_DDR3_DQSBL C18
B_DDR3_DQSBU C17
B_DDR3_DQL[0] A20
B_DDR3_DQL[1] A16
B_DDR3_DQL[2] C19
B_DDR3_DQL[3] C15
B_DDR3_DQL[4] C20
B_DDR3_DQL[5] C14
B_DDR3_DQL[6] B21
B_DDR3_DQL[7] B15
B_DDR3_DQU[0] F18
B_DDR3_DQU[1] D19
B_DDR3_DQU[2] D17
B_DDR3_DQU[3] E21
B_DDR3_DQU[4] E19
B_DDR3_DQU[5] D20
B_DDR3_DQU[6] D18
B_DDR3_DQU[7] F20
ZQ E9
IC1202-*1
LGE2131(M1A_128M)
BRAZIL
ARC0
M4
RXC0N
W7
RXC0P
Y8
RXC1N
W8
RXC1P
Y9
RXC2N
AA9
RXC2P
W9
RXCCKN
AA7
RXCCKP
Y7
CEC/GPIO6
N2
DDCDA_CK/GPIO27
E3
DDCDA_DA/GPIO28
E2
DDCDC_CK/GPIO31
W6
DDCDC_DA/GPIO32
AA6
HOTPLUGA/GPIO23
L4
HOTPLUGC/GPIO25
Y6
RXA0N
F1
RXA0P
G3
RXA1N
G1
RXA1P
G2
RXA2N
H3
RXA2P
H2
RXACKN
F3
RXACKP
F2
EAR_OUTL
U4
EAR_OUTR
T4
AUL1
P2
AUL2
R2
AUL3
T1
AUR1
R3
AUR2
R1
AUR3
T3
AUOUTL0
U2
AUOUTR0
V3
AUVAG
T2
CVBSOUT1 T6
CVBS0 V5
CVBS1 U5
CVBS2 T5
VCOM V4
I2S_OUT_BCK/GPIO165 E4
I2S_OUT_MCK/GPIO163 F4
I2S_OUT_SD/GPIO166 F7
I2S_OUT_WS/GPIO164 F5
USB0_DM C4
USB1_DM Y12
USB0_DP B4
USB1_DP AA12
BIN0M J2
BIN0P J3
GIN0M K3
GIN0P J1
RIN0M K2
RIN0P K1
HSYNC0 M6
VSYNC0 L6
BIN1M L2
BIN1P L3
GIN1M M1
GIN1P M2
RIN1M N1
RIN1P N3
SOGIN1 M3
IC1202-*1
LGE2131(M1A_128M)
BRAZIL
LVA4P/TTL_B[0]/HCONV/GPIO170
U19
LVA4M/TTL_B[1]/E_O/GPIO171
T20
LVA3P/TTL_B[2]/FB/GPIO172
T21
LVA3M/TTL_B[3]/OPT_P/GPIO173
T19
LVACKP/TTL_B[4]/MCLK/GPIO174
R21
LVACKM/TTL_B[5]/GCLK/GPIO175
R20
LVA2P/TTL_B[6]/GST/GPIO176
R19
LVA2M/TTL_B[7]/POL/GPIO177
P20
LVA1P/TTL_G[0]/EPI0+/GPIO178
P19
LVA1M/TTL_G[1]/EPI0-/GPIO179
N20
LVA0P/TTL_G[2]/EPI1+/GPIO180
N21
LVA0M/TTL_G[3]/EPI1-/GPIO181
N19
LVB4P/TTL_G[4]/EPI2+/GPIO182
M21
LVB4M/TTL_G[5]/EPI2-/GPIO183
M20
LVB3P/TTL_G[6]/EPI3+/GPIO184
M19
LVB3M/TTL_G[7]/EPI3-/GPIO185
L20
LVBCKP/TTL_R[0]/EPI4+/GPIO186
L19
LVBCKM/TTL_R[1]/EPI4-/GPIO187
K20
LVB2P/TTL_R[2]/EPI5+/GPIO188
K21
LVB2M/TTL_R[3]/EPI5-/GPIO189
K19
LVB1P/TTL_R[4]/EPI6+/GPIO190
J21
LVB1M/TTL_R[5]/EPI6-/GPIO191
J20
LVB0P/TTL_R[6]/EPI7+/GPIO192
J19
LVB0M/TTL_R[7]/EPI7-/GPIO193
H20
SAR0/GPIO35 D5
SAR1/GPIO36 F8
SAR2/GPIO37 E7
SAR3/GPIO38 E6
SAR4/GPIO39 D6
GPIO_PM[13]/GPIO20 W10
GPIO_PM[14]/GPIO21 Y10
PM_LED/GPIO4 P3
GPIO_PM[0]/GPIO7 Y3
PM_SPI_SCZ2/GPIO_PM[10]/GPIO17 Y5
GPIO_PM[15]/GPIO22 W11
GPIO_PM[4]/GPIO11 D3
GPIO_PM[7]/GPIO14 AA3
GPIO_PM[8]/GPIO15 W5
PWM_PM/GPIO200 D4
PM_UART_TX/GPIO_PM[1]/GPIO8 L15
PM_UART_RX/GPIO_PM[5]/GPIO12 Y11
IC1202-*1
LGE2131(M1A_128M)
BRAZIL
AUVRM
U3
GND_1
A6
GND_2
A13
GND_3
A15
GND_4
A18
GND_5
B12
GND_6
B14
GND_7
B16
GND_8
B17
GND_9
B19
GND_10
B20
GND_11
C9
GND_12
C10
GND_13
C21
GND_14
D9
GND_15
E20
GND_16
F9
GND_17
F11
GND_18
F13
GND_19
F15
GND_20
F17
GND_21
F19
GND_22
F21
GND_23
G8
GND_24
G9
GND_25
G10
GND_26
G11
GND_27
G12
GND_28
G13
GND_29
G14
GND_30
G15
GND_31
G16
GND_32
G17
GND_33
G18
GND_34
H7
GND_35
H8
GND_36
H9
GND_37
H10
GND_38
H11
GND_39
H12
GND_40
H13
GND_41
H14
GND_42
H15
GND_43
H16
GND_44
H17
GND_45
H18
GND_46
J7
GND_47
J8
GND_48
J9
GND_49
J10
GND_50
J11
GND_51
J12
GND_52
J13
GND_53
J14
GND_54
K8
GND_55
K10
GND_56
K11
GND_57
L10
GND_58
M5
GND_59
M7
GND_60
M8
GND_61
M9
GND_62
M10
GND_63
N4
GND_64
N5
GND_65
N6
GND_66
N7
GND_67
N8
GND_68
N9
GND_69
N10
GND_70
P4
GND_71
P5
GND_72
P6
GND_73
P7
GND_74
P9
GND_75
P10
GND_76
P15
GND_77
P16
GND_78
P17
GND_79
P18
GND_80
R10
GND_81
R11
GND_82
R12
GND_83
R13
GND_84
R14
GND_EFUSE
K7
AVDD_AU33 R4
AVDD_DDR0_CLK L11
AVDD_DDR1_CLK L13
AVDD_DDR0_CMD M11
AVDD_DDR1_CMD K13
AVDD_DDR0_D_1 C5
AVDD_DDR0_D_2 K12
AVDD_DDR0_D_3 L12
AVDD_DDR1_D_1 C6
AVDD_DDR1_D_2 K14
AVDD_DDR1_D_3 L14
AVDD_DRAM_1 B5
AVDD_DRAM_2 B6
AVDD_DVI_USB_MPLL_1 R8
AVDD_DVI_USB_MPLL_2 R9
AVDD_MOD_1 L7
AVDD_MOD_2 L8
AVDD_NODIE P8
AVDD_PLL K9
AVDD3P3_DMPLL R5
AVDDL_MOD P11
DVDD_DDR_1 C7
DVDD_DDR_2 M13
DVDD_NODIE R6
DVDD_RX_1_1 A7
DVDD_RX_1_2 M12
DVDD_RX_2_1 B7
DVDD_RX_2_2 M14
VDDC_1 N11
VDDC_2 N12
VDDC_3 N13
VDDC_4 N14
VDDC_5 N15
VDDC_6 P12
VDDC_7 P13
VDDC_8 P14
VDDP L9
AVDD5V_MHL AA10
C422
4.7uF
C421
1uF
C451-*1
10pF
X-TAL_10pF
C452-*1
10pF
X-TAL_10pF
4
L14
MAIN
2013-08-06
10
<VDDC 1.05V> <Normal Power 3.3V>
<DDR3 1.5V> <STby 3.3V>
C4002 SHOULD NEAR MAIN IC
DECAP FOR SOC
(HIDDEN - UCC)
DEMOD_I2C
for SYSTEM EEPROM
DTV_IF
Close to MSTAR
Close to MSTAR
ANALOG SIF
TUNER_I2C
Close to MSTAR
NON_A_DEMODE
AGC 1.25V
100 OHM SERIAL
A_DEMODE 0ohm
<HDMI& AV/COMP > <GPIO & CI> <VCC &GND>
<LVDS & PM/SAR>
#POWER FOR MAIN#
<SOC_RESET>
I2S_I/F
<BRAZIL OPT>
Copyright © 2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
PCM_A[0]
PCM_A[4]
PCM_A[1]
PCM_A[7]
PCM_A[2]
PCM_A[6]
PCM_A[5]
PCM_A[3]
R573
22
/PF_CE1
RXA4+
RXACK+
AR519
22
RXA2-
R542
10K
R565
1K
RXA1+
RXA4-
RXB3+
RXB2+
R569
4.7K
READY
/PF_CE0
R516
100
RXA2-
+3.3V
RXBCK+
RXB4-
RXA0+
/PF_WP
P_SDA
RXB0+
SPI_SCK
RXB2-
/PF_OE
RXB1+
+3.3V_ST
RXACK+
KEY1
RXA4-
RXB2-
RXB2+
R574
22
RXB1-
PF_ALE
+3.3V
R518
100
RXBCK+
RXB3-
RXA1+
RXB0-
PCM_A[0-7]
KEY2
R517
100
R556
3.3K
RXB3-
SPI_SDO
/FLASH_WP
R514
22
I2C_SDA
RXA0-
RXA4+
RXA1-
R540
10K
RXB1-
+3.3V_ST
SPI_SDI
+3.3V_ST
RXA3+
RXB4+
R575
33
/PF_WE
RXA3-
/F_RB
RXBCK-
RXB3+
/SPI_CS
RXA3+
RXA2+
RXA0-
+3.3V_ST
R567
1K
RXA0+
IR
RXA2+
RXACK-
LED_R/BUZZ
DISP_EN
RXA3-
RXB0-
R568
4.7K +3.3V
RXACK-
RXA1-
RXB4+
AR518
22
RXB0+
I2C_SCL
RXBCK-
RXB4-
P_SCL
RXB1+
+3.3V_ST
UART_RXD
R520
0R519
0
UART_TXD
IC503-*1
M24256-BRMN6TP
ST_OS
3
E2
2
E1
4
VSS
1
E0
5SDA
6SCL
7WC
8VCC
IC505-*1
MX25L8006EM2I-12G
MX_OS
3
WP#
2
SO/SIO1
4
GND
1
CS#
5SI/SIO0
6SCLK
7HOLD#
8VCC
IC504-*1
TC58NVG0S3ETA0BBBH
Toshiba_OS_1G_old
26 NC_17
27 NC_18
28 NC_19
29 I/O1
30 I/O2
31 I/O3
32 I/O4
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O5
42 I/O6
43 I/O7
44 I/O8
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
RY/BY
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC504-*2
TC58NVG1S3ETA00
Toshiba_OS_2G_old
26 NC_17
27 NC_18
28 NC_19
29 I/O1
30 I/O2
31 I/O3
32 I/O4
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O5
42 I/O6
43 I/O7
44 I/O8
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
RY/BY
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC504-*3
H27U2G8F2CTR
Hynix_OS_2G_old
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
R564
27K
P503
TF05-51S
MO_HD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
C555
0.1uF
IC505
W25Q80BVSSIG
Winbond_OS
3
%WP[IO2]
2
DO[IO1]
4
GND
1
CS
5DI[IO0]
6CLK
7HOLD[IO3]
8VCC C556
0.1uF
P500
104060-8017
MO_FHD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
C517
10pF
50V
C552
0.1uF
C520
10pF
50V
C554
10uF10V
C550
0.1uF
C535
0.1uF
16V
C534
0.1uF
16V
C547
0.1uF
16V
C518
470pF
READY
C519
470pF
READY
D501
20V
D503 20V
D504 20V
D505
20V
D502
20V
IC504
H27U1G8F2CTR-BC
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC503
AT24C256C-SSHL-T(Cu)
ATMEL_OS_old
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
P501
12507WR-10L
1
2
3
4
5
6
7
8
9
10
11
C521
1000pF
50V
IC504-*4
TC58NVG1S3HTA00
Toshiba_OS_2G_new
26 NC_17
27 NC_18
28 NC_19
29 I/O1
30 I/O2
31 I/O3
32 I/O4
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O5
42 I/O6
43 I/O7
44 I/O8
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
RY/BY
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC504-*5
H27U2G8F2DTR-BD
Hynix_OS_2G_new
26 NC_17
27 NC_18
28 NC_19
29 I/O0
30 I/O1
31 I/O2
32 I/O3
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O4
42 I/O5
43 I/O6
44 I/O7
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
R/B
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC504-*6
TC58NVG0S3HTA00
Toshiba_OS_1G_new
26 NC_17
27 NC_18
28 NC_19
29 I/O1
30 I/O2
31 I/O3
32 I/O4
33 NC_20
34 NC_21
35 NC_22
36 VSS_2
37 VCC_2
38 NC_23
39 NC_24
40 NC_25
41 I/O5
42 I/O6
43 I/O7
44 I/O8
45 NC_26
46 NC_27
47 NC_28
48 NC_29
17
ALE
3
NC_3
6
NC_6
16
CLE
15
NC_10
14
NC_9
13
VSS_1
12
VCC_1
11
NC_8
10
NC_7
9
CE
8
RE
7
RY/BY
4
NC_4
5
NC_5
25 NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
WE
IC503-*2
R1EX24256BSAS0A
ATMEL_OS_new
3
A2
2
A1
4
VSS
1
A0
5SDA
6SCL
7WP
8VCC
IC503-*3
BR24G256FJ-3
Rohm
3
A2
2
A1
4
GND
1
A0
5SDA
6SCL
7WP
8VCC
Memory.LVDS,IR
L14
5
2013-08-06
<NAND Flash>
1GBit
<LVDS>
<KEY/IR>
* LCI: LVDS Connection Indicator
10
<NVRAM>
<SERIAL FLASH>
OS:8MB
OS:256KB
Copyright © 2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
AC_DET
R675
1
IC608
AP1117E33G-13
OUT
IN ADJ/GND
P_17V
R662
1
+3.3V
C606
0.1uF
16V
+5V
5V_ON
+3.3V_ST
C607
0.1uF
16V
P600
SMAW200-H18S1
14
9
4
18
13
8
3
17
12
7
2
16
11
6
1
15
10
5
19
R600
10K
C616
10uF
10V
C610
0.1uF
16V
RL_ON
+5V_ST
C608
10uF
10V
R609
100
VS_DET
VS_ON
L606
120-ohm
2A
+3.3V_ST
R624
15K
READY
17V_DET
R601
10K
READY
R606
4.7K
C611
10uF
10V
IC605
AP1117E33G-13
OUT
IN ADJ/GND
+5V
R608
1
+3.3V_DDR
R639
10K
R604
4.7K
C633
1000pF
50V
L600
120OHM
R692
3.6K
LNB
LNB_CTL
C701
0.01uF
50V
LNB R1
6.8K
1%
LNB
D6000
40V
SMAB34
LNB
L617
BLM18PG121SN1D
LNB
IC614
TPS54231D
LNB
3
EN
2
VIN
4
SS
1
BOOT
5VSENSE
6COMP
7GND
8PH
C707
15pF
50V
LNB
P_17V
R610
51K
LNB
L608
22.0uH
LNB
EAP61606601
C702
0.01uF
50V
LNB
R681
16K
READY
R686
1.6K
1%
LNB
R685
120K
1%
LNB
+12V_LNB
C703
0.1uF
50V
LNB
C704
470pF
50V
LNB
C612
0.1uF
16V
F_NIM
+1.2V_TU
R615
1
F_NIM
+3.3V_TU
C605
1uF
25V
F_NIM
+3.3V_DDR
L618
120-ohm
2A
L604
120-ohm
2A
+1.5V_DDR
D600
5V
READY
R602
6.8K
1/16W
1%
D601
2.5V
READY
+3.3V_TU
R603
1.2K
1/16W
1%
C700
10uF
25V
LNB
C705
10uF
25V
LNB C706
10uF
25V
LNB
R613
11K
1%
F_NIM
R614
20K
1%
F_NIM
+5V_ST
D602
5V
L602
120
+3.3V_ST
C601
0.1uF
16V
C600
1uF
25V R617
10K
1%
R619
1
IC603
AP7361-Y-13
3
ADJ/NC
2
GND
4IN
1
EN 5OUT
IC601
AP7361-Y-13
F_NIM
3
ADJ/NC
2
GND
4IN
1
EN 5OUT
IC1203
AZ1117EH-ADJTRG1
ADJ/GND
OUTIN
R671
10K
READY
R659
10K
R664
10K
1/16W
5%
Q603
MMBT3904(NXP)
E
B
C
+5V_ST
RL_ON
+5V
C708
0.1uF
16V
R657
10K
READY
C709
0.1uF
16V
READY
Q604
DMP2130L
Diode_FET
G
D
S
R618
1.6K
1%
R620
1.6K
1%
C620
0.01uF
50V
C621
10uF
10V
C603
2.2uF
10V
READY
C627
10uF
10V
C618
10uF
10V
C617
10uF
10V
C619
10uF
10V
C602
10uF
10V
C614
10uF
10V
F_NIM
R612
3.3K
F_NIM
R616
3.3K
Q604-*1
AO3435
AOS_FET
G
D
S
R683
1K
Power
L14
6
2013-08-06
<Power Wafer>
--> +1.5V_DDR
+5V_ST --> 3.3Vst
+5V->+3.3V
->+3.3V_TU
5V_ST --> MULTI 5V
10
Current Limit : 1.1A
+5V->+3.3V_DDR
POWER
<ST-BY>
<MUTI>
2A
Vout=0.8*(1+R1/R2)
R1
Max 1.3A
17V->+12V LNB
*NOTE 13
-->3.12V
R2
R1
R2
Vo=0.8*(1+R1/R2)
--> +1.2V_TU
Current Limit : 1.1ACurrent Limit : 1.1A
R2
Vo=0.8*(1+R1/R2)
R1
3A
Copyright © 2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+3.3V
A-MDQSUB
A-MA11
A-MA14
A-MDQU0
A-MA6
A-MDMU
A-MODT
A-MDQU5
A-MDQU4
LED_R/BUZZ
A-MA7
A-MDQL1
A-MDQU1
MODEL_OPT_6
A-MRESETB
A-MDQL4
A-MRESETB
A-MDQU7
A-MDQL0
A-MDQU3
A-MBA2
RF_SWITCH_CTL
A-MA8
A-MA5
A-MRASB
A-MVREFCA
PM_LED
A-MBA1
A-MCASB
A-MA1
A-MDQL6
A-MA12
A-MDML
A-MDQSLB
A-MDQU6
A-MA7
MODEL_OPT_2
A-MA4
A-MA13
IF_AGC_SEL
A-MA3
MODEL_OPT_3
A-MCKE
A-MRASB
A-MWEB
A-MDQSL
A-MDQSL
AVDD_DDR0
A-MA11
A-MBA0
A-MA13
A-MDQL0
A-MA2
AVDD_DDR0
A-MDQU4
A-MDQL1
A-MDQSU
A-MA5
A-MDQL3
A-MDQL3 A-MDQL5
A-MDQU7
A-MCKB
A-MA8
A-MA10
A-MDQSLB
A-MCKB
MODEL_OPT_1
A-MDQL7
A-MA14
+3.3V_ST
A-MDQL2
H5TQ2G63DFR-PBC
IC1201-*1
Hynix_256M_old
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
A-MDQU6
A-MDQU1
MODEL_OPT_7
PM_MODEL_OPT_0
A-MDQL6
A-MA9
A-MDQL4
A-MDQSU
A-MDQL7
A-MBA0
A-MA1 A-MA2
A-MA4
A-MBA1
A-MDQU2
A-MODT
+1.5V_DDR
+3.3V
A-MDQU3
A-MDQU5
A-MBA2
A-MVREFDQ
A-MA12
A-MDQU2
A-MDQU0
A-MA3
A-MWEB
A-MCASB
A-MA0
A-MA6
A-MA10
AVDD_DDR0
A-MCKE
A-MDMU
MODEL_OPT_5
A-MDML
MODEL_OPT_0
+3.3V_ST
MODEL_OPT_4
A-MCK
A/B_DDR3_CS
A-MA0
A-MDQL5
AVDD_DDR0
A-MDQL2
A/B_DDR3_CS
A-MCK
A-MA9
A-MDQSUB
A-MVREFCA
A-MVREFDQ
AVDD_DDR0
SPI_SDI
AUD_MASTER_CLK
AUD_MASTER_CLK_0
H5TQ2G63FFR-PBC
IC1201-*2
Hynix_256M_New
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_5 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
C1216 0.1uF
EXT_DDR
R1243 4.7K
READY
R1231
10K
EXT_DDR
C1215 0.1uF
EXT_DDR
R1216 1K
READY
R1211 100
READY
R1241 1K
MO_DVB_T2/C/S2
R1226 1K
MO_FHD
R1245 4.7K
C1204
1000pF
EXT_DDR
C1251
10uF
EXT_DDR
R1224 1K
MO_S/W_AJ
C1208 0.1uF
EXT_DDR
R1221 1K
MO_128M+128M_NON
C1213 0.1uF
EXT_DDR
R1201
1K 1%
EXT_DDR
R1223 1K
MO_DVB_T/C
C1209
0.01uF
50V
EXT_DDR
C1214 0.1uF
EXT_DDR
R1222 1K
R1247 4.7K
R1219 1K
MO_S/W_TW
C1201
0.1uF
EXT_DDR
R1202
1K 1%
EXT_DDR
R1220 1K
MO_S/W_EU/AJ
C1205 10uF
EXT_DDR
R1213 0
READY
C1202
1000pF
EXT_DDR
L1202
CB2012PK501T
EXT_DDR
R1227 1K
MO_HD
R1246 4.7K
C1210 0.1uF
EXT_DDR
C1203
0.1uF
EXT_DDR
R1251
10K
R1236
56
1%
EXT_DDR
R1232
1K 1%
EXT_DDR
R1238
1K 1%
EXT_DDR
R1240 1K
READY
R1244 4.7K
READY
R1250
10K
READY
R1215 1K
C1212 0.1uF
EXT_DDR
C1207 0.1uF
EXT_DDR
R1239
240
1%
R1235
56
1%
EXT_DDR
R1248 4.7K
READY
R1218 1K
MO_128M+256M
R1203
240
1%
EXT_DDR
R1217 1K
MO_128M+256M_NON
C1211 0.1uF
EXT_DDR
R1242 1K
MO_128M+128M
R1225 1K
MO_S/W_NON_AJ
IC1202
LGE2132(M1A_256M)
NON_BRAZIL
B_DDR3_A[0] E11
B_DDR3_A[1] F12
B_DDR3_A[2] D10
B_DDR3_A[3] B10
B_DDR3_A[4] E15
B_DDR3_A[5] B11
B_DDR3_A[6] F14
B_DDR3_A[7] C11
B_DDR3_A[8] D14
B_DDR3_A[9] A12
B_DDR3_A[10] F16
B_DDR3_A[11] D13
B_DDR3_A[12] D15
B_DDR3_A[13] C12
B_DDR3_A[14] E13
B_DDR3_BA[0] A9
B_DDR3_BA[1] D16
B_DDR3_BA[2] A10
B_DDR3_MCLK C13
B_DDR3_MCLKZ B13
B_DDR3_MCLKE E17
B_DDR3_ODT B8
B_DDR3_RASZ C8
B_DDR3_CASZ B9
B_DDR3_WEZ D11
B_RESET F10
B_DDR3_CS0 D12
B_DDR3_DQSL A19
B_DDR3_DQSU B18
B_DDR3_DQML C16
B_DDR3_DQMU D21
B_DDR3_DQSBL C18
B_DDR3_DQSBU C17
B_DDR3_DQL[0] A20
B_DDR3_DQL[1] A16
B_DDR3_DQL[2] C19
B_DDR3_DQL[3] C15
B_DDR3_DQL[4] C20
B_DDR3_DQL[5] C14
B_DDR3_DQL[6] B21
B_DDR3_DQL[7] B15
B_DDR3_DQU[0] F18
B_DDR3_DQU[1] D19
B_DDR3_DQU[2] D17
B_DDR3_DQU[3] E21
B_DDR3_DQU[4] E19
B_DDR3_DQU[5] D20
B_DDR3_DQU[6] D18
B_DDR3_DQU[7] F20
ZQ E9
C1218
1uF EXT_DDR
C1219
1uF EXT_DDR
C1238
1uF EXT_DDR
C1241
1uF EXT_DDR
R1249
200
NT5CB128M16FP-DI
IC1201
Nanya_256M
EAN61859702
A0 N3
A1 P7
A2 P3
A3 N2
A4 P8
A5 P2
A6 R8
A7 R2
A8 T8
A9 R3
A10/AP L7
A11 R7
A12/BC N7
A13 T3
NC_6 M7
BA0 M2
BA1 N8
BA2 M3
CK J7
CK K7
CKE K9
CS L2
ODT K1
RAS J3
CAS K3
WE L3
RESET T2
DQSL F3
DQSL G3
DQSU C7
DQSU B7
DML E7
DMU D3
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_5
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
CLose to Saturn7M IC
CLose to DDR3 CLose to DDR3
0
Memory
1
0
1
LG-NonOS : 3’b000 51 boot from SPI
LG-OS : 3’b001 MIPS boot from SPI
<CHIP Config>
(PAD_PM_SPI_DI,PAD_PM_LED,PAD_PWM_PM)
0
1
<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH) 1’b0
Boot from SPI_CS0N(INT_FLASH) 1’b1
<HW_OPT>
128M Only
128M+256M
MODEL_OPT_4
INT+EXT
0
MODEL_OPT_6
0
Auto
Det
0
Memory OPTION
0128M+128M
0
256M Only
0
PM MODEL OPTION
PM_MODEL_OPT_0
HIGH : LCD
LOW :: PDP
MO_DUALSTREAM_NON(Default)
MODEL_OPT_3
MO_128M+256M_NON
G20
H19
MODEL_OPT_7
MO_128M+128M_NON
G19
MO_DVB_T/C
MODEL_OPT_6
MO_S/W_EU/AJ
MO_DVB_T2/C/S2
MODEL_OPT_2
U6
MO_HD
MO_FHD
MO_S/W_NON_AJ
* Dual Stream is only Korea 3D spec
PIN NAME
MO_DUALSTREAM
HIGH
MO_S/W_AJ
MO_M120_NON(Default)
MODEL_OPT_4
PIN NO.
MO_M120
K5
MODEL_OPT_0
MO_128M+128M
MODEL OPTION
MODEL_OPT_1
MODEL_OPT_5
K4
LOW
MO_S/W_TW
L5
J5
MO_128M+256M
2013-08-06
10
External_DDR
7
L14
Copyright © 2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SIGN10335
D802
30V
LNB
C806
10uF
25V
LNB
LNB_OUT
C803
0.22uF
25V
LNB
R806 33
LNB
D803-*1
40V
LNB_SX34
R805
39K
1/16W
1%
LNB
LNB_TX
R804 33
LNB
C807
10uF
25V
LNB
D801
30V
MBR230LSFT1G
LNB
D804-*1
40V
LNB_SX34
L801
15uH
SP-7850_15
LNB
D803
40V
LNB
C811
0.1uF
50V
LNB
C812 0.22uF
LNB
C804
0.01uF
50V
LNB
C810
10uF
25V
LNB
R802
2.2K
1W
LNB
C808
10uF
25V
LNB
+12V_LNB
C809 0.1uF
LNB
R803 33
LNB
C805
0.1uF
50V
LNB
D804
40V
LNB
C813
0.1uF
LNB
IC801
A8303SESTR-T
LNB
1
VCP
3
NC_1
7
SCL
9
ADD
10
TONECTRL
11 TCAP
12 ISET
13 VREG
14 GND
15 VIN
16 LX
17 GNDLX
18 NC_2
19 NC_3
20 BOOST
5
TDO
8
SDA
6
IRQ
4
TDI
2
LNB 21
[EP]GND
LNB_OUT
LNB_TX DEMOD_SCL
DEMOD_SDA
TP1
TP2 TP3
TP4
LNB_CTL TP5
C800
18pF
LNB
C801
18pF
LNB
C802
33pF
LNB
DEMOD_SCL
DEMOD_SDA
D800
LNB
L14
8
2013-08-06
10
Satellite LNB
DVB-S2 LNB Part Allegro
Surge protectioin
close to Boost pin(#1)
close to VIN pin(#15)
3A
3.5A
(Option:LNB)
close to TUNER
2A
Ouput trace widths should be sized to conduct at least 2A
Max 1.3A
Input trace widths should be sized to conduct at least 3A
Close to Tuner
need to connect S-tuner
Copyright © 2014 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
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