Linear Technology DC1954A Quick setup guide

1
dc1954af
DEMO MANUAL DC1954A
Description
LTC6954
Low Phase Noise, Triple Output Clock
Distribution Divider/Driver
Demonstration Circuit 1954A features the LT C
®
6954, a
Low Phase Noise, Triple Output Clock Distribution Divider/
Driver.
There are four options of the DC1954A, one for each ver-
sion of the LTC6954. Table 1 summarizes the available
DC1954A options.
The DC1954A LVPECL outputs are AC-coupled 50Ω
transmission lines making them suitable for driving 50Ω
impedance instruments. The LVDS/CMOS outputs of the
DC1954A are terminated with a 100Ω differential resistor
and are DC-coupled. All differential input and outputs have
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and EZSync
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
0.5" spaced SMA connectors. The LTC6954’s EZSync™
function is made available via a turret and an SMA con-
nector.
ADC590 USB serial controller board is used for SPI
communication with the LTC6954, controlled by the
supplied LTC6954_GUI software.
Design files for this circuit board are available at
http://www.linear.com/demo/DC1954A
Figure 1. DC1954A Connections



Ribbon
cable
connection
toDC590
OUT0Outputs,SMA
LTC6954‐1/‐2/‐3
LVPECL,ACcoupled

LTC6954‐4
LVDS/CMOS,DCcou
p
led
3.3VDCSupply,
bananajack&
turret
INInputs,SMA
ACcoupled
GND,banana
jack&turret
OUTxSELInputs,Headers
ForLVPECLOUTPUTS:
H=IBIASON;L=IBIASOFF

ForLVDS/CMOSOUTPUTS:
H=LVDS;L=CMOS
Temperature
monitoringdiode,turret
EZSyncTM
SYNCInput,
SMA&turret
OUT1Outputs,SMA
LTC6954‐1/‐2
LVPECL,ACcoupled

LTC6954‐3/‐4
LVDS/CMOS,DCcou
p
led
OUT2Outputs,SMA
LTC6954‐1
LVPECL,ACcoupled

LTC6954‐2/‐3/‐4
LVDS/CMOS,DCcou
p
led

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dc1954af
DEMO MANUAL DC1954A
Quick start proceDure
The DC1954A is easy to set up to evaluate the performance
of the LTC6954. Follow the procedure below.
The DC590 and LTC6954_GUI application are required to
control the DC1954A through a personal computer (PC).
DC590 Configuration
Place the DC590 jumpers in the following positions (refer
to Figure 2):
JP4: EE Must be in the EN position.
JP5: ISO ON must be selected.
JP5: SW ON must be selected.
JP6: VCCIO 3.3V or 5V must be selected. This sets the
SPI port to 3.3V or 5V operation, 3.3V
operation is recommended.
Connect the DC590 to one of your computer’s USB ports
with the included USB cable.
LTC6954_GUI Installation
The LTC6954_GUI software is used to communicate with
the LTC6954. It uses the DC590 to translate between USB
and SPI-compatible serial communications formats. The
following are the LTC6954_GUI system requirements:
• Windows Operating System: Windows XP, Windows
2003 Server, Windows Vista, Windows 7
• Microsoft .NET 3.5 SP1 or later
• Windows Installer 3.1 or later
• Linear Technology’s DC590 hardware
Figure 2. DC590 Jumper and Connector Locations

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dc1954af
DEMO MANUAL DC1954A
Quick start proceDure
Download the LTC6954_GUI setup file at:
www.linear.com/LTC6954_GUI.
RuntheLTC6954_GUIsetupfileandfollowtheinstructions
given on the screen. The setup file will verify and/or install
Microsoft .NET and install the LTC6954_GUI.
DC1954A Configuration
1. Connect the GND and V+ 3.15V-3.45V, turrets to a
power supply and apply power (see Figure 1 and the
Typical DC1954A Requirements and Characteristics
table).
2. Connect the DC590 to the DC1954A with the provided
ribbon cable.
3. Run the LTC6954_GUI application.
4. From the LTC6954_GUI, click File -> Load Settings
and point to the LTC6954.6954set file.
5. From the LTC6954_GUI, select the Read All button.
This will update the GUI to display the correct part
number and associated output types.
6. Connect a low phase-noise (or jitter) single-ended or
differential signal to IN+ (J8) and/or IN- (J9). Refer to
the LTC6954 data sheet for acceptable input frequen-
cies and amplitudes.
7. From the LTC6954_GUI, update Fin to the frequency
of the input signal in step 6. This will update the
LTC6954_GUI with the correct output frequencies.
8. Refer to the Typical DC1954A Requirements and
Characteristics table for desired OUTxSEL level. Set
JP1, JP2 and JP3 accordingly.
9. Connect desired output (OUT0, OUT1, OUT2) to a test
instrument or other demo board to evaluate perfor-
mance. [The LVDS/CMOS outputs are DC-coupled,
please make sure the levels do not exceed the test
equipment input levels].
10. To synchronize outputs provide a 1ms or greater
high pulse to the SYNC SMA to take advantage of the
EZSync function.
Be sure to power down or terminate any unused RF output
with 50Ω, or poor spurious performance may result.
Figure 3. LTC6954_GUI Screenshot

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dc1954af
DEMO MANUAL DC1954A
Troubleshooting
If the board is not functioning as expected, follow the
instructions below:
1. Verify that you are able to communicate with the
DC1954A. The bottom status line in LTC6954_GUI
should read LTC6954 and Comm Enabled.
2. Verify that V+ 3.15V-3.45V turret has the correct
voltage. (see the Typical DC1954A Requirements and
Characteristics table).
3. Ensure JP1, JP2, and JP3 are set to desired position.
4. Iftheoutputtypeis LVPECLandthe outputisAC-coupled,
OUTxSEL must be high for proper signal swing.
The DC1954A allows for a variety of input and output
configurations. The following covers the hardware recon-
figuration of the DC1954A.
LVPECL Output Options
The
DC1954A LVPECL outputs are AC-coupled and require
internal biasing (OUTxSEL=H) with the default termination
network. The DC1954A provides pull-down, series and a
differential termination resistor options to accommodate
the other LVPECL termination networks described in the
data sheet.
LVDS/CMOS Output Options
The LVDS/CMOS outputs are DC-coupled and have an on
boarddifferential100Ω resistor termination by default. The
DC1954A provides pull-down, series and a differential ter-
mination resistor options to accommodate the other LVDS/
CMOS termination networks described in the data sheet.
Table 1. DC1954A Assembly Options
ASSEMBLY VERSION U1 PART NUMBER OUT0+/– OUT1+/– OUT2+/–
DC1954A-A LTC6954IUFF-1 LVPECL LVPECL LVPECL
DC1954A-B LTC6954IUFF-2 LVPECL LVPECL LVDS/CMOS
DC1954A-C LTC6954IUFF-3 LVPECL LVDS/CMOS LVDS/CMOS
DC1954A-D LTC6954IUFF-4 LVDS/CMOS LVDS/CMOS LVDS/CMOS
5. Iftheoutput typeisLVDS,theoutputsmustbe AC-coupled
intosingle-ended,50Ωinputtestequipment.Additionally,
the unconnected output must be AC-coupled into a 50Ω
load to ground to provide a balanced output load. If the
LVCSx bit is low, the signal amplitude at the instrument
will be approximately half of the data sheet value due to
the existing 100Ω termination on the demo board.
6. If the output is CMOS, a 200Ω series resistor must be
included to limit the output current when connecting
to the 50Ω input on test equipment. The signal swing
at the instrument is then approximately 20 percent of
the data sheet value.
Contact the factory for further troubleshooting.
Input Options
The inputs have a 50Ω termination resistor to GND and are
AC-coupled by default. The DC1954A provides pull-down,
pull-up and a differential termination resistor options to
accommodate the other input termination networks de-
scribed in the data sheet.
Clock Follower Input Network
When using the DC1954A as a clock follower, EZSync
requires the LTC6954 inputs to be taken to a low state
while the SYNC pin is high. To meet this requirement, the
DC1954A must be modified to support DC-coupling. Refer
to the EZSync Function section and to the data sheet for
more details on using the LTC6954 as a clock follower.
EZSync Function
Apply a 1ms or greater high pulse to the SYNC SMA con-
nector to take advantage of the EZSync function. Refer
to the LTC6954 data sheet for SYNC timing and level
requirements.
Quick start proceDure
Dc1954a reconfiguration
assembly options

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dc1954af
DEMO MANUAL DC1954A
typical Dc1954a reQuirements anD characteristics
pcb layout
PARAMETER INPUT OR OUTPUT PHYSICAL LOCATION DETAILS
3.3V Power Supply Input J11 and J10 Banana Jacks, or 3.15V-3.45V and
GND Turrets
Low-Noise and Spur-Free 3.3V, ≥400mA Capable Power
Supply; Typically DC1954 Consumes ~300mA; Powers
LTC6954, U2, U3, and U4
OUT0+, OUT0– Tw o Outputs J1 and J2 SMA Connectors* Refer to Figure 1 or Table 1 for Output Type
If LVPECL: AC-Coupled
If LVDS/CMOS: DC-Coupled
Refer to LTC6954 Data Sheet for Output Levels for LVPECL, or
LVDS/CMOS Option
OUT1+, OUT1– Tw o Outputs J3 and J4 SMA Connectors*
OUT2+, OUT2– Tw o Outputs J5 and J6 SMA Connectors*
OUT0SEL Input JP1 3-Pin Headers If LVPECL:
OUTxSEL=H: IBIAS=ON, for Default LVPECL BOM
OUTxSEL=L: IBIAS=OFF, Must Install External Pull-Down
Resistor, Refer to schematic
If LVDS/CMOS:
OUTxSEL=H: LVDS, Default LVDS/CMOS BOM
OUTxSEL=L: CMOS, Remove 100Ω Differential Termination,
Refer to Schematic
OUT1SEL Input JP2 3-Pin Headers
OUT2SEL Input JP3 3-Pin Headers
TEMP Input/Output Turret Temperature Monitoring Diode; Force Current Measure
Voltage, Refer to Data Sheet
TEMP GND Input Turret
SYNC Input J7 SMA Connector and Turret EZSync, 0V to 3.3V Control Signal, Refer to the Data Sheet
IN+, IN– Input J8 and J9 SMA Connectors Input Signal Pins
*Any unused RF output must be powered down or terminated with 50Ω, or poor spurious performance may result.
Top Layer

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dc1954af
DEMO MANUAL DC1954A
parts list
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
Required Circuit Components
2 17 C1-C10, C12, C13, C22-C24, C28, C29 CAP., X7R, 0.1µF, 10V, 10%, 0402 AVX, 0402ZC104KAT2A
3 1 C14 CAP., X7R, 1.0µF, 16V, 10%, 0603 AVX, 0603YC105KAT2A
4 9 C15, C17-C21, C25-C27 CAP., X7R, 0.01µF, 6.3V, 10%, 0201 MURATA, GRM033R70J103KA01D
5 1 C16 CAP., TANT, 22µF 10V, 3528 AVX, TPSB226K010R0400
6 3 E9, E12, E13 TURRET, 0.064" MILL-MAX, 2308-2-00-80-00-00-07-0
7 2 E10, E11 TURRET, 0.094" MILL-MAX, 2501-2-00-80-00-00-07-0
8 3 JP1, JP2, JP3 JMP, 3 PINS 2mm CTRS. SAMTEC, TMM-103-02-L-S
9 8 J1-J6, J8, J9 CONN., SMA 50Ω EDGE-LAUNCH EMERSON, 142-0701-851
10 1 J7 CONN, SMA STRAIGHT CONNEX, 132134
11 2 J10, J11 JACK, BANANA KEYSTONE, 575-4
12 1 J12 CONN., HEADER 14POS 2mm VERT GOLD MOLEX, 87831-1420
13 6 R2, R4, R7, R9, R12, R14 RES., CHIP, 0Ω, 5% 0402 NIC, NRC04Z0TRF
14 0 R3, R5, R8, R10, R13, R15-R17, R19 RES., CHIP, 0402 OPT
15 2 R18, R20 RES., CHIP, 49.9Ω, 1/16W, 1%, 0402 NIC, NRC04F49R9TRF
16 5 R22, R35, R37-R39 RES., CHIP, 200k, 1/16W, 1%, 0402 NIC, NRC04F2003TRF
17 3 R23, R24, R25 RES., CHIP, 4.99k, 1/16W, 1%, 0402 NIC, NRC04F4991TRF
18 1 R26 RES., CHIP, 0Ω, 0603 NIC, NRC06Z0TRF
19 0 R27-R29, R30-R32 RES., CHIP, 0603 OPT
20 4 R33, R34, R36, R40 RES., CHIP, 100Ω, 1/16W, 5%, 0402 NIC, NRC04J101TRF
21 2 U2, U3 I.C., DUAL BUFFER, SC70-6 FAIRCHILD SEMI., NC7WZ17P6X
22 1 U4 I.C., DUAL TRANSCEIVER, SOT363 NXP, 74LVC 1T45GW
23 1 U5 I.C., EEPROM 2KBIT 400KHZ 8TSSOP MICROCHIP, 24LC025-I /ST
24 3 SHUNTS SHOWN ON ASSY DWG SHUNT, 2mm CTRS. SAMTEC, 2SN-BK-G
DC1954A-A Required Circuit Components
1 1 GENERAL BOM
2 0 R1, R6, R11 RES., CHIP, 0402 OPT
3 6 Z1, Z2, Z3, Z4, Z5, Z6 CAP., X7R, 0.1µF 16V, 10%, 0402 AVX, 0402YC104KAT2A
4 1 U1 I.C., QFN36UFF-4X7 LINEAR TECH., LTC6954IUFF-1#PBF

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dc1954af
DEMO MANUAL DC1954A
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
DC1954A-B Required Circuit Components
1 1 GENERAL BOM
2 0 R1, R6 RES., CHIP, 0402 OPT
3 1 R11 RES., CHIP, 100Ω 1/16W, 5%, 0402 NIC, NRC04J101TRF
4 4 Z1-Z4 CAP., X7R, 0.1µF 16V, 10%, 0402 AVX, 0402YC104KAT2A
5 2 Z5, Z6 RES., CHIP, 0Ω, 0402 NIC, NRC04Z0TRF
6 1 U1 I.C., QFN36UFF-4X7 LINEAR TECH., LTC6954IUFF-2#PBF
DC1954A-C Required Circuit Components
1 1 GENERAL BOM
2 0 R1 RES., CHIP, 0402 OPT
3 2 R6, R11 RES., CHIP, 100Ω 1/16W, 5%, 0402 NIC, NRC04J101TRF
4 2 Z1-Z2 CAP., X7R, 0.1µF 16V, 10%, 0402 AVX, 0402YC104KAT2A
5 4 Z3, Z4, Z5, Z6 RES., CHIP, 0Ω, 0402 NIC, NRC04Z0TRF
6 1 U1 I.C., QFN36UFF-4X7 LINEAR TECH., LTC6954IUFF-3#PBF
DC1954A-D Required Circuit Components
1 1 GENERAL BOM
2 3 R1, R6, R11 RES., CHIP, 100Ω 1/16W, 5%, 0402 NIC, NRC04J101TRF
3 6 Z1, Z2, Z3, Z4, Z5, Z6 RES., CHIP, 0Ω, 0402 NIC, NRC04Z0TRF
4 1 U1 I.C., QFN36UFF-4X7 LINEAR TECH., LTC6954IUFF-4#PBF
parts list

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dc1954af
DEMO MANUAL DC1954A
schematic Diagram
5 5
4 4
3 3
2 2
1 1
D D C C B B A A
ASSY U1
*-A
-B -C
NOTE: UNLESS OTHERWISE SPECIFIED 1. ALL RESISTORS ARE IN OHMS, 0402
ALL CAPACITORS ARE IN MICROFARADS, 0402
-D LTC6954IUFF-4
LTC6954IUFF-3 LTC6954IUFF-2 LTC6954IUFF-1
Z1-Z2R1 Z3-Z4 Z5-Z6
R6
0.1uF 0.1uF 0.1uF
100 OHM 0 OHM
OPEN OPEN OPEN
100 OHM 0.1uF
OPEN 0.1uF
0 OHM
100 OHM 0 OHM 0 OHM
0 OHM 0 OHMOPEN 0.1uF
H
L
OUT0SEL
L H OUT1SEL
L
OUT2SEL
H
100 OHM 100 OHM 100 OHM
OPEN
R11
V+ V+
V+
V+V+
V+ V+
V+
OUT2SELOUT1SEL
OUT0SEL
OUT0SEL
V+
OUT1SEL
V+
OUT2SEL
V+
CS
SCLK
SDO
SDI
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
MICHEL A.PRODUCTION
__
2 10-03-13
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
MICHEL A.PRODUCTION
__
2 10-03-13
REVISION HISTORY DESCRIPTION DATEAPPROVEDECO REV
MICHEL A.PRODUCTION
__
2 10-03-13
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1954A
10/03/2013, 10:30 AM
12
LOW PHASE NOISE, TRIPLE OUTPUT CLOCK
N/A LTC6954IUFF-1/-2/-3/-4
KIM T.
MICHEL A.
DISTRIBUTION DIVIDER/ DRIVER
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1954A
10/03/2013, 10:30 AM
12
LOW PHASE NOISE, TRIPLE OUTPUT CLOCK
N/A LTC6954IUFF-1/-2/-3/-4
KIM T.
MICHEL A.
DISTRIBUTION DIVIDER/ DRIVER
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1954A
10/03/2013, 10:30 AM
12
LOW PHASE NOISE, TRIPLE OUTPUT CLOCK
N/A LTC6954IUFF-1/-2/-3/-4
KIM T.
MICHEL A.
DISTRIBUTION DIVIDER/ DRIVER
J1
SMA-R
OUT0+
J1
SMA-R
OUT0+
R18 49.9 R18 49.9
C25
0.01uF
0201 C25
0.01uF
0201
E11
GND
E11
GND
R14
0
R14
0
C14 1uF 0603 C14 1uF 0603
C17
0.01uF
0201 C17
0.01uF
0201
R19 OPT R19 OPT
Z4
*
Z4
*
R17 OPT R17 OPT
R32 0603 OPT R32 0603 OPT
J11
3.15V - 3.45V
V+ J11
3.15V - 3.45V
V+
C23 0.1uF C23 0.1uF
C15
0.01uF
0201 C15
0.01uF
0201
R7
0
R7
0
R30 0603 OPT R30 0603 OPT JP2JP2
1 3 2
Z3
*
Z3
*
R3 OPT R3 OPT
E10
3.15V - 3.45V
E10
3.15V - 3.45V
Z2
*
Z2
*
C24 0.1uF C24 0.1uF
R31 0603 OPT R31 0603 OPT
J5
SMA-R
OUT2+
J5
SMA-R
OUT2+
C2 0.1uF C2 0.1uF C1 0.1uF C1 0.1uF
R27 0603 OPT R27 0603 OPT
C22 0.1uF C22 0.1uF
R9
0
R9
0
R35 200K R35 200K
GNDGND
C28 0.1uF C28 0.1uF
R29 0603 OPT R29 0603 OPT
C21
0.01uF
0201 C21
0.01uF
0201
R11
*
R11
*
C8
0.1uF
C8
0.1uF
Z1
*
Z1
*
R20 49.9 R20 49.9
C13 0.1uF C13 0.1uF
JP1JP1
1 3 2
C12 0.1uF C12 0.1uF C29
0.1uF C29 0.1uF
E9
SYNC
E9
SYNC
R8 OPT R8 OPT R5 OPT R5 OPT
C9 0.1uF C9 0.1uF
C20
0.01uF
0201 C20
0.01uF
0201
R12
0
R12
0
J3
SMA-R
OUT1+
J3
SMA-R
OUT1+
J6
SMA-R
OUT2-
J6
SMA-R
OUT2-
R6 * R6 *
R2
0
R2
0
C10 0.1uF C10 0.1uF
J9
SMA-R
IN-
J9
SMA-R
IN-
+
C16 22uF 3528 10V
+
C16 22uF 3528 10V
E12
TEMP
E12
TEMP
R16 OPT R16 OPT
Z6
*
Z6
*
U1 *
QFN36UFF-4X7
U1 *
QFN36UFF-4X7
V+OUT1 8 V+OUT0 9
OUT0- 10 OUT1- 6
OUT1+ 7
V+A
34
OUT2SEL
36
SDO 17
OUT0+ 11
V+OUT0 12
OUT0SEL 13
GND 14
IN-
28
GND
29
TEMP
31
V+IN
30
V+A 15
V+OUT2 1
SCLK
19
SDI
20
V+D
21
SYNC
22
V+A
23
V+A
24
V+IN
25
GND
26
IN+
27
OUT2+ 3
OUT1SEL
33
GND
32
V+OUT2 4
GND
35
OUT2- 2
V+D 18
CS 16
V+OUT1 5
GND
37
GNDGND
J7
SMA
SYNC
J7
SMA
SYNC
C19
0.01uF
0201 C19
0.01uF
0201
R28 0603 OPT R28 0603 OPT
E13
GND
E13
GND
R10 OPT R10 OPT
JP3JP3
1 3 2
J2
SMA-R
OUT0-
J2
SMA-R
OUT0-
J4
SMA-R
OUT1-
J4
SMA-R
OUT1-
R1 * R1 *
J8
SMA-R
IN+
J8
SMA-R
IN+
C27
0.01uF
0201 C27
0.01uF
0201
R13 OPT R13 OPT
Z5
*
Z5
*
R4
0
R4
0
R15 OPT R15 OPT
C18
0.01uF
0201 C18
0.01uF
0201
GNDGND
C26
0.01uF
0201 C26
0.01uF
0201
J10
GND
J10
GND

9
dc1954af
DEMO MANUAL DC1954A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Note: The buffers shown on sheet 2 of 2 of the schematic are used to protect the LTC6954 when connected to the DC590 before the
LTC6954 is powered up. There is no need for such circuitry if the SPI bus is not active before powering up the LTC6954. The EEPROM
is for identification and is not needed to program the LTC6954.
schematic Diagram
5 5
4 4
3 3
2 2
1 1
D D C C B B A A
NOTE: EEPROM FOR BOARD IDENTIFICATION
DC590 SPI INTERFACE
V+
V+ V+
V+
CS
SCLK
SDI
SDO
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1954A
10/03/2013, 10:30 AM
22
LOW PHASE NOISE, TRIPLE OUTPUT CLOCK
N/A LTC6954IUFF-1/-2/-3/-4
KIM T.
MICHEL A.
DISTRIBUTION DIVIDER/ DRIVER
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1954A
10/03/2013, 10:30 AM
22
LOW PHASE NOISE, TRIPLE OUTPUT CLOCK
N/A LTC6954IUFF-1/-2/-3/-4
KIM T.
MICHEL A.
DISTRIBUTION DIVIDER/ DRIVER
SIZE DATE:
IC NO. REV.
SHEET OF
TITLE:
APPROVALS
PCB DES.
APP ENG.
TECHNOLOGY Fax: [phone]
Milpitas, CA 95035 Phone: [phone] McCarthy Blvd. LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SCHEMATIC
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
www.linear.com
2
DEMO CIRCUIT 1954A
10/03/2013, 10:30 AM
22
LOW PHASE NOISE, TRIPLE OUTPUT CLOCK
N/A LTC6954IUFF-1/-2/-3/-4
KIM T.
MICHEL A.
DISTRIBUTION DIVIDER/ DRIVER
R34 100 R34 100
C4 0.1uF C4 0.1uF
R40 100 R40 100
CSCS
C3 0.1uF C3 0.1uF
R36 100 R36 100 R33 100 R33 100
V+DIGV+DIG
R38
200K
R38
200K
SDOSDO
J12
HD2X7-079-MOLEX
J12
HD2X7-079-MOLEX
MOSI/SDA 7
EESDA 9
V+ 1
5V 2
CS 6
SCK/SCL 4
EEVCC 10
MISO 5
EESCL 11
EEGND 12
AUX 14
GND
3
GND
13
GND
8
R39
200K
R39
200K
R26 0 0603 R26 0 0603
EEPROM
ARRAY
U5 24LC025-I /ST
EEPROM
ARRAY
U5 24LC025-I /ST
SDA
5
VCC 8
A0
1A1 2A2 3
GND
4
WP
7
SCL
6
R22 200K R22 200K
C5 0.1uF C5 0.1uF
WPWP R37
200K R37 200K
GND VCC
U3 NC7WZ17P6X
GND VCC
U3 NC7WZ17P6X
1 6
43 52
EEGNDEEGND
GND DIR VCC(A) VCC(B)
U4 74LVC1T45GW
GND DIR VCC(A) VCC(B)
U4 74LVC1T45GW
1 6
43 52
R24 4.99K R24 4.99K
SDISDI
C6 0.1uF C6 0.1uF
R23 4.99K R23 4.99K
C7 0.1uF C7 0.1uF
R25 4.99K R25 4.99K
SCLKSCLK
GND VCC
U2 NC7WZ17P6X
GND VCC
U2 NC7WZ17P6X
1 6
43 52

10
dc1954af
DEMO MANUAL DC1954A
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
[phone] ●FAX: [phone] ●www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2014
LT 1014 • PRINTED IN USA
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LT C ) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LT C for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU
OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LT C from all claims
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. LT C assumes no liability for applications assistance,
customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LT C currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and
observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LT C applica-
tion engineer.
Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation

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