Lyrtech Radio420X User manual
Radio420X
User’s guide
Version 1.1 — November 2011
ii
Revision history
Version
Date
Modicaons
1.0
2011-07
1.1
2011-10
1.2
2011-11
©
iii
Trademarks
TM®
Warning
FCC warning
Table of contents
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1
Introduction
user’s guide
Conventions
File
N/A not applicablenot available
NC no connecon.
Glossary of terms
Table 1
Term
Denion
2
Term
Denion
3
Term
Denion
Technical support
.
MC
F
Product description
Overview
Outstanding features
Hardware description
Figure 1
D
8× FP control
4
3× PLL control
Tx
Tx2
Rx
Data + IQSel
Data + IQSel + RXClk
14
RESET
_Tx EN1
Rx_EN1
RF SPI
2.
I/
4× PLL SPI
3× DAC SPI
Each SPI is free to use independant
VHDL cores to modify its values
without going through an arbiter,
optimizing access time.
3× DAC SPI
3× PLL control
4× PLL SPI
Ctrl
6× RX/TX gain SPI
Rx2
Rx1
Tx1
4
Extension
MIMO
FMC
34 LPC pair s
13
6× clock control
FP I/O expander
(micro HDMI)
8× FP IOl
Level adapter
34 LPC
pairs
LMS6002D
RF path
36 HPC
pairs
PPS In
Clock/Reference
management section
Front panel MMCX
Ref In
Ref Out
Top
Figure 2
1 2
3
4
6
5
1
it.
2
3
4
r
it.
5
e
7
s
6
Bottom
Figure 3
1 2 3 4 5
6
7
8
9
10
11
12
1
t
2
t.
3
see t.
4 2
22
8
5
e
6
7
8
9
10
11
12
9
Front panel
Figure 4
Ref outRef inTXRX
I/O expander PPS in
1 Ref out
Ω
t.
2 Ref in
Ω
t.
3 TX
Ω
s
4 RX
Ω
s
5 PPS in
r
6 expander connector
r
10
Component details
Clock distribution circuit
Figure 5
Radio420X clock management facility
AMC
LMS6002D
TX_CLKRX_CLK
PLL_CLK
Ref out clk
Front panel
reference input/
PPS input
PLL —TI
CDCE62005
FMC CLK2
DIV0DIV1
TX_CLK
DIV2
RX_CLK
AUX
IN1
IN2
FMC CLK3
Front panel
reference output
4× SPI
4× SPI
FMC CLK1
FMC CLK0
1PPS
6× CTRL
4× SPI
Lock detect
LD
0Ω resistor switch
Default: routed to
CDCE62005
3× CTRL
3× SPI
SPI I/O Exp
Translation
CPLD
16-bit
SPI DAC
VCXO
30.72 MHz
4×4
Cross switch
FMC
DIV3
CDCE62005 operation
Table 2
Descripon
Value
Frequency range
Connecon
11
Descripon
Value
Frequency range
Connecon
SISO conguration
Table 3
Address
Value
12
MIMO conguration
I/O expander CPLDs
Table 4
Bit
Bit name
Descripon
0
1
2
3
7
1.
8
1.
9
10
11
13
RF path
Figure 6
Low band TX
RX
8× high-band
filters bank
High band
8× low-band
filters bank
SPI TX gain
SPI RX gain
23db
From I/O
expander
From I/O
expander
From I/O
expander
From I/O
expander
Analog RF paths
LMS 6002D
TX1
TX2
RX1
RX2
SP8T
8SP T
SP8T
SP8T
Transmission
50 Ω
25 dBm.
Reception
t
RF gain
Figure 7
RX lter banks
Table 5
Filter port number
Frequency (MHz)
Bandwidth (MHz)
Table 6
Table of contents
