McCain 2070E LA CITY User manual

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Version
REVISIONS
Rev
By
Date
Comments
1.0
G. Velarde
May 22, 2014
Initial Release

DISCLAIMERS
User Responsibility
This document is subject to revision. Users of this document are responsible for verifying the current
version status before using this document and or discarding all older revisions.
McCain Inc. shall not be liable for errors contained herein or for incidental or consequential damages in
connection with furnishing, performance or use of this material. MCCAIN MAKES NO WARRANTY OF
ANY KIND WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
This document contains proprietary and confidential information and is the sole property of McCain. No
part of this document may be photo copied, reproduced or translated to another language without the
prior written consent of McCain.
This manual is copyright © 2014 by McCain Inc. All rights reserved.
McCain Inc. // 2365 Oak Ridge Way // Vista, CA 92081
PH 760-727-8100
Product Specifications: www.mccain-inc.com
Customer Support: support@mccain-inc.com
Product Inquiries: 888-2-McCain (888-262-2246)

2070E LA City Controller –User Manual i
Version 1.0
Table of Contents
12070E LA CITY CONTROLLER........................................................................................................1
1.1 Product description......................................................................................................................................1
1.2 Benefits ........................................................................................................................................................1
1.3 Configuration ...............................................................................................................................................1
1.4 Standard features.........................................................................................................................................4
1.5 Interfaces .....................................................................................................................................................4
22070-1E LA CITY CPU MODULE ....................................................................................................5
2.1 General description......................................................................................................................................5
2.2 Standard features.........................................................................................................................................6
2.3 Communication interfaces’ description .......................................................................................................6
2.4 Theory of operation ...................................................................................................................................10
2.5 2070-1E LA City Board Block Diagrams ......................................................................................................15
2.6 Connectors’ Pin Out: ..................................................................................................................................17
2.7 2070-1E LA City module dimensions..........................................................................................................19
2.8 Adjustment.................................................................................................................................................19
2.9 Installing the 2070-1E LA City CPU Module................................................................................................19
32070-2E LA CITY MODULE, FIELD I/O MODULE...........................................................................20
3.1 General description....................................................................................................................................20
3.2 Theory of operation. ..................................................................................................................................21
3.3 2070-2E LA City Block Diagram ..................................................................................................................27
3.4 Connectors’ Pin Out ...................................................................................................................................29
3.5 2070-2E LA City module dimensions..........................................................................................................31
3.6 Installing the 2070-2E LA City Module .......................................................................................................31
42070-7A LA CITY MODULE, ASYNC COMMUNICATION SERIAL BOARD ........................................32
4.1 General description....................................................................................................................................32
4.2 Theory of operation ...................................................................................................................................33
4.3 2070-7A LA City Block Diagram ..................................................................................................................34
4.4 Connectors’ Pin Out: ..................................................................................................................................35
4.5 The 2070-7A LA City module dimensions...................................................................................................35
4.6 Adjustment.................................................................................................................................................36
4.7 Installing the 2070-7A LA City Module.......................................................................................................37

ii
52070-3A LA CITY MODULE, FRONT PANEL ASSEMBLY.................................................................37
5.1 General description....................................................................................................................................37
5.2 Theory of operation ...................................................................................................................................38
5.3 2070-3A LA City Block Diagram ..................................................................................................................40
5.4 Connectors’ Pin Out ...................................................................................................................................41
5.5 2070-3A LA City module dimensions: ........................................................................................................41
5.6 Adjustment.................................................................................................................................................41
5.7 Installing the 2070-3A la city Module ........................................................................................................42
62070-4A LA CITY POWER SUPPLY MODULE ................................................................................42
6.1 General description....................................................................................................................................42
6.2 Theory of operation ...................................................................................................................................43
6.3 2070-4A LA City Block Diagram ..................................................................................................................48
6.4 PS1 and PS2 Connectors’ Pin Out...............................................................................................................49
6.5 2070-4A LA City module dimensions .........................................................................................................50
6.6 Adjustment.................................................................................................................................................50
6.7 Installing the 2070-4A LA City module .......................................................................................................51
7CHASSIS UNIT ...........................................................................................................................51
7.1 General description....................................................................................................................................51
7.2 Serial Motherboard ....................................................................................................................................53
7.2.1 Theory of operation ...............................................................................................................................53
7.3 2070 Serial Motherboard Block Diagram ...................................................................................................54
7.4 Connectors’ Pin Out: ..................................................................................................................................55
8GENERAL SPECIFICATIONS ........................................................................................................61

2070E LA City Controller –User Manual iii
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Table of Figures
Figure 1: 2070E LA City Controller, Front and Rear Views ..........................................................................2
Figure 2: 2070E LA City Controller System Configuration............................................................................3
Figure 3: 2070-1E LA City CPU Module.......................................................................................................5
Figure 4: 2070-1E LA City CPU Dimensions..............................................................................................19
Figure 5: 2070-2E LA City Module..............................................................................................................20
Figure 6: 2070-2E LA City Dimensions.......................................................................................................31
Figure 7: 2070-7A LA City Module..............................................................................................................33
Figure 8: 2070-7A LA City Dimensions.......................................................................................................35
Figure 9: Jumpers J1 and J2.......................................................................................................................36
Figure 10: Jumpers J3 and J4.....................................................................................................................36
Figure 11: 2070-3A LA City Module............................................................................................................38
Figure 12: 2070-3A LA City Dimensions.....................................................................................................41
Figure 13: Power Supply 2070-4A LA City .................................................................................................43
Figure 14: 2070-4A LA City Dimensions.....................................................................................................50
Figure 15: 2070E Chassis unit....................................................................................................................52
Figure 16: Front and rear view 2070E Chassis...........................................................................................52
Figure 17: 2070 Serial motherboard...........................................................................................................53

iv
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2070E LA City Controller –User Manual 1
Version 1.0
1 2070E LA CITY CONTROLLER
1.1 PRODUCT DESCRIPTION
The 2070E LA City Controller is a ruggedized, multitasking field processor and communications system
that is easily configurable for a variety of traffic management applications in either a rack or shelf mount
configuration.
The 2070E LA City Controller has a general purpose nature, open architecture and modular design, and
its functionality depends on the software loaded into the controller and the modules included.
McCain’s 2070E LA City Controller, is designed in full compliance with Caltrans Transportation Electrical
Equipment Specifications (TEES) 2009 and Errata 1 Jan 21st 2010.
The McCain’s 2070E LA City Controller’s primary function is intersection control but can be used for a
multitude of applications based on the controller’s software.
The controller’s OS/9 operating system provides a robust, flexible and expandable platform that is
compatible with multi-vendor application control software.
1.2 BENEFITS
Open Architecture insures compatibility with off-the-shelf products OS/9 Software –Standard
Software Modules from Multiple Sources.
Flexible Design to Meet Specific User Needs.
The controller’s multitasking operating system (OS) supports a variety of applications.
Easily upgrades current intersection hardware.
Multitasking –Each 2070E LA City Unit Can Control Multiple Applications.
Physically Compatible with Model 170&170E Controllers & Facilities.
1.3 CONFIGURATION
This controller configuration is constructed as follows (See Figure 1):
2070E Chassis unit
2070-1E LA City CPU module
2070-2E LA City Field I/O module
2070-3A LA City Front Panel module
2070-4A LA City Power Supply module
2070-7A LA City Asynchronous Serial Communications module
Blank filler plates: There are four 2X and one 1X

2
FRONT VIEW
REAR VIEW
Figure 1: 2070E LA City Controller, Front and Rear Views

2070E LA City Controller –User Manual 3
Version 1.0
Figure 2: 2070E LA City Controller System Configuration
SERIAL MOTHERBOARD
2070-2E
LA CITY
FIELD I/O
2070-1E
LA CITY
CPU
2070-3A LA CITY FRONT PANEL
SP1
SP2
SP3
SP4
SP5
SP6
ETHERNET
LINESYNC
POWERUP
POWERDN
CPURESET
FRONT PANEL
CONTROLLER
C50S
C14
S
C13S
C1
S
C11S
C12
S
SP8
ETHERNET
LINESYNC
POWERUP
NRESET
I/O
2070-4A
LA CITY
POWER
SUPPLY
LINESYNC
POWERUP
NRESET
SP3 AND SP5
A2
A3
A5
COMM
C21S
C22S
A1
2070-7A
LA CITY

4
1.4 STANDARD FEATURES
Operating system
Microware Embedded OS-9
Modules (standard, included)
2070-1E LA City CPU Module
2070-2E LA City Field I/O module
2070-3A LA City Front Panel Module
2070-4A LA City Power Supply
2070-7A LA City Asynchronous Serial Communications module.
Microprocessors
CPU Module: Freescale MC68EN360, 32 Bit, 24.576 MHz microprocessor
I/O Module: Freescale MC68LC302 microprocessor, running at 20 MHz
Backup real-time clock (RTC)
Texas Instrumens BQ4845S-A4N
Memory
32 MB PSRAM (Main RAM).
8 MB Flash Memory.
2 MB NonVolatile-SRAM.
Applicable standards
Meets or exceeds Caltrans TEES 2009 standard with additional considerations specific to the City
of Los Angeles’ specifications.
1.5 INTERFACES
Communication interfaces
2 SDLC, 5 ACIA (up to 38Kbps).
Ethernet (10 Mbps I802-3(TP) 10 BASE-T Standard) wired to an integrated 10/100Mbps Ethernet
Switch.
Front panel interface
Display: 4 lines x 40 characters
Keyboards: 3 x 4 navigation and 4 x 4 data entry keypads
Cabinet interfaces
C11S Connector
C12S Connector
C1S Connector

2070E LA City Controller –User Manual 5
Version 1.0
2 2070-1E LA CITY CPU MODULE
2.1 GENERAL DESCRIPTION
The 2070-1E LA City CPU Module is the brain of the controller. It includes the microprocessor computer
chip, memory, serial communications and operating system. The 2070-1E LA City is a module meeting
the 2X WIDE board requirements. The module is furnished normally resident in the Slot A5 of
Motherboard.
The 2070-1E LA City Assembly consists of a Printed Circuit Board Assembly and a front plate. The front
plate is attached to the board by using two screws and two washers.
The 2070-1E LA City microprocessor is a Freescale MC68EN360 running at 24.576 MHz.
It consists of a Host Board, an Engine Board and a faceplate (plus brackets, standoffs and hardware to fix
them to the host board).
Figure 3: 2070-1E LA City CPU Module

6
2.2 STANDARD FEATURES
Processor: Freescale MC68EN360, 32 Bit, 24.576 Mhz, CPU32 Instruction Set.
Memory
o256Mbit (8 M x 32 Bits) PSRAM (Main RAM)
o64Mbit (4 M x 16 Bits) Flash Memory
o16Mbit (1 M x 16 Bits) NonVolatile-SRAM
Comm
o2 SDLC, 5 ACIA (up to 38Kbps)
oEthernet (10 Mbps I802-3(TP) 10 BASE-T Standard) wired to an integrated 10/100Mbps
Ethernet Switch
Serial Buses: EIA RS-485 to Motherboard (6 COMM + modem control).
Time-of-day clock
Security: DATAKEY provides multiple levels of human access
Interrupts
CPU reset
CPU activity LED
Tick timer
2.3 COMMUNICATION INTERFACES’ DESCRIPTION
Serial Port 1 (SP-1):
Usage: This is a general purpose port.
Location: available at the DIN-96 connector.
Operating modes: Asynchronous, Synchronous, HDLC, SDLC.
Async rates (bps): 1200, 2400, 4800, 9600, 19.2k, 38.4k / Optional: 57.6k, 115.2k.
Sync rates (bps): 19.2k, 38.4k, 57.6k, 76.8k, 153.6k.
Interface pins:
SP1_TXD: Transmit Data (O)
SP1_RXD: Receive Data (I)
SP1_RTS: Request To Send (O)
SP1_CTS: Clear To Send (I)

2070E LA City Controller –User Manual 7
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SP1_CD: Carrier Detect (I)
SP1_TXC_INT: Transmit Clock Internal (O)
SP1_TXC_EXT: Transmit Clock External (I)
SP1_RXC_EXT: Receive Clock External (I)
Serial Port 2 (SP-2):
Usage: This is a general purpose port.
Location: available at the DIN-96 connector.
Operating modes: Asynchronous, Synchronous, HDLC, SDLC.
Async rates (bps): 1200, 2400, 4800, 9600, 19.2k, 38.4k / Optional: 57.6k, 115.2k.
Sync rates (bps): 19.2k, 38.4k, 57.6k, 76.8k, 153.6k.
Interface pins: SP2_TXD: Transmit Data (O)
SP2_RXD: Receive Data (I)
SP2_RTS: Request To Send (O)
SP2_CTS: Clear To Send (I)
SP2_CD: Carrier Detect (I)
SP2_TXC_INT: Transmit Clock Internal (O)
SP2_TXC_EXT: Transmit Clock External (I)
SP2_RXC_EXT: Receive Clock External (I)
Serial Port 3 (SP-3):
Usage: To handle in-cabinet devices.
Location: available at the DIN-96 connector.
Operating modes: Asynchronous, Synchronous, HDLC, SDLC.
Async rates (bps): 1200, 2400, 4800, 9600, 19.2k, 38.4k / Optional: 57.6k, 115.2k.
Sync rates (bps): 153.6k, 115.2k.
Interface pins: SP3_TXD: Transmit Data (O)
SP3_RXD: Receive Data (I)
SP3_RTS: Request To Send (O)

8
SP3_CTS: Clear To Send (I)
SP3_CD: Carrier Detect (I)
SP3_TXC_INT: Transmit Clock Internal (O)
SP3_TXC_EXT: Transmit Clock External (I)
SP3_RXC_EXT: Receive Clock External (I)
Serial Port 4 (SP-4):
Usage: External user interface and general purpose.
Location: available at the DIN-96 connector.
Operating modes: Asynchronous.
Async rates (bps): 1200, 2400, 4800, 9600, 19.2k, 38.4k / Optional: 57.6k, 115.2k
Interface pins:
SP4_TXD: Transmit Data (O)
SP4_RXD: Receive Data (I)
Serial Port 5 (SP-5):
Usage: To handle in-cabinet devices.
Location: available at the DIN-96 connector.
Operating modes: Synchronous, HDLC, SDLC.
Sync rates (bps): 153.6k, 614.4k.
Interface pins:
SP5_TXD: Transmit Data (O)
SP5_RXD: Receive Data (I)
SP5_TXC_INT: Transmit Clock Internal (O)
SP5_RXC_EXT: Receive Clock External (I)
Serial Port 6 (SP-6):
Usage: Front panel user interface.
Location: available at the DIN-96 connector.
Operating modes: Asynchronous.

2070E LA City Controller –User Manual 9
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Async rates (bps): 1200, 2400, 4800, 9600, 19.2k, 38.4k / Optional: 57.6k, 115.2k
Interface pins:
SP6_TXD: Transmit Data (O)
SP6_RXD: Receive Data (I)
Serial Port 8 (SP-8):
Usage: General purpose.
Location: available at the C13S connector on Front plate.
Operating modes: Asynchronous, Synchronous, HDLC, SDLC.
Async rates (bps): 1200, 2400, 4800, 9600, 19.2k, 38.4k / Optional: 57.6k, 115.2k.
Sync rates (bps): 19.2k, 38.4k, 57.6k, 76.8k,153.6k.
Interface pins:
SP8_TXD: Transmit Data (O)
SP8_RXD: Receive Data (I)
SP8_RTS: Request To Send (O)
SP8_CTS: Clear To Send (I)
SP8_CD: Carrier Detect (I)
SP8_TXC_INT: Transmit Clock Internal (O)
SPI (Serial Peripheral Interface):
Usage: Ethernet communication and DATAKEY.
Location: DataKey’s receptacle at Front plate and serial EEPROM on Host Board.
Operating modes: Synchronous.
Sync rates (bps): Application specific.
Interface pins:
SPI_MOSI: Master-Out-Slave-In (O)
SPI_MISO: Master-In-Slave-Out (I)
SPI_CLK: Clock (O)
SPI_SEL_1: Select 1 (O)
SPI_SEL_2: Select 2 (O)

10
SPI_SEL_3: Select 3 (O)
SPI_SEL_4: Select 4 (O)
Ethernet Interface (ENET):
Usage: Local and Network Communications.
Location: Two 10/100BASE-T Ethernet ports on Front plate.
Operating modes: Synchronous, Manchester-encoded, Differential.
Sync rates (bps): 10M, 100M.
The Ethernet switch uses the ports as follow:
ENET1P0 to communicate to the Ethernet transceiver (IC2).
ENET1P1 and ENET1P2 to communicate signals to/from the C14S connector.
ENET1P3 available at the P2 header.
ENET1P4 to communicate signals to/from the A5 connector at the Backplane.
2.4 THEORY OF OPERATION
The 2070-1E LA City CPU consists of a single PCB assembly and a metal panel fixed by two screws and
two washers.
The assembly contains all of the control circuitry for the CPU functions: main processor, FLASH memory,
SRAM, PSRAM, RTC, a bidirectional buffer bank for the data, address lines and control lines coming from
the processor, a slave processor, the back-up capacitors, RESET circuit, isolation circuit for control
signals coming from the power supply, isolation circuit for SP8, C13S connector, C14S connector,
Ethernet circuit, DATAKEY circuit, driver filed circuit (RS 485 transceivers), LINESYNC circuit, A2 and A3
connector sensor, and A5 connector.
Main Processor
The 2070-1E LA City CPU uses the MC68360 Quad Integrated Communication Controller as the main
processor, it is clocked by and external 24.576MHz oscillator. The term "quad" comes from the fact that
there are four serial communications controllers (SCCs) on the device. However, there are actually seven
serial channels which include four SCCs, two serial management controllers (SMCs), and one serial
peripheral interface (SPI).
This processor handles the system buses, memory, serial communication ports (SP2, SP3, SP4, SP5 and
SP6), Ethernet communication and DATAKEY through SPI port; it also generates the CPU RESET and
FPA LED signals.
Slave Processor
This a MC68LC302 clocked by an external 16MHz oscillator. This processor handles the serial
communication ports SP1, SP8 and the baud rate for SP4.
Clocks

2070E LA City Controller –User Manual 11
Version 1.0
These different clock signals are used on the CPU.
24.576MHz oscillator is used for the main processor MC68EN360.
16MHz oscillator is used for the slave processor MC68LC302.
20MHz oscillator is used for the Ethernet interface transceiver.
25MHz oscillator is used for the Ethernet switch.
32.768KHz crystal is used for the RTC circuit.
Address Bus
This is a bidirectional 23-bit bus (A0-A22) capable of addressing up to 4GByte of data.
Data Bus
This is a bidirectional 32-bit bus (D0-D31) used to carry data among the processors, memories and other
system devices.
Decoding Signals
The signals for write enable, /OE, R/W’, CHIP SELECTS are used themselves and also are combined into
a glue logic stage in order to generate the required signals for the control and interaction among the
devices.
Buffer Circuit
This circuit consists of four octal bus transceivers SN74LVC245 and five octal bus transceivers
SN74LVC541 used to translate signals as data, address and some control lines from and to the other
board devices.
Transceivers SN74LVC245 connect the 32-lines data bus (D0-D31) from processor to other board
devices (memories, slave processor, RTC) and vice versa. The transceivers are enabled by the input /G
that is connected to the line D CSDB; when this line is HIGH the buses are effectively isolated, when
LOW the buses are enabled. The direction of the bus is controlled by the input DIR that is connected to
the line /DOE; when this line is LOW, communication is from bus B to bus A, when HIGH it is from bus A
to bus B.
Transceivers SN74LVC541 connect the 23-lines address bus from processor to other board devices
(memories, slave processor, RTC) and vice versa. The transceivers are enabled by the inputs /OE1 and
/OE2 that are tied to GND, then the buses are always enabled.
A5 connector
This 96-pin DIN connector is the physical interface between CPU and serial motherboard. It carries the
RS 485 differential signals for the communication ports S1 to SP6, the interruption signals LINESYNC,
POWERUP and POWERDN, the Ethernet transmission and reception lines, the +5VDC, +5VSTD and
+12VISO, A2 and A3 install lines, and the CPURESET and FPALED lines.

12
C13S Connector
This is a DB25 connector containing the RS 485 differential line communication signals for the SP8, the
external control signals from 2070 power supply also as RS 485 signals and the +5VDCISO power.
A2 and A3 Connector Sensor
This circuit is used to let know the CPU when the A2 and/or A3 slots on serial motherboard are being
used.
It is made of two inverter gates SN74LV04 (U18A and U18B) with pull-up and connected to the sensing
lines on A5 connector, these two lines come from the A2 and A3 slot connectors on serial motherboard.
The output of the inverter gates is LOW until A2 and/or A3 are used.
A2INSTALL: When A2 slot on serial motherboard is used, this line goes to GND forcing the output of
U18A to HIGH. This line enables the differential line drivers for SP1 and SP2 transmission.
A3INSTALL: When A3 slot on serial motherboard is used, this line goes to GND forcing the output of
U18B to HIGH. This line enables the differential line drivers for SP5 transmission.
Linesync Circuit
It is used to generate the /IRQ5 for processor, this interruption occurs on both rise and fall flanges of
LINESYNC signal.
It is implemented with two D-Type Flip-Flop SN74LV74, one inverter gate SN74LV04 and two buffer
gates 74LV125.
The two clear outputs are tied to +5VDC.
The two data input are tied to GND.
LINESYNC signal coming from 2070 power supply module is fed to CLK2, it is also inverted and fed to
CLK1.
The buffer gates’ inputs are tied to GND.
When LINESYNC transitions from LOW to HIGH at CLK2, Q2 goes to LOW and enables U19D
generating a LOW output.
When LINESYNC transitions from HIGH to LOW, inverter gate convert it to a LOW to HIGH transition at
CLK1, Q1 goes to LOW and enables U19C generating a LOW output.
The two active LOW preset inputs are connected to a pull-up and to the LINESYNC_CTL line; that is, the
outputs Q1 and Q2 of U6 are set to HIGH by using this line every time the processor receives the /IRQ5.
CPU Reset Circuit
This circuit receives the reset from main processor through the CPU LRESET line and sends the reset to
A5 connector through the CPURESET line; this reset is used by the other modules connected to serial
motherboard.
It is formed by using an inverter gate, two resistors, and one NPN transistor.
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