MSI ms 7529 Quick start guide

1
1
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Date:
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MS-7529
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MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
133
Custom
Cover Sheet
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
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Date:
MSI
1.1
MS-7529
133
Custom
Cover Sheet
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
MS-7529
System Chipset:
Expansion Slots:
CPU:
On Board Chipset:
PCI2.3 SLOT * 2
BIOS -- SPI
HD -- ALC888
LPC Super I/O -- F71882FG
Intel Bearlake - MCH (North Bridge)
Intel ICH7R (South Bridge)
Main Memory:
ST PWM:
Controller: 3 PHASES
PCI EXPRESS X16 SLOT
1Cover Sheet
Block Diagram/Clock Map/Power Map 2-4
CLOCK -- RTM876-665
LAN-- REALTEK RTL8111C Co-lay RTL8101E
Version 1.1
ATA33/66/100 IDE & SATA Connectors
Azalia - ALC888
12
Intel ICH7 - LPC & ATA & USB & GPIO 13
Intel ICH7 - PCI & DMI & CPU & IRQ
5-7
Clock - RTM 876-665
PWM-ST L6703TR
USB Connectors
ATX Connetcor & Front Panel
Intel LGA775 CPU
UPI ACPI CONTROLLER
22
21
LPC I/O - Fintek 71882FG
PCI Slot 1 & 2
GMCH VCORE
DDR II VTT Decoupling
PCI EXPRESS X16 Slot
Intel Bearlake - MCH
Intel ICH7 - POWER
23
8-11
14
15
16
17
18
19
20
LAN REALTEK RTL8111C/8101E
24
25
26
27
28
29
30
DDR II DIMM A
DDR II *2 (Max 4GB)
VGA Connector
Intel Conroe (65W Dual core)
DDR II DIMM B

1
1
A A
Size Document Description Rev
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Date:
MSI
1.1
MS-7529
233
Custom
BLOCK DIAGRAM
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
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Date:
MSI
1.1
MS-7529
233
Custom
BLOCK DIAGRAM
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
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Date:
MSI
1.1
MS-7529
233
Custom
BLOCK DIAGRAM
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Block Diagram
Intel LGA775 Processor
Bearlake
GMCH
ICH7
VRM 10.1
2DDR II
Modules
LPC SIO
Keyboard
Mouse
Floopy Parallel Serial
PCI Slot 1
USB
DMI
LPC Bus
PCI Slot 2
DIMM
DDRII
USB Port 0~7
PCI
TPM
FSB
Fintek
RT6703
3-Phase PWM
RTL8111C
200/266
/333MHz
333/400
MHz
ALC888
PCI
UltraDMA
33/66/100
IDE Primary
SATA 0~3
SATA
F71882F
HD
FSB 800/1066/1333
DDR2 667/800
X16
PCI EXPRESS
Connector
PCI EXPRESS X16
Video
Out
Analog
RGB
SPI
SPI

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
333
Custom
CLOCK MAP
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
333
Custom
CLOCK MAP
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
333
Custom
CLOCK MAP
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
LGA775
G31
ICH7
Fintek SIO
HCLK
MCHCLK
DOT96M
USB48MHz
ICH14.318MHz
SIO48MHz
PCIELAN_100M
33MHz
33MHz
PCICLK[0..1]
PCI1
PCI2
RTM876-660
PCIE X 16
PCIEX16 100MHz
CLOCK MAP
RTL8111C
HDCLK 24M
ALC888
CH A
DDRCLKA
PCIECLK
PCIECLK
ICHCLK
SATACLK
TPM
CH B
TPMCLK_33M
DDRCLKB

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Description Rev
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Date:
MSI
1.1
MS-7529
433
Custom
LGA775 - Signal
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
433
Custom
LGA775 - Signal
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
433
Custom
LGA775 - Signal
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
G31 MCH
1.8V DDR2 I/O-4.4A(S0,S1)
1.8V DDR2 I/O-25mA(S3)
1.2V FSB Vtt-0.9A
1.5V Core-13.8A(Integrated)
1.5V Core-8.9A(Discrete)
1.5V PCI Express&DMI-1.5A
2.5V DAC-70mA*
2.5V HV-3mA
2.5V CMOS-2.0mA
1.5V PCIE&DMI PLL-45mA
1.5V HOST PLL-45mA
1.5V VCCA_DPLLA&B-55mA
1.5V MPLL-66mA
0.9V DDR2 VREF-2mA
0.9V DDR2 SB_VREF-10uA
DDR2 Resister Comp V-36mA
DDR2 Resis Comp SB_V-10uA
ICH7
1.2V VCC_CPU-14mA
1.05V Core-0.86A
VCC1_5A*-1.01A
VCC1_5B*-0.77A
5VRef-6mA
5VrefSus-10mA
+3.3V-0.33A
RTC-6uA(G3)
3.3V VccSus*-52mA
VccSus1_05V-See Note 1
VccUSBPLL-10mA
VccDMIPLL-50mA
VccSATAIPLL-50mA
Processor
0.8375-1.6000V Core-125A
1.2V FSB Vtt-5.3A
ATX POWER
+5VSB+12V +5V +3.3V+12V
2x2
ATX
V_1P5_CORE
uP6103 Regulator
V_2P5_MCH
2.5V
uP7707 Regulator
3VSB
3.3V
uP7706 Regulator
5VDIMM
5V
uP7501 Regulator
1.05V Regulator
V_1P05_CORE
VTT Regulator
V_FSB_VTT
1.5V
1.05V
1.2V
VCC_DDR
uP6103 Regulator
1.8V
L6703 Regulator
VCCP
0.8375-1.6000V
DDR2 DIMM conn(4) & term
0.9V SM Vtt-1.2A(S0)
1.8V Vdd/vddq-4.7A(S0,S1)
VTT_DDR
W83310DS Regula
0.9V
Divider
R
L
L
VCCPLL
VCC-IOPLL & VCCA
R
Battery
Audio Codec
USB
PS2
SIO
CLKGEN
SPI ROM
LAN
PCIE X16 slot(1)
PCIE X1 slot(1)
PCI slot slot(4)
+12V-5.5A
+3.3Vaux-375mA(wake)
+3.3Vaux-20mA(no wake)
+3.3V-3.0A
+12V-0.5A
+3.3Vaux-375mA(wake)
+3.3Vaux-20mA(no wake)
+3.3V-3.0A
+3.3Vaux-375mA(wake)
+3.3Vaux-20mA(no wake)
+3.3V-7.6A
+5.0V-5.0A
+12V-0.5A
-12V-0.1A
+5V-4A(S0,S1)
+5V-345mA(S0,S1)
+3.3V-560mA
3VSB-
3VSB-
+3.3V
1394

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_TESTHI9
H_TESTHI11
VID2
H_TESTHI12
H_TESTHI10
VID0
VID5
H_TDO
H_BPM#4
H_BPM#5
H_TDI
H_TRST#
H_TMS
VTT_OUT_RIGHT
VID6
VID7
VID1
H_TCK
H_BPM#1
H_BPM#0
H_BPM#2
H_BPM#3
VID3
VTT_OUT_RIGHT
VTT_OUT_LEFT
VID4
VTT_OUT_LEFT
H_D#55
H_D#57
H_D#63
H_D#62
H_D#59
H_D#60
H_D#61
H_D#56
H_D#58
H_D#54
H_D#45 H_D#44 H_D#43 H_D#42 H_D#41 H_D#40 H_D#39 H_D#38 H_D#37
H_D#0
H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#53 H_D#52 H_D#51 H_D#50 H_D#49 H_D#48 H_D#47 H_D#46
VID2 VID3 VID1 VID4 VID0 VID5 VID7 VID6
GNDHM
VTIN1
H_TDO
H_TDI
H_TRST#
H_TMS
PECI
H_TEST
H_IGNNE#
H_PROCHOT#
H_TRMTRIP#
ICH_H_SMI#
H_A20M#
H_BPM#1
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_TCK
TEST-J17
TEST-H16
TEST-J16
TEST-H15
CPU_GTLREF0
CPU_GTLREF1
CPU_GTLREF0
VTT_OUT_RIGHT
CPU_GTLREF1
VTT_OUT_RIGHT
V_FSB_VTT
VTT_OUT_LEFT
H_TESTHI2_7
RSVD_G6
FORCEPH
H_TESTHI1
H_TESTHI0
H_COMP1
H_COMP2
H_COMP3
H_COMP4
H_COMP5
H_BPM#2H_TESTHI9
H_TESTHI8
H_TESTHI11
H_TESTHI10
H_TESTHI12
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_BPM#3
H_REQ#2
H_REQ#4
H_REQ#1
H_REQ#3
H_REQ#0
H_BPM#1
H_BPM#5
H_BPM#3
H_BPM#2
H_BPM#4
H_BPM#0
H_A#31 H_A#28 H_A#29 H_A#30 H_A#27 H_A#24 H_A#25 H_A#26 H_A#22 H_A#21 H_A#23 H_A#18 H_A#17 H_A#20 H_A#19 H_A#16 H_A#15 H_A#11 H_A#12 H_A#13 H_A#14 H_A#9
H_A#8 H_A#10 H_A#5 H_A#6 H_A#7 H_A#3 H_A#4
VTT_OUT_RIGHT
H_TESTHI13
H_TESTHI1
H_TESTHI8
H_TESTHI13
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
VCC_SENSE
VSS_SENSE
H_A#32 H_A#33 H_A#34 H_A#35
VTT_OUT_LEFT
H_TEST VTT_OUT_LEFT
H_COMP0
V_FSB_VTT
V_FSB_VTT
H_D#[0..63]8
VID[0..7] 30
VCC_SENSE 30
VSS_SENSE 30
VTIN116 GNDHM16
H_PWRGD6,12
H_CPURST#6,8
H_IERR#6
H_FERR#12 H_STPCLK#12
H_DBSY#8 H_DRDY#8
H_INIT#12
H_BPRI#8
H_TRDY#8
H_ADS#8
H_BNR#8
H_HITM#8 H_HIT#8
H_LOCK#8
H_DEFER#8
CPU_BSEL115,16 CPU_BSEL215,16
CPU_BSEL015,16
PECI16
H_TRMTRIP#12
H_A20M#12
H_PROCHOT#6
ICH_H_SMI#12 H_IGNNE#12
H_DBI#[0..3]8
H_CPUSLP#12
CPU_GTLREF0 6
H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBP#1 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBN#1 8
H_DSTBN#2 8
H_DSTBN#0 8
H_NMI 12
H_INTR 12
CPU_GTLREF1 6
VID_SEL 30
VTT_OUT_LEFT 6
H_BPM#0 7
H_BR#0 6,8
H_RS#[0..2] 8
H_TESTHI12 7
H_REQ#[0..4] 8
CK_H_CPU 15
CK_H_CPU# 15
VTT_OUT_RIGHT 6,7
H_A#[3..35]8
CPU_BSEL215,16
CPU_BSEL015,16 CPU_BSEL115,16 Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
533
Custom
LGA775 - Signal
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
533
Custom
LGA775 - Signal
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
533
Custom
LGA775 - Signal
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
CPU SIGNAL BLOCK PULL HIGHT PULL DOWN
Kentsfield
Kentsfield
Kentsfield
R70 X_130R1%0402R70 X_130R1%0402
R108 X_51R0402R108 X_51R0402
RN7
8P4R-51R0402
RN7
8P4R-51R0402
1
3
5
7
2
4
6
8
R81
X_1KR0402
R81
X_1KR0402
RN4
8P4R-680R0402-RH
RN4
8P4R-680R0402-RH
1
3
5
7
2
4
6
8
T10T10
R102 X_R/2R102 X_R/2
R77 X_51R0402R77 X_51R0402
R107 X_0R0402R107 X_0R0402
T6T6
RN6
8P4R-51R0402
RN6
8P4R-51R0402
1
3
5
7
2
4
6
8
R129 51R0402R129 51R0402
T7T7
RN26
8P4R-470R0402
RN26
8P4R-470R0402
1 3 5 7
2 4 6 8
C63
X_C0.1u16Y0402
C63
X_C0.1u16Y0402
T12T12
R128 51R0402R128 51R0402
T3T3
RN3
8P4R-680R0402-RH
RN3
8P4R-680R0402-RH
1
3
5
7
2
4
6
8
R92 X_49.9R1%0402R92 X_49.9R1%0402
R72 X_0R0402R72 X_0R0402
R134 49.9R1%0402R134 49.9R1%0402
T5T5
CPU1A
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
CPU1A
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
A35# AJ6 A34# AJ5 A33# AH5 A32# AH4 A31# AG5 A30# AG4 A29# AG6 A28# AF4 A27# AF5 A26# AB4 A25# AC5 A24# AB5 A23# AA5 A22# AD6 A21# AA4 A20# Y4 A19# Y6 A18# W6 A17# AB6 A16# W5 A15# V4 A14# V5 A13# U4 A12# U5 A11# T4 A10# U6
A9# T5 A8# R4 A7# M4 A6# L4 A5# M5 A4# P6 A3# L5
DBR# AC2
VCC_SENSE AN3
VSS_SENSE AN4
VCC_MB_REGULATION AN5
VSS_MB_REGULATION AN6
ITP_CLK1 AJ3 ITP_CLK0 AK3
VID6 AM5 VID5 AL4 VID4 AK4 VID3 AL6 VID2 AM3 VID1 AL5 VID0 AM2
D53#
B15 D52#
C14 D51# C15 D50#
A14 D49#
D17 D48# D20 D47#
G22 D46#
D22 D45#
E22 D44#
G21 D43#
F21 D42#
E21 D41#
F20 D40#
E19 D39# E18 D38#
F18 D37# F17 D36#
G17 D35# G18 D34#
E16 D33# E15 D32#
G16 D31# G15 D30#
F15 D29#
G14 D28#
F14 D27#
G13 D26#
E13 D25#
D13 D24#
F12 D23# F11 D22#
D10 D21#
E10 D20#
D7 D19#
E9 D18#
F9 D17# F8 D16#
G9 D15#
D11 D14# C12 D13#
B12 D12#
D8 D11#
C11 D10#
B10 D9# A11 D8# A10 D7#
A7 D6# B7 D5# B6 D4# A5 D3#
C6 D2#
A4 D1#
C5 D0#
B4
GTLREF0 H1
BPM5# AG3
BPM4# AF2
BPM3# AG2
BPM2# AD2
BPM1# AJ1
BPM0# AJ2
PECI
G5
REQ4# J6
REQ3# K6
REQ2# M6
REQ1# J5
REQ0# K4
TESTHI12 W2
TESTHI11 P1
TESTHI10 H5
TESTHI9 G4
TESTHI8 G3
TESTHI7 F24
TESTHI6 G24
TESTHI5 G26
TESTHI4 G27
TESTHI3 G25
TESTHI2 F25
TESTHI1 W3
TESTHI0 F26
FORCEPH AK6
RSVD#G6 G6
BCLK1# G28
BCLK0# F28
RS2# A3
RS1# F5
RS0# B3
AP1# U3
AP0# U2
BR0# F3
COMP3 R1
COMP2 G2
COMP1 T1
COMP0 A13
DP3# J17
DP2# H16
DP1# H15
DP0# J16
ADSTB1# AD5
ADSTB0# R6
DSTBP3# C17
DSTBP2# G19
DSTBP1# E12
DSTBP0# B9
DSTBN3# A16
DSTBN2# G20
DSTBN1# G12
DSTBN0# C8
LINT1/NMI L1
LINT0/INTR K1
DBI0#
A8 DBI1#
G11 DBI2#
D19 DBI3#
C20
FC5/CPU_GTLREF2 F2
IERR#
AB2 MCERR#
AB3 FERR#/PBE#
R3 STPCLK#
M3 BINIT#
AD3 INIT#
P3 RSP#
H4
DBSY#
B2 DRDY#
C1 TRDY#
E3
ADS#
D2 LOCK#
C3 BNR#
C2 HIT#
D4 HITM#
E4 BPRI#
G8 DEFER#
G7
TDI
AD1 TDO
AF1 TMS
AC1 TRST#
AG1 TCK
AE1
THERMDA
AL1 THERMDC
AK1 THERMTRIP#
M2 GND/SKTOCC#
AE8 PROCHOT#
AL2 IGNNE#
N2 SMI#
P2 A20M#
K3 TESTI_13
L2
RSVD#AH2
AH2 RESERVED0
N5 RESERVED1
AE6 RESERVED2
C9
RSVD/CPU_GTLREF3 G10
RESERVED4
D16 RESERVED5
A20
BOOTSELECT
Y1 LL_ID0
V2 LL_ID1
AA2
BSEL0
G29 BSEL1
H30 BSEL2
G30
PWRGOOD
N1
RESET#
G23
D63#
B22 D62#
A22 D61#
A19 D60#
B19 D59#
B21 D58#
C21 D57#
B18 D56#
A17 D55#
B16 D54#
C18
RSVD/VID7 AM7
GTLREF1 H2
VID_SELECT AN7
GTLREF_SEL H29
COMP4 J2
COMP5 T2
GTLREF2 E24
R99 X_0R0402R99 X_0R0402
R105 X_51R0402R105 X_51R0402
R96 X_49.9R1%0402R96 X_49.9R1%0402
T2T2
RN5
8P4R-51R0402
RN5
8P4R-51R0402
1
3
5
7
2
4
6
8
C61
C0.1u16Y0402
C61
C0.1u16Y0402
RN11 8P4R-51R0402RN11 8P4R-51R0402
1
3
5
7
2
4
6
8
RN9 8P4R-49.9R1%-1RN9 8P4R-49.9R1%-1
1
3
5
7
2
4
6
8
R66
1KR1%0402
R66
1KR1%0402
RN10 8P4R-51R0402RN10 8P4R-51R0402
1
3
5
7
2
4
6
8
T4T4

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_PWG
H_VCCPLL
H_VCCA
H_VSSA
H_VCCA
V_FSB_VTT
VTT_SEL
VTT_OUT_RIGHT
VTT_OUT_RIGHT
GTL_REF0
GTL_REF1
H_VCCA
H_VSSA
H_VCCPLL
H_CPURST#
VTT_OUT_LEFT
H_IERR#
VTT_OUT_RIGHT H_PROCHOT#
H_PWRGD
H_BR#0
VTT_OUT_RIGHT
VTT_PWG
VCCP
VCCP
VCCP
V_FSB_VTT
V_FSB_VTT V_1P5_CORE
VTT_SEL 28
CPU_GTLREF0 5
CPU_GTLREF1 5
H_CPURST# 5,8
H_IERR# 5
H_PROCHOT# 5
H_PWRGD 5,12
H_BR#0 5,8
VTT_OUT_RIGHT5,7
VTT_OUT_LEFT5
VID_GD#28,30
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
633
Custom
LGA775 - Power
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
633
Custom
LGA775 - Power
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
633
Custom
LGA775 - Power
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
CAPS FOR FSB GENERIC
*GTLREF VOLTAGE SHOULD BE 0.67 * VTT = 0.8V (At VTT=1.2V)
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
PLACE AT CPU END OF ROUTE
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
VTT_PWRGOOD
R91 X_100R0402R91 X_100R0402
R73
680R0402-RH
R73
680R0402-RH
R98
10R1%0402
R98
10R1%0402 CP2CP2 C105
C10u10Y0805
C105
C10u10Y0805
C68
X_C220p50N0402
C68
X_C220p50N0402
Q12
N-MMBT3904_NL_SOT23
Q12
N-MMBT3904_NL_SOT23
B
CE
C124
X_C10u10Y0805
C124
X_C10u10Y0805
CPU1B
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
CPU1B
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
RSVD#F29 F29
VCC AH27 VCC AH26 VCC AH25 VCC AH22 VCC AH21 VCC AH19 VCC AH18 VCC AH15 VCC AH14 VCC AH12 VCC AH11 VCC AG9 VCC AG8 VCC AG30 VCC AG29 VCC AG28 VCC AG27 VCC AG26 VCC AG25 VCC AG22 VCC AG21 VCC AG19 VCC AG18 VCC AG15 VCC AG14 VCC AG12 VCC AG11 VCC AF9 VCC AF8 VCC AF22 VCC AF21
VCC
AF19 VCC
AF18 VCC
AF15 VCC
AF14 VCC
AF12 VCC
AF11 VCC
AE9 VCC
AE23 VCC
AE22 VCC
AE21 VCC
AE19 VCC
AE18 VCC
AE15 VCC
AE14 VCC
AE12 VCC
AE11 VCC
AD8 VCC
AD30 VCC
AD29 VCC
AD28 VCC
AD27 VCC
AD26 VCC
AD25 VCC
AD24 VCC
AD23 VCC
AC8 VCC
AC30 VCC
AC29 VCC
AC28 VCC
AC27 VCC
AC26 VCC
AC25 VCC
AC24 VCC
AC23 VCC
AB8 VCC
AA8
VCC AH28 VCC AH29 VCC AH30 VCC AH8 VCC AH9 VCC AJ11 VCC AJ12 VCC AJ14 VCC AJ15 VCC AJ18 VCC AJ19 VCC AJ21 VCC AJ22 VCC AJ25 VCC AJ26 VCC AJ8 VCC AJ9 VCC AK11 VCC AK12 VCC AK14 VCC AK15 VCC AK18 VCC AK19 VCC AK21 VCC AK22 VCC AK25 VCC AK26 VCC AK8 VCC AK9 VCC AL11 VCC AL12 VCC AL14 VCC AL15 VCC AL18 VCC AL19 VCC AL21 VCC AL22 VCC AL25 VCC AL26 VCC AL29 VCC AL30 VCC AL8 VCC AL9 VCC AM11 VCC AM12 VCC AM14 VCC AM15 VCC AM18 VCC AM19 VCC AM21 VCC AM22 VCC AM25 VCC AM26 VCC AM29 VCC AM30 VCC AM8 VCC AM9 VCC AN11 VCC AN12 VCC AN14 VCC AN15 VCC AN18 VCC AN19 VCC AN21 VCC AN22
VCC
AN25 VCC AN26 VCC AN29 VCC AN30 VCC
AN8 VCC AN9 VCC
J10 VCC J11 VCC J12 VCC J13 VCC J14 VCC J15 VCC J18 VCC J19 VCC J20 VCC J21 VCC J22 VCC J23 VCC J24 VCC J25 VCC J26 VCC J27 VCC J28 VCC J29 VCC J30 VCC
J8 VCC J9 VCC
K23 VCC K24 VCC K25 VCC K26 VCC K27 VCC K28 VCC K29 VCC K30 VCC
K8 VCC
L8 VCC
M23 VCC M24 VCC M25 VCC M26 VCC M27 VCC M28 VCC M29 VCC M30 VCC
M8 VCC
N23 VCC N24 VCC N25 VCC N26 VCC N27 VCC N28 VCC N29 VCC N30 VCC
N8 VCC
P8 VCC
R8 VCC
T23 VCC T24 VCC T25 VCC T26 VCC T27 VCC T28 VCC T29 VCC T30 VCC
T8 VCC
U23 VCC U24 VCC U25 VCC U26 VCC U27 VCC U28 VCC U29 VCC U30 VCC
U8 VCC
V8 VCC
W23 VCC W24 VCC W25 VCC W26 VCC W27 VCC W28 VCC W29 VCC W30 VCC
W8 VCC
Y23 VCC Y24 VCC Y25 VCC Y26 VCC Y27 VCC Y28 VCC Y29 VCC Y30 VCC
Y8
VCCPLL D23
VTT A25
VTT A26
VTT A27
VTT A28
VTT A29
VTT A30
VTT B25
VTT B26
VTT B27
VTT B28
VTT B29
VTT B30
VTT C25
VTT C26
VTT C27
VTT C28
VTT C29
VTT C30
VTT D25
VTT D26
VTT D27
VTT D28
VTT D29
VTT D30
VTTPWRGD AM6
VTT_OUT_RIGHT AA1
VTT_OUT_LEFT J1
VTT_SEL F27
VCCA A23
VSSA B23
VCC-IOPLL C23
C58
X_C220p50N0402
C58
X_C220p50N0402
C120
X_C1u16Y
C120
X_C1u16Y
R78 1KR0402R78 1KR0402
R97
200R1%0402
R97
200R1%0402
C102
C1u16Y
C102
C1u16Y
R89 62R0402R89 62R0402
C57
C1u16Y
C57
C1u16Y
R90
10R1%0402
R90
10R1%0402
R88
200R1%0402
R88
200R1%0402
C66
C1u16Y
C66
C1u16Y
R103 62R0402R103 62R0402
L3 X_10u100mA_0805-RHL3 X_10u100mA_0805-RH
21
R87
115R1%0402-RH
R87
115R1%0402-RH
R83 130R1%0402R83 130R1%0402
CP3CP3
C126 C10u10Y0805 C126 C10u10Y0805
C112
X_C10u10Y0805
C112
X_C10u10Y0805
R93
115R1%0402-RH
R93
115R1%0402-RH
C123 X_C10u10Y0805 C123 X_C10u10Y0805
R106 62R0402R106 62R0402

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_COMP8
H_COMP6
H_COMP7
H_BPM#0
TP_MPG_NOBOOT_N
H_TESTHI12
VCCP
VCCP
VTT_OUT_RIGHT 5,6
H_BPM#0 5
H_TESTHI12 5
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
733
Custom
LGA775 - GND
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
733
Custom
LGA775 - GND
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
733
Custom
LGA775 - GND
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
MLCC (Place into CPU Socket Cavity)
0
0
0
1
05 Per FMB
05 Value FMB
MSID1 MSID0
Kentsfield
1497
1477
1505
C85
C10U6.3Y1206
C85
C10U6.3Y1206
T11T11
CPU1C
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
CPU1C
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
VSS
A12 VSS
A15 VSS
A18 VSS
A2 VSS
A21
FC23 A24
VSS
A6 VSS
A9 VSS
AA23 VSS
AA24 VSS
AA25 VSS
AA26 VSS
AA27 VSS
AA28 VSS
AA29 VSS
AA3 VSS
AA30 VSS
AA6 VSS
AA7 VSS
AB1 VSS
AB23 VSS
AB24 VSS
AB25 VSS
AB26 VSS
AB27 VSS
AB28 VSS
AB29 VSS
AB30 VSS
AB7 VSS
AC3 VSS
AC6 VSS
AC7 VSS
AD4 VSS
AD7 VSS
AE10 VSS
AE13 VSS
AE16 VSS
AE17 VSS
AE2 VSS
AE20 VSS
AE24 VSS
AE25 VSS
AE26 VSS
AE27 VSS
AE28 VSS
AE29 VSS
AE30 VSS
AE5 VSS
AE7 VSS
AF10 VSS
AF13 VSS
AF16 VSS
AF17 VSS
AF20 VSS
AF23 VSS
AF24 VSS
AF25 VSS
AF26 VSS
AF27 VSS
AF28 VSS
AF29 VSS
AF3 VSS
AF30 VSS
AF6 VSS
AF7
VSS
AG10 VSS AG13 VSS AG16 VSS AG17 VSS AG20 VSS AG23 VSS AG24 VSS
AG7 VSS
AH1 VSS
AH10 VSS AH13 VSS AH16 VSS AH17 VSS AH20 VSS AH23 VSS AH24 VSS
AH3 VSS AH6 VSS AH7 VSS
AJ10 VSS AJ13 VSS AJ16 VSS AJ17 VSS AJ20 VSS AJ23 VSS AJ24 VSS AJ27 VSS AJ28 VSS AJ29 VSS AJ30 VSS
AJ4 VSS AJ7 VSS
AK10 VSS AK13 VSS AK16 VSS AK17 VSS
AK2 VSS
AK20 VSS AK23 VSS AK24 VSS AK27 VSS AK28 VSS AK29 VSS AK30 VSS
AK5 VSS AK7 VSS
AL10 VSS AL13 VSS AL16 VSS AL17 VSS AL20 VSS AL23 VSS AL24 VSS AL27 VSS AL28
RSVD AL3
VSS
AL7 VSS
AM1 VSS
AM10 VSS AM13 VSS AM16 VSS AM17 VSS AM20 VSS AM23 VSS AM24 VSS AM27 VSS AM28 VSS
AM4 VSS
AN1 VSS
AN10 VSS AN13 VSS AN16 VSS AN17 VSS
AN2 VSS
AN20 VSS AN23 VSS AN24 VSS AN27 VSS AN28 VSS
B1 VSS
B11 VSS B14 VSS B17 VSS B20 VSS B24
VSS B5
VSS B8
VSS C10
VSS C13
VSS C16
VSS C19
VSS C22
VSS C24
VSS C4
VSS C7
VSS D12
VSS D15
VSS D18
VSS D21
VSS D24
VSS D3
VSS D5
VSS D6
VSS D9
VSS E11
VSS E14
VSS E17
VSS E2
VSS E20
VSS E25
VSS E26
VSS E27
VSS E28
FC26 E29
VSS E8
VSS F10
VSS F13
VSS F16
VSS F19
VSS F22
VSS F4
VSS F7
FC27 G1
VSS H10 VSS H11 VSS H12 VSS H13 VSS H14 VSS H17 VSS H18 VSS H19 VSS H20 VSS H21 VSS H22 VSS H23 VSS H24 VSS H25 VSS H26 VSS H27 VSS H28 VSS H3 VSS H6 VSS H7 VSS H8 VSS H9 VSS J4 VSS J7 VSS K2
COMP6 Y3
COMP7 AE3
RSVD#AE4 AE4
RSVD#D1 D1
RSVD#D14 D14
RSVD#E23 E23
RSVD#E5 E5
RSVD#E6 E6
RSVD#E7 E7
RSVD#F23 F23
IMPSEL# F6
RSVD/COMP8 B13
RSVD#J3 J3
RSVD#N4 N4
RSVD#P5 P5
MSID1 V1
MSID0 W1
RSVD#AC4 AC4
VSS Y7 VSS Y5 VSS Y2 VSS W7 VSS W4 VSS V7 VSS V6 VSS V30 VSS V3 VSS V29 VSS V28 VSS V27 VSS V26 VSS V25 VSS V24 VSS V23 VSS U7
FC28 U1
VSS T7 VSS T6 VSS T3 VSS R7 VSS R5 VSS R30 VSS R29 VSS R28 VSS R27 VSS R26 VSS R25 VSS R24 VSS R23 VSS R2 VSS P7 VSS P4 VSS P30 VSS P29 VSS P28 VSS P27 VSS P26 VSS P25 VSS P24 VSS P23 VSS N7 VSS N6 VSS N3 VSS M7 VSS M1 VSS L7 VSS L6 VSS L30 VSS L3 VSS L29 VSS L28 VSS L27 VSS L26 VSS L25 VSS L24 VSS L23 VSS K7 VSS K5
1
12 23 34 4
C74
X_C10U6.3Y1206
C74
X_C10U6.3Y1206
T9T9
R84 X_49.9R1%0402R84 X_49.9R1%0402
R122 X_0R0402R122 X_0R0402
C84
C10U6.3Y1206
C84
C10U6.3Y1206
T8T8
C83
X_C10U6.3Y1206
C83
X_C10U6.3Y1206
C80
C10U6.3Y1206
C80
C10U6.3Y1206
R123 X_1KR0402R123 X_1KR0402
C75
C10U6.3Y1206
C75
C10U6.3Y1206
R85 X_49.9R1%0402R85 X_49.9R1%0402
R132 24.9R1%0402R132 24.9R1%0402
C73
X_C10U6.3Y1206
C73
X_C10U6.3Y1206
T1T1
C76
C10U6.3Y1206
C76
C10U6.3Y1206
C81
C10U6.3Y1206
C81
C10U6.3Y1206
RN8 8P4R-51R0402RN8 8P4R-51R0402
1
3
5
7
2
4
6
8
C71
C10U6.3Y1206
C71
C10U6.3Y1206
C82
X_C10U6.3Y1206
C82
X_C10U6.3Y1206
C72
C10U6.3Y1206
C72
C10U6.3Y1206

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HXSCOMPB
HXSCOMP
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
HXSWING MCH_GTLREF
ICH_SYNC#_R
MCH_GTLREF
PLTRST#
H_A#27
H_A#28
H_RS#1
H_RS#0
H_A#29
H_A#30
H_A#31
HXRCOMP
HXSCOMP
HXSWING
HXSCOMPB
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#2
H_A#6
H_A#4
H_A#5
H_A#3
H_A#8
H_A#12
H_A#13
H_A#7
H_A#10
H_A#11
H_A#9
H_REQ#1
H_REQ#4
H_REQ#3
H_REQ#0
H_REQ#[0..4]
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_RS#2
H_A#26
H_A#[3..35]
H_RS#[0..2]
H_DBI#[0..3]
H_D#[0..63]
V_FSB_VTT
V_1P25_CORE
V_FSB_VTT
V_FSB_VTT
VCC3
V_1P25_COREV_FSB_VTT
V_FSB_VTT
V_FSB_VTT
H_DSTBP#0 5
H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBN#2 5
H_DSTBN#3 5
H_DSTBP#3 5
H_REQ#[0..4]5
H_A#[3..35]5
H_RS#[0..2]5
CK_H_MCH#15 CK_H_MCH15
CHIP_PWGD10,13,28 H_CPURST#5,6
PLTRST#10,12,16
H_ADS#5
H_ADSTB#05 H_ADSTB#15
H_LOCK#5 H_BR#05,6
H_BPRI#5 H_BNR#5
H_HITM#5 H_HIT#5
H_DEFER#5
H_TRDY#5
H_DBSY#5
H_DRDY#5
ICH_SYNC#13
H_DBI#[0..3]5
H_D#[0..63]5
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
833
Custom
G31 - CPU Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
833
Custom
G31 - CPU Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
833
Custom
G31 - CPU Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
HXSWING S/B 1/4*VTT +/- 2%
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.804V
Place the Pull-up R close to ICH7
R175 16.5R/1%/2 R175 16.5R/1%/2
C146
C0.1U/16Y/2
C146
C0.1U/16Y/2
C166
C0.1U/16Y/2
C166
C0.1U/16Y/2 C151 X_C0.1U/16Y/2
C151
X_C0.1U/16Y/2
R167 49.9R1%0402R167 49.9R1%0402 R166 100R/2R166 100R/2
NB1A
INTEL-LE82G31-A2-RH
NB1A
INTEL-LE82G31-A2-RH
HD0# R40
HD1# P41
HD2# R41
HD3# N40
HD4# R42
HD5# M39
HD6# N41
HD7# N42
HD8# L41
HD9# J39
HD10# L42
HD11# J41
HD12# K41
HD13# G40
HD14# F41
HD15# F42
HD16# C42
HD17# D41
HD18# F38
HD19# G37
HD20# E42
HD21# E39
HD22# E37
HD23# C39
HD24# B39
HD25# G33
HD26# A37
HD27# F33
HD28# E35
HD29# K32
HD30# H32
HD31# B34
HD32# J31
HD33# F32
HD34# M31
HD35# E31
HD36# K31
HD37# G31
HD38# K29
HD39# F31
HD40# J29
HD41# F29
HD42# L27
HD43# K27
HD44# H26
HD45# L26
HD46# J26
HD47# M26
HD48# C33
HD49# C35
HD50# E41
HD51# B41
HD52# D42
HD53# C40
HD54# D35
HD55# B40
HD56# C38
HD57# D37
HD58# B33
HD59# D33
HD60# C34
HD61# B35
HD62# A32
HD63# D32
HDINV0# M40
HDINV1# J33
HDINV2# G29
HDINV3# E33
HDSTBP0# L40
HDSTBN0# M43
HDSTBP1# G35
HDSTBN1# H33
HDSTBP2# G27
HDSTBN2# H27
HDSTBP3# B38
HDSTBN3# D38
VCC
AJ12 VCC AJ11 VCC AJ10 VCC
AJ9 VCC AJ8 VCC AJ7 VCC AJ6 VCC AJ5 VCC AJ4 VCC AJ3 VCC AJ2 VCC
AH4 VCC AH2 VCC AH1 VCC
AG13 VCC AG12 VCC AG11 VCC AG10 VCC
AG9 VCC AG8 VCC AG7 VCC AG6 VCC AG5 VCC AG4 VCC AG3 VCC AG2 VCC
AF13 VCC AF12 VCC AF11 VCC
AD24 VCC AD22 VCC AD20 VCC AC25 VCC AC23 VCC AC21 VCC AC19 VCC AC13 VCC
AC6 VCC
AB24 VCC AB22 VCC AB20 VCC AA25 VCC AA23 VCC AA21 VCC AA19 VCC AA13 VCC
AA3 VCC
Y24 VCC Y22 VCC Y20 VCC Y13 VCC
Y6 VCC
V13 VCC V12 VCC V10 VCC
V9 VCC
U13 VCC U10 VCC
U9 VCC U6 VCC U3 VCC
N12 VCC N11 VCC
N9 VCC N8 VCC N6 VCC N3 VCC
L6 VCC
J6 VCC J3 VCC J2 VCC
G2 VCC
F11 VCC
F9 VCC
D4 VCC
C13 VCC
C9 VCC
P20 VCC Y11 VCC
AG25 VCC AG21 VCC AG20
VTT P29 VTT P27 VTT P26 VTT P24 VTT P23 VTT N29 VTT N26 VTT N24 VTT N23 VTT M29 VTT M24 VTT M23 VTT L24 VTT L23 VTT K24 VTT K23 VTT J24 VTT J23 VTT H24 VTT H23 VTT G26 VTT G24 VTT G23 VTT F26 VTT F24 VTT F23 VTT E29 VTT E27 VTT E26 VTT E23 VTT D29 VTT D28 VTT D27 VTT C30 VTT C29 VTT C27 VTT B30 VTT B29 VTT B28 VTT B27 VTT A30 VTT A28 VTT R27 VTT R26 VTT R24 VTT R23
VCC AG19 VCC AG18 VCC AG17 VCC AG15 VCC AG14 VCC AF26 VCC AF25 VCC AF24 VCC AF22 VCC AF20 VCC AF18 VCC AF17 VCC AF15 VCC AF14 VCC AE27 VCC AE26 VCC AE25 VCC AE23 VCC AE21 VCC AE19 VCC AE17 VCC AD27 VCC AD26 VCC AD18 VCC AD17 VCC AD15 VCC AD14 VCC AC27 VCC AC26 VCC AC17 VCC AC15 VCC AC14 VCC AB27 VCC AB26 VCC AB18 VCC AB17 VCC AA27 VCC AA26
HA3#
J42 HA4#
L39 HA5#
J40 HA6#
L37 HA7#
L36 HA8#
K42 HA9#
N32 HA10#
N34 HA11#
M38 HA12#
N37 HA13#
M36 HA14#
R34 HA15#
N35 HA16#
N38 HA17#
U37 HA18#
N39 HA19#
R37 HA20#
P42 HA21#
R39 HA22#
V36 HA23#
R38 HA24#
U36 HA25#
U33 HA26#
R35 HA27#
V33 HA28#
V35 HA29#
Y34 HA30#
V42 HA31#
V38 HA32#
Y36 HA33#
Y38 HA34#
Y39 HA35#
AA37
HADSTB0#
M34 HADSTB1#
U34
HREQ0#
F40 HREQ1#
L35 HREQ2#
L38 HREQ3#
G43 HREQ4#
J37
HADS#
W40 HTRDY#
Y40 HDRDY#
W41 HDEFER#
T43 HHITM#
Y43 HHIT#
U42 HLOCK#
V41 HBREQ0#
AA42 HBNR#
W42 HBPRI#
G39 HDBSY#
U40
HRS0#
U41 HRS1#
AA41 HRS2#
U39
HCLKP
R32 HCLKN
U32
PWROK
AM17 HCPURST#
C31
RSTIN#
AM18 ICH_SYNC#
J13
HRCOMP
D23 HSCOMP
C25 HSCOMP#
D25 HSWING
B25
HDVREF
D24 HACCVREF
B24
C162
X_C2.7P/25N/2
C162
X_C2.7P/25N/2
C165
X_C220P16X0402
C165
X_C220P16X0402
R157
100R/2
R157
100R/2 R168
200R1%0402
R168
200R1%0402
R281 0R0402R281 0R0402
R170 51R0402R170 51R0402
R159 49.9R1%0402R159 49.9R1%0402
R156
301R1%0402
R156
301R1%0402
C271 X_C22P50N0402 C271 X_C22P50N0402
R163 49.9R1%0402R163 49.9R1%0402
R283 X_1KR0402 R283 X_1KR0402
C158
C0.01U/25X/2
C158
C0.01U/25X/2
C154
X_C2.7P/25N/2
C154
X_C2.7P/25N/2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MEM_MB0_CS_L[0..1]
MEM_MA_ADD[0..14]
MEM_MA0_ODT1
MEM_MB_CKE0
DDR_RCOMPVOL
MEM_MB_DATA[0..63] MEM_MA_DM[0..7]
MEM_MA0_CLK_H1
MEM_MA0_CLK_L0
MEM_MA0_CLK_L1
MEM_MA0_CLK_L2
MEM_MA0_CLK_H2
MEM_MB_DM3 MEM_MB_DM1 MEM_MB_DM0
MEM_MB_ADD9
MEM_MA0_CLK_H0
MEM_MA_DQS_H0
MEM_MB_DM7 MEM_MB_DM5 MEM_MB_DM2 MEM_MB_DM6 MEM_MB_DM4
MEM_MA_DQS_L0
MEM_MA_DQS_L1
MEM_MA_DQS_H3
MEM_MA_DQS_H1
MCH_VREF_A
MEM_MA_DQS_H7
MEM_MA_DQS_L2
MEM_MA_DQS_H4
MEM_MA_DQS_H2
MEM_MA_DQS_L3
MEM_MA_DQS_L5
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_L7
MEM_MA_ADD14
MEM_MA0_ODT0
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MB_DATA3 MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA10 MEM_MB_DATA4 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA2 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA11 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA23 MEM_MB_DATA27 MEM_MB_DATA29 MEM_MB_DATA20 MEM_MB_DATA17 MEM_MB_DATA21 MEM_MB_DATA26 MEM_MB_DATA34 MEM_MB_DATA30 MEM_MB_DATA25 MEM_MB_DATA22 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA28 MEM_MB_DATA24 MEM_MB_DATA35 MEM_MB_DATA47 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA33 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA36 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA55 MEM_MB_DATA52 MEM_MB_DATA44 MEM_MB_DATA57 MEM_MB_DATA62 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA39 MEM_MB_DATA56 MEM_MB_DATA63
MEM_MA_DM2 MEM_MA_DM1
MEM_MA_CKE1
MEM_MB_DATA58 MEM_MB_DATA61
MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM0
SRCOMP2
MEM_MA0_CS_L1
SRCOMP1
MEM_MA0_CS_L0
SRCOMP0
MEM_MA_DM7
MEM_MB_CKE1
SRCOMP3
MEM_MA_WE_L
MEM_MA_ADD0
MEM_MB_DQS_H0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB_DQS_L0
MEM_MA_ADD1
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MB_DQS_L1
MEM_MB_DQS_H1
MEM_MB_DQS_L2
MEM_MB_DQS_H4
MEM_MB_DQS_H2
MEM_MB_DQS_H7
MEM_MB_DQS_L5
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L3
MEM_MB_DQS_H3
MEM_MA_ADD3
MEM_MB_BANK1
MEM_MB_DQS_L6
MEM_MB_DQS_H6
MEM_MB_DQS_L7
MEM_MA_ADD12
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD2
MEM_MA_ADD11
MEM_MA_ADD7
MEM_MA_ADD10
MEM_MA_ADD6
MEM_MA_ADD13
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_BANK0
MEM_MB_ADD14
MEM_MB_BANK2
MEM_MB_ADD10
MEM_MB_ADD12
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD0
MEM_MB_ADD7
MEM_MB_ADD11
MEM_MB_ADD6
MEM_MB_ADD13
MEM_MB_ADD8
MEM_MA_DATA8 MEM_MA_DATA2 MEM_MA_DATA4 MEM_MA_DATA3
MEM_MB0_ODT0
MEM_MA_DATA0 MEM_MA_DATA5 MEM_MA_DATA7 MEM_MA_DATA1 MEM_MA_DATA6 MEM_MA_DATA9 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA10 MEM_MA_DATA12 MEM_MA_DATA11 MEM_MA_DATA25 MEM_MA_DATA18 MEM_MA_DATA22 MEM_MA_DATA16 MEM_MA_DATA21 MEM_MA_DATA19 MEM_MA_DATA28 MEM_MA_DATA17 MEM_MA_DATA20 MEM_MA_DATA27 MEM_MA_DATA15 MEM_MA_DATA29 MEM_MA_DATA26 MEM_MA_DATA23 MEM_MA_DATA36 MEM_MA_DATA24 MEM_MA_DATA38 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32 MEM_MA_DATA35 MEM_MA_DATA63 MEM_MA_DATA40 MEM_MA_DATA37 MEM_MA_DATA39 MEM_MA_DATA41 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA42 MEM_MA_DATA62 MEM_MA_DATA56 MEM_MA_DATA47 MEM_MA_DATA61 MEM_MA_DATA45 MEM_MA_DATA48 MEM_MA_DATA52 MEM_MA_DATA49 MEM_MA_DATA51 MEM_MA_DATA53 MEM_MA_DATA46 MEM_MA_DATA50 MEM_MA_DATA60 MEM_MA_DATA58 MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA59
MEM_MB0_CLK_H0
MEM_MA_CKE0
MEM_MB0_ODT1
MEM_MA_DATA57
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_L1
DDR_RCOMPVOH
MEM_MA_DATA[0..63]
MEM_MB_DM[0..7]
MEM_MB_ADD[0..14]
MEM_MA0_CS_L[0..1]
MEM_MB_DQS_L[0..7]
MEM_MB_DQS_H[0..7]MEM_MA_DQS_H0[0..7]
MEM_MA_DQS_L[0..7]
VCC_DDR
VCC_DDR
VCC_DDR
MEM_MB_CKE[0..1] 19,20
MEM_MA_BANK[0..2]18,20
MEM_MB0_CS_L[0..1] 19,20
MEM_MA_ADD[0..14]18,20 MEM_MB_ADD[0..14]19,20
MEM_MB_DATA[0..63]19 MEM_MA_DM[0..7]18
MEM_MA_CAS_L18,20 MEM_MA_RAS_L18,20 MEM_MB_CAS_L 19,20
MEM_MB_RAS_L 19,20
MEM_MA_WE_L18,20
MEM_MB0_CLK_H2 19
MEM_MB0_CLK_L1 19
MEM_MB_WE_L 19,20
MEM_MB0_CLK_H1 19
MEM_MB0_CLK_L0 19
MEM_MB0_CLK_H0 19
MEM_MB0_CLK_L2 19
MEM_MA0_CLK_H118 MEM_MA0_CLK_L018 MEM_MA0_CLK_H018
MEM_MA0_CLK_L218 MEM_MA0_CLK_H218 MEM_MA0_CLK_L118
MEM_MA_DATA[0..63]18
MEM_MB_DM[0..7]19
MEM_MB_BANK[0..2] 19,20
MEM_MA0_CS_L[0..1]18,20
MEM_MB0_ODT[0..1] 19,20
MEM_MB_DQS_L[0..7]19
MEM_MB_DQS_H[0..7]19
MEM_MA_CKE[0..1] 18,20
MEM_MA0_ODT[0..1]18,20
MEM_MA_DQS_L[0..7]18
MEM_MA_DQS_H[0..7]18
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
933
Custom
G31 - Memory Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
933
Custom
G31 - Memory Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
933
Custom
G31 - Memory Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
PLACE 0.1UF CAP CLOSE TO MCH
DDR_RCOMPVOL = 0.2 * VCC_DDR
DDR_RCOMPVOH = 0.8 * VCC_DDR
R211 20R1%0402R211 20R1%0402
C241 C0.1U16Y0402 C241 C0.1U16Y0402 C252 C0.01U25X0402 C252 C0.01U25X0402
C213 C0.1U16Y0402 C213 C0.1U16Y0402
NB1B
INTEL-LE82G31-A2-RH
NB1B
INTEL-LE82G31-A2-RH
SDQ_A0
AR5 SDQ_A1 AR4 SDQ_A2
AV3 SDQ_A3 AV2 SDQ_A4 AP3 SDQ_A5 AP2 SDQ_A6
AU1 SDQ_A7
AV4 SDQ_A8 AY2 SDQ_A9 AY3 SDQ_A10 BB5 SDQ_A11 AY6 SDQ_A12
AW2 SDQ_A13 AW3 SDQ_A14
BA5 SDQ_A15 BB4 SDQ_A16 AY7 SDQ_A17
BC7 SDQ_A18
AW11 SDQ_A19
AY11 SDQ_A20
BB6 SDQ_A21 BA6 SDQ_A22
BA10 SDQ_A23 BB10 SDQ_A24
AT18 SDQ_A25
AR18 SDQ_A26 AU21 SDQ_A27
AT21 SDQ_A28
AP17 SDQ_A29
AN17 SDQ_A30
AP20 SDQ_A31 AV20 SDQ_A32 AV42 SDQ_A33
AU40 SDQ_A34
AP42 SDQ_A35
AN39 SDQ_A36
AV40 SDQ_A37 AV41 SDQ_A38
AR42 SDQ_A39
AP41 SDQ_A40
AN41 SDQ_A41
AM39 SDQ_A42
AK42 SDQ_A43 AK41 SDQ_A44
AN40 SDQ_A45 AN42 SDQ_A46
AL42 SDQ_A47 AL39 SDQ_A48
AJ40 SDQ_A49
AH43 SDQ_A50
AF39 SDQ_A51
AE40 SDQ_A52
AJ42 SDQ_A53 AJ41 SDQ_A54
AF41 SDQ_A55 AF42 SDQ_A56
AD40 SDQ_A57 AD43 SDQ_A58
AB41 SDQ_A59 AA40 SDQ_A60 AE42 SDQ_A61 AE41 SDQ_A62
AC39 SDQ_A63
AB42
SCKE_A0
BC20 SCKE_A1
AY20 Reserved13 AY21 Reserved17 BA19
SDM_A0
AR2 SDM_A1
BA2 SDM_A2 AY9 SDM_A3
AN18 SDM_A4 AU43 SDM_A5
AM43 SDM_A6
AG40 SDM_A7
AC40
SDQ_B0 AN7 SDQ_B1 AN8 SDQ_B2 AW5 SDQ_B3 AW7 SDQ_B4 AN5 SDQ_B5 AN6 SDQ_B6 AN9 SDQ_B7 AU7 SDQ_B8 AT11 SDQ_B9 AU11
SDQ_B10 AP13 SDQ_B11 AR13 SDQ_B12 AR11 SDQ_B13 AU9 SDQ_B14 AV12 SDQ_B15 AU12 SDQ_B16 AU15 SDQ_B17 AV13 SDQ_B18 AU17 SDQ_B19 AT17 SDQ_B20 AU13 SDQ_B21 AM13 SDQ_B22 AV15 SDQ_B23 AW17 SDQ_B24 AV24 SDQ_B25 AT23 SDQ_B26 AT26 SDQ_B27 AP26 SDQ_B28 AU23 SDQ_B29 AW23 SDQ_B30 AR24 SDQ_B31 AN26 SDQ_B32 AW37 SDQ_B33 AV38 SDQ_B34 AN36 SDQ_B35 AN37 SDQ_B36 AU35 SDQ_B37 AR35 SDQ_B38 AN35 SDQ_B39 AR37 SDQ_B40 AM35 SDQ_B41 AM38 SDQ_B42 AJ34 SDQ_B43 AL38 SDQ_B44 AR39 SDQ_B45 AM34 SDQ_B46 AL37 SDQ_B47 AL32 SDQ_B48 AG38 SDQ_B49 AJ38 SDQ_B50 AF35 SDQ_B51 AF33 SDQ_B52 AJ37 SDQ_B53 AJ35 SDQ_B54 AG33 SDQ_B55 AF34 SDQ_B56 AD36 SDQ_B57 AC33 SDQ_B58 AA34 SDQ_B59 AA36 SDQ_B60 AD34 SDQ_B61 AF38 SDQ_B62 AC34 SDQ_B63 AA33 SCKE_B0 AY12 SCKE_B1 AW12
Reserved20 BB11 Reserved16 BA11
SDM_B0 AR7 SDM_B1 AW9 SDM_B2 AW13 SDM_B3 AP23 SDM_B4 AU37 SDM_B5 AM37 SDM_B6 AG39 SDM_B7 AD38
SCS_B0# BB27
SCS_B1# BB30
Reserved14 AY27
Reserved15 AY31
SRAS_B# AW26
SCAS_B# AW29
SWE_B# BA27
SMA_B0 BB17
SMA_B1 AY17
SMA_B2 BA17
SMA_B3 BC16
SMA_B4 AW15
SMA_B5 BA15
SMA_B6 BB15
SMA_B7 BA14
SMA_B8 AY15
SMA_B9 BB14
SMA_B10 AW18
SMA_B11 BB13
SMA_B12 BA13
SMA_B13 AY29
SMA_B14 AY13
SODT_B0 BA29
SODT_B1 BA30
Reserved21 BB29
Reserved22 BB31
SBS_B0 AY19
SBS_B1 BA18
SBS_B2 BC12
SDQS_B0 AV6
SDQS_B0# AU5
SDQS_B1 AR12
SDQS_B1# AP12
SDQS_B2 AP15
SDQS_B2# AR15
SDQS_B3 AT24
SDQS_B3# AU26
SDQS_B4 AW39
SDQS_B4# AU39
SDQS_B5 AL35
SDQS_B5# AL34
SDQS_B6 AG35
SDQS_B6# AG36
SDQS_B7 AC36
SDQS_B7# AC37
SCLK_B0 AV31
SCLK_B0# AW31
SCLK_B1 AU27
SCLK_B1# AT27
SCLK_B2 AV32
SCLK_B2# AT32
Reserved7 AU29
Reserved8 AR29
Reserved9 AV29
Reserved10 AW27
Reserved11 AN33
Reserved12 AP32
SVREF AM6
SMRCOMPVOL AM8
SMRCOMPVOH AM10
SRCOMP0
AN2 SRCOMP1
AN3 SRCOMP2
BB40 SRCOMP3
BA40
SCLK_A0
AU31 SCLK_A0#
AR31 SCLK_A1
AP27 SCLK_A1#
AN27 SCLK_A2
AV33 SCLK_A2#
AW33 Reserved3
AP29 Reserved4
AP31 Reserved1
AM26 Reserved2
AM27 Reserved5
AT33 Reserved6
AU33
SDQS_A0
AU4 SDQS_A0#
AR3 SDQS_A1
BB3 SDQS_A1#
BA4 SDQS_A2
BB9 SDQS_A2#
BA9 SDQS_A3
AT20 SDQS_A3#
AU18 SDQS_A4
AR41 SDQS_A4#
AR40 SDQS_A5
AL41 SDQS_A5#
AL40 SDQS_A6
AG42 SDQS_A6#
AG41 SDQS_A7
AC42 SDQS_A7#
AC41
SBS_A0
BA33 SBS_A1
AW32 SBS_A2
BB21
SODT_A0
AY37 SODT_A1
BA38 Reserved23
BB35 Reserved19
BA39
SMA_A0
BA31 SMA_A1
BB25 SMA_A2
BA26 SMA_A3
BA25 SMA_A4
AY25 SMA_A5
BA23 SMA_A6
AY24 SMA_A7
AY23 SMA_A8
BB23 SMA_A9
BA22 SMA_A10
AY33 SMA_A11
BB22 SMA_A12
AW21 SMA_A13
AY38 SMA_A14
BA21
SRAS_A#
BB33 SCAS_A#
AY35 SWE_A#
BB34
SCS_A0#
AW35 SCS_A1#
BA35 Reserved18
BA34 Reserved24
BB38
R210 20R1%0402R210 20R1%0402
R216
1KR1%0402
R216
1KR1%0402
R231 1KR1%0402R231 1KR1%0402
C251 C0.01U25X0402C251 C0.01U25X0402
R218 1KR1%0402 R218 1KR1%0402
R228
3.01KR1%0402
R228
3.01KR1%0402
R146 20R1%0402R146 20R1%0402
R230 1KR1%0402R230 1KR1%0402
R145 20R1%0402R145 20R1%0402
C236
C0.1U16Y0402
C236
C0.1U16Y0402

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_RED
V_CKDDR
VGA_BLUE
VGA_GREEN
MCH_DDC_DATA
SDVOCTRLDATA
SDVOCTRLCLK
V_3P3_DAC
MCH_DDC_CLK
REFSET
VCCA_DPLLA
VCC_CL_PLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_GPLL
EXP_EN_HDR
VCCDQ_CRT
CHIP_PWGD
VCCD_CRT CL_VREF_MCH CL_RST#
GRCOMP
EXP_SLR
V_1P25_EXP
DMI_MTP_0
DMI_MTP_1
DMI_MTN_0
DMI_MTP_3
DMI_MTN_2
DMI_MTP_2
DMI_MTN_1
DMI_MTN_3
HSYNC
VSYNC
CK_96M_DREF#
CK_96M_DREF
V_3P3_DAC
VCCA_GPLL
EXP_SLR
CL_RST# CL_VREF_MCH
VCCA_DPLLB
VCCA_MPLL
MCH_BSEL1
MCH_BSEL0
MCH_BSEL2
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITP_MRP_0
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
DMI_ITP_MRP_0
DMI_ITP_MRP_1
DMI_ITP_MRP_2
DMI_ITP_MRP_3
VCCA_HPLL
EXP_EN_HDR
V_1P25_CORE
V_1P25_CORE
VCC3
V_1P25_CORE
VCC_DDR VCC_DDR
V_1P25_CORE
V_1P25_CORE
V_1P25_CORE
V_1P5_MCH
VCC3
V_1P25_CORE
V_1P25_CORE
V_1P25_CORE
V_1P25_CORE
V_1P25_CORE
V_1P25_CORE
V_FSB_VTT
VCC3
EXP_A_TXP_11 22
EXP_A_TXP_12 22
EXP_A_TXP_13 22
EXP_A_TXP_10 22
EXP_A_TXP_15 22
EXP_A_TXP_9 22
EXP_A_TXN_14 22
EXP_A_TXN_11 22
EXP_A_TXP_14 22
EXP_A_TXN_15 22
EXP_A_TXN_13 22
EXP_A_TXN_9 22
EXP_A_TXN_12 22
EXP_A_TXN_10 22
EXP_A_TXN_8 22
EXP_A_RXP_422
EXP_A_RXP_022
EXP_A_RXP_122
EXP_A_RXP_222
EXP_A_RXP_322
EXP_EN_HDR22
EXP_A_RXP_522
EXP_A_RXP_622
EXP_A_RXP_722
EXP_A_RXN_422
EXP_A_RXN_022
EXP_A_RXN_122
EXP_A_RXN_722
EXP_A_RXN_222
EXP_A_RXN_322
EXP_A_TXP_2 22
EXP_A_TXP_3 22
EXP_A_RXN_522
EXP_A_RXN_622 EXP_A_TXP_6 22
EXP_A_TXP_0 22
EXP_A_TXP_1 22
EXP_A_TXP_7 22
EXP_A_TXP_4 22
EXP_A_TXP_5 22
EXP_A_TXN_7 22
EXP_A_TXN_3 22
EXP_A_TXN_4 22
EXP_A_TXN_0 22
EXP_A_TXN_6 22
EXP_A_TXN_5 22
EXP_A_TXN_2 22
CK_PE_100M_MCH15
EXP_A_TXN_1 22
CK_96M_DREF# 15
CK_96M_DREF 15
SDVOCTRLCLK22 VSYNC 27
CK_PE_100M_MCH#15
VGA_GREEN 27
VGA_RED 27
HSYNC 27
MCH_DDC_CLK 27
MCH_DDC_DATA 27
VGA_BLUE 27
MCH_BSEL016 MCH_BSEL116
SDVOCTRLDATA22
MCH_BSEL216
EXP_A_TXP_8 22
CHIP_PWGD 8,13,28
EXP_A_RXP_1022
EXP_A_RXP_1222
EXP_A_RXP_1322
EXP_A_RXP_922
EXP_A_RXN_1022
EXP_A_RXP_1422
EXP_A_RXP_1522
EXP_A_RXP_1122
EXP_A_RXN_1322
EXP_A_RXN_922
EXP_A_RXN_1522
EXP_A_RXN_1122
EXP_A_RXN_1222
EXP_A_RXN_1422
EXP_A_RXN_822 EXP_A_RXP_822
PLTRST# 8,12,16
DMI_ITP_MRP_012 DMI_ITN_MRN_012 DMI_ITP_MRP_112 DMI_ITN_MRN_112 DMI_ITP_MRP_212 DMI_ITN_MRN_212 DMI_ITP_MRP_312 DMI_ITN_MRN_312 DMI_MTP_IRP_0 12
DMI_MTN_IRN_0 12
DMI_MTP_IRP_1 12
DMI_MTN_IRN_1 12
DMI_MTP_IRP_2 12
DMI_MTN_IRN_2 12
DMI_MTP_IRP_3 12
DMI_MTN_IRN_3 12
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
10 33
Custom
G31 PCI-Express & RBG Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
10 33
Custom
G31 PCI-Express & RBG Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
Size Document Description Rev
Sheet of
Date:
MSI
1.1
MS-7529
10 33
Custom
G31 PCI-Express & RBG Signals
Friday, May 16, 2008
MICRO-STAR INT'L CO.,LTD
I = 67.9mA
I = 90.6mA
CL_VREF_MCH = 0.352V (FOR NOW)
MCH CORE DECOUPLING
Route solder side
4mils width
I = 0.36mA
I = 71.6mA
Close to MCH A.S.A.P
I = 90.6mA
I = 225mA
EXP_SLR: PCI Express
Static Lane Reversal
0: BTX 1: ATX
EXP_EN: PCI Express* SDVO
Concurrent Select
0: Only SDVO or PCI-E Operational
1: SDVO and PCI-E operating
simultaneously via PCI Express-G
port
C175 X_C0.1U16Y0402 C175 X_C0.1U16Y0402
R177
1KR0402
R177
1KR0402
C160 C0.1U16Y0402 C160 C0.1U16Y0402
CP7CP7
C187
C0.1U16Y0402
C187
C0.1U16Y0402
C245 C0.1U16Y0402C245 C0.1U16Y0402
C137 X_C10U10Y0805C137 X_C10U10Y0805
T15T15
T16T16
C171
X_C10U10Y0805
C171
X_C10U10Y0805
C140 C1U16YC140 C1U16Y
CP28CP28
R178 1.3KR1%0402R178 1.3KR1%0402
C176
C0.1U16Y0402
C176
C0.1U16Y0402
C178 X_C0.1U16Y0402 C178 X_C0.1U16Y0402
L13 X_0.1U50mL13 X_0.1U50m
21
R221 5.1KR0402R221 5.1KR0402
L10 X_0.1U50mL10 X_0.1U50m
21
C156
X_C0.22U16X
C156
X_C0.22U16X
NB1C
INTEL-LE82G31-A2-RH
NB1C
INTEL-LE82G31-A2-RH
VCC2 AL26 VCC2 AL24 VCC2 AL23 VCC2 AL21 VCC2 AL20 VCC2 AL18 VCC2 AL17 VCC2 AL15 VCC2 AK30 VCC2 AK29 VCC2 AK27 VCC2 AJ31 VCC2 AG31 VCC2 AF31 VCC2 AD32 VCC2 AC32 VCC2 AA32 VCC2 AJ30 VCC2 AJ29 VCC2 AJ27 VCC2 AG30 VCC2 AG29 VCC2 AG27 VCC2 AG26 VCC2 AF30 VCC2 AF29 VCC2 AF27 VCC2 AD30 VCC2 AD29 VCC2 AC30 VCC2 AC29 VCC2 AL12 VCC2 AL11 VCC2 AL10 VCC2 AL9 VCC2 AL8 VCC2 AL7 VCC2 AL6 VCC2 AL5 VCC2 AL4 VCC2 AL3 VCC2 AL2 VCC2 AK26 VCC2 AK24 VCC2 AK23 VCC2 AK21 VCC2 AK20 VCC2 AK18 VCC2 AK17 VCC2 AK15 VCC2 AK3 VCC2 AK2 VCC2 AK1 VCC2 AJ13 VCC2 AD31 VCC2 AC31 VCC2 AA31 VCC2 Y31 VCC2 AJ26 VCC2 AJ24 VCC2 AJ23 VCC2 AJ21 VCC2 AJ20 VCC2 AJ18 VCC2 AJ17 VCC2 AJ15 VCC2 AJ14 VCC2 AA30 VCC2 AA29 VCC2 Y30 VCC2 Y29 VCC2 V30 VCC2 V29 VCC2 U29 VCC2 U27 VCC2 AL13 VCC2 AK14 VCC2 AL29 VCC2 AL27
EXP_TXP0 D11
EXP_TXN0 D12
EXP_TXP1 B11
EXP_TXN1 A10
EXP_TXP2 C10
EXP_TXN2 D9
EXP_TXP3 B9
EXP_TXN3 B7
EXP_TXP4 D7
EXP_TXN4 D6
EXP_TXP5 B5
EXP_TXN5 B6
EXP_TXP6 B3
EXP_TXN6 B4
EXP_TXP7 F2
EXP_TXN7 E2
EXP_TXP8 F4
EXP_TXN8 G4
EXP_TXP9 J4
EXP_TXN9 K3
EXP_TXP10 L2
EXP_TXN10 K1
EXP_TXP11 N2
EXP_TXN11 M2
EXP_TXP12 P3
EXP_TXN12 N4
EXP_TXP13 R2
EXP_TXN13 P1
EXP_TXP14 U2
EXP_TXN14 T2
EXP_TXP15 V3
EXP_TXN15 U4
DMI_TXP0 V7
DMI_TXN0 V6
DMI_TXP1 W4
DMI_TXN1 Y4
DMI_TXP2 AC8
DMI_TXN2 AC9
DMI_TXP3 Y2
DMI_TXN3 AA2
EXP_COMPO AC11
EXP_COMPI AC12
HSYNC C15
VSYNC D15
RED B18
GREEN C19
BLUE B20
RED# C18
GREEN# D19
BLUE# D20
DDC_DATA L13
DDC_CLK M13
DREFCLKP C14
DREFCLKN D13
REFSET A20
PWROK2 AM15
V_1P25_PLTRST# AA12
VREF2 AM5
RESERVED54 AD13
RESERVED55 AD12
ALLZTEST K20
XORTEST F20
RESERVED56 A14
EXP_RXP0
F15 EXP_RXN0
G15 EXP_RXP1
K15 EXP_RXN1
J15 EXP_RXP2
F12 EXP_RXN2
E12 EXP_RXP3
J12 EXP_RXN3
H12 EXP_RXP4
J11 EXP_RXN4
H11 EXP_RXP5
F7 EXP_RXN5
E7 EXP_RXP6
E5 EXP_RXN6
F6 EXP_RXP7
C2 EXP_RXN7
D2 EXP_RXP8
G6 EXP_RXN8
G5 EXP_RXP9
L9 EXP_RXN9
L8 EXP_RXP10
M8 EXP_RXN10
M9 EXP_RXP11
M4 EXP_RXN11
L4 EXP_RXP12
M5 EXP_RXN12
M6 EXP_RXP13
R9 EXP_RXN13
R10 EXP_RXP14
T4 EXP_RXN14
R4 EXP_RXP15
R6 EXP_RXN15
R7
DMI_RXP0
W2 DMI_RXN0
V1 DMI_RXP1
Y8 DMI_RXN1
Y9 DMI_RXP2
AA7 DMI_RXN2
AA6 DMI_RXP3
AB3 DMI_RXN3
AA4
GCLKP
B12 GCLKN
B13
SDVO_CTRLDATA
G17 SDVO_CTRLCLK
E17
BSEL0
G20 BSEL1
J20 BSEL2
J18
RESERVED53
G18 EXP_SLR
E18 EXP_EN
J17
VCC2
Y32 VCCA_HPLL
C23 VCCA_MPLL
A24 VCCA_DPLLA
A22 VCCA_DPLLB
C22 VCCA_EXPPLL
B15
VCCA_DAC
C17 VCCA_DAC
B16 VCCA_EXP
A16 VCCD_CRT
C21 VCCDQ_CRT
B21 VSS
D16
VCC3_3
B17
VCC_EXP
AD11 VCC_EXP AD10 VCC_EXP
AD9 VCC_EXP AD8 VCC_EXP AD7 VCC_EXP AD6 VCC_EXP AD5 VCC_EXP AD4 VCC_EXP AD2 VCC_EXP AD1 VCC_EXP AC4 VCC_EXP AC3 VCC_EXP AC2 VCC_EXP
AE4 VCC_EXP AE3 VCC_EXP AE2
VCCSM
BC39 VCCSM BC34 VCCSM BC30 VCCSM BC26 VCCSM BC22 VCCSM BC18 VCCSM BC14 VCCSM
BB39 VCCSM BB37 VCCSM BB32 VCCSM BB28 VCCSM BB26 VCCSM BB24 VCCSM BB20 VCCSM BB18 VCCSM BB16 VCCSM BB12 VCCSM AY32 VCCSM
AW24 VCCSM AW20 VCCSM
AV26 VCCSM AV18
VCC_SMCLK
BB41 VCC_SMCLK BA42 VCC_SMCLK AY42 VCC_SMCLK BB42 VCC_SMCLK BA43
RESERVED25
H18 RESERVED26
AN21 RESERVED27
BB19 RESERVED28
BB2 RESERVED29
AW42 RESERVED30
AN32 RESERVED31
AM31 RESERVED32
AG32 RESERVED33
AF32 RESERVED34
AM21 RESERVED35
AL31 RESERVED36
AJ32 RESERVED37
AA10 RESERVED38
AA9 RESERVED39
AA11 RESERVED40
Y12 RESERVED41
U30 RESERVED42 U31 RESERVED43 R29 RESERVED44 R30 RESERVED45 U12 RESERVED46 U11 RESERVED47 R12 RESERVED48 R13 RESERVED49
AP21 RESERVED50
F13 RESERVED51
V31 RESERVED52
AA39
TEST0
BC43 TEST1
BC1 TEST2
A43
T18T18
C225 C0.1U16Y0402C225 C0.1U16Y0402
CP4CP4
C179 C0.01U25X0402 C179 C0.01U25X0402
RN27
8P4R-470R0402
RN27
8P4R-470R0402
1
3
5
7
2
4
6
8
CP6CP6
C224 C0.1U16Y0402C224 C0.1U16Y0402
R174 0R0402R174 0R0402
C169
C0.1U16Y0402
C169
C0.1U16Y0402
CP5CP5
C186
C10U10Y0805
C186
C10U10Y0805
T14T14
C155
X_C10U10Y0805
C155
X_C10U10Y0805
C243 C0.1U16Y0402 C243 C0.1U16Y0402
C229 C0.1U16Y0402C229 C0.1U16Y0402
R222 5.1KR0402R222 5.1KR0402
R236
1KR0402
R236
1KR0402
C264
X_C10P50N0402
C264
X_C10P50N0402
C226 C0.1U16Y0402C226 C0.1U16Y0402
C170
C0.1U16Y0402
C170
C0.1U16Y0402
L11 X_0.1U50mL11 X_0.1U50m
21
L16 X_80L4_30_1206L16 X_80L4_30_1206
21
R226 5.1KR0402R226 5.1KR0402
C161
X_C10U10Y0805
C161
X_C10U10Y0805
C228 C0.1U16Y0402C228 C0.1U16Y0402
C167
X_C10U10Y0805
C167
X_C10U10Y0805
R189
X_1KR0402
R189
X_1KR0402
CP10CP10
C272
X_C0.01U25X0402
C272
X_C0.01U25X0402
C227 C0.1U16Y0402C227 C0.1U16Y0402
L9 X_0.1U50mL9 X_0.1U50m
21
R364 X_0RR364 X_0R
R227 5.1KR0402R227 5.1KR0402
R234
1KR0402
R234
1KR0402
R144 X_1R1%R144 X_1R1%
C188
C0.01U25X0402
C188
C0.01U25X0402
R142 X_1R1%R142 X_1R1%
R190
X_1KR0402
R190
X_1KR0402
CP13CP13
T17T17
CP8CP8 L8 X_0.1U50mL8 X_0.1U50m
21
C180 C4.7U10Y0805 C180 C4.7U10Y0805
L6 X_10U100m_0805L6 X_10U100m_0805
21
CP9CP9
C194
X_C10U10Y0805
C194
X_C10U10Y0805
R237
392R1%0402
R237
392R1%0402
C249 C10U10Y0805 C249 C10U10Y0805
C281
C0.01U25X0402
C281
C0.01U25X0402
T13T13
C193
C0.1U16Y0402
C193
C0.1U16Y0402
C244 C0.1U16Y0402C244 C0.1U16Y0402
CP12CP12
R233
1.65KR1%0402
R233
1.65KR1%0402
R208 24.9R1%0402R208 24.9R1%0402
T19T19
R176 0R0402R176 0R0402
L7 X_0.1U50mL7 X_0.1U50m
21