NXP Semiconductors KW45B41Z-LOCUM User manual

KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
Rev. 1 — 23 November 2023 User manual
Document Information
Information Content
Keywords KW45B41Z-LOCUM, KW45B41Z-LOC, KW45B41Z, Bluetooth LE 5.3, CAN FD
Abstract The KW45B41Z-LOC board is a highly configurable, low-power, cost-effective evaluation and
development platform for NXPKW45B41Z MCU.

NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
1 KW45B41Z-LOC Overview
The KW45B41Z-LOC board is a highly configurable, low-power, cost-effective evaluation and development
platform for NXP KW45B41Z MCU, which is a low-power, highly secure, single chip wireless MCU based on
Arm Cortex-M33 core. It offers an easy-to-use user interface with a virtual serial port and standard programming
and run-control capabilities. This board provides the most suitable development and evaluation platform for the
Bluetooth LE Channel Sounding feature, as it supports Antenna Switching by default.
The KW45B41Z MCU includes a 96 MHz Arm Cortex-M33 CPU, a radio controller based on Arm Cortex-M3,
called NBU (Narrow Band Unit), a radio transceiver operating in the 2.4 GHz frequency band (supporting GFSK
modulations for Bluetooth Low Energy (LE) 5.3), Bluetooth LE controller stack, transceiver drivers, up to 1 MB
flash, up to 128 KB SRAM, and peripherals optimized to meet the requirements of target applications.
The KW45B41Z MCU supports multiprotocol use cases with Matter, Thread, Zigbee, Bluetooth LE, and CAN FD
for IoT, industrial, and automotive applications.
The KW45B41Z-LOC board provides RF circuitry (including two chip antennas and two u.FL connectors for
the conducted measurements), high-speed CAN transceiver, 16 Mbit QSPI NOR flash memory, and 32 MHz
crystal. It is compatible with Mikroe click boards. The board is a standalone PCB that supports application
development with GFSK libraries from NXP. It can be used with a wide range of development tools, including
NXP MCUXpresso IDE and IAR Embedded Workbench. The board is lead-free and RoHS-compliant.
For debugging the KW45B41Z MCU, the KW45B41Z-LOC board uses an onboard debug probe, known as
MCU-Link OB (OB stands for "onboard"). This MCU-Link OB is based on another MCU, LPC55S69. For
simplicity, MCU-Link OB is referred to as "MCU-Link debug probe" or just "MCU-Link", and the KW45B41Z MCU
is referred to as "target MCU" in this document.
This document provides details about the KW45B41Z-LOC board interfaces, power supplies, clocks, push
buttons, jumpers, and LEDs. In addition, it provides the steps to program the KW45B41Z-LOC board.
Note: For information on the operating temperature range for the board, see Section 2.11.
1.1 Board kit contents
The KW45B41Z-LOC board kit contains the following items:
•KW45B41Z-LOC board
•A USB cable
•A bag with five jumpers
1.2 Block diagram
Figure 1 shows the KW45B41Z-LOC block diagram.
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NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
a a a - 0 5 3 2 2 1
KW45B
41Z
48HVQFN
MCU-Link
QSPI
VIN
UART
3V3 LDO
CR2032
Auto qualified
package
I/OI/O
32 MHz
I/O P5V I/O
32.768 MH
QSPI
FLASH
WakeUp
SW3
CAN
PHY
CAN
CONN
CAN
Reset
SW
JTAG
SWD NMI
SW2
RF
switch
CAN
12 V
U.FL
Antenna
Antenna
U.FL
QSPI
NMI
LED
5 V LDO
LED
Red LED
P5V
SWD
RF line + GPIO
USB
micro-B
I/O header
mikroBUS
I/O header
mikroBUS
Figure 1. KW45B41Z-LOC block diagram
1.3 Board features
Table 1 describes the features of the KW45B41Z-LOC board.
Board feature Target MCU feature used Description
MCU (target MCU) KW45B41Z MCU with Arm Cortex-M33 core running at a
frequency of up to 96 MHz.
Note: For details on the KW45B41Z MCU features,
see KW45 Product Family Data Sheet and KW45B41Z
Reference Manual.
CAN FlexCAN module (CAN0) A high-speed CAN transceiver for driving CAN signals
between the target MCU and a 1x4 pin header
LPUART Two LPUART modules (LPUART0
and LPUART1)
•LPUART0: Connects to one of the two mikroBUS socket
connectors for an external UART connection
•LPUART1: Supports a USB-to-UART bridge for
connecting MCU-Link to the target MCU
LPSPI One of the two LPSPI modules
(LPSPI1) with PCS0 used for LPSPI
connection
PCS0 connects to:
•16 Mbit SPI NOR flash memory, which supports over-the-
air (OTA) programming
•One of the two mikroBUS socket connectors
LPI2C One of the two LPI2C modules (LPI2
C1)
LPI2C1 module connects to one of the two mikroBUS socket
connectors
RF 2.4 GHz radio Two U.FL connectors and two antennas for RF operation
Table 1. KW45B41Z-LOC features
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NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
Board feature Target MCU feature used Description
mikroBUS mikroBUS socket with two 1x8 position receptacles
MCU-Link USB USB 2.0 micro-B connector for creating MCU-Link high-
speed USB connection to the host computer, and providing 5
V power to the board
Power supply •The board can be powered up through:
–Coin cell battery
–USB micro-B connector
–DC power jack
–CAN header
•The following power configuration modes are supported:
–DC-DC Converter with Buck mode
–DC-DC Converter with Bypass mode
Clock The target MCU receives the following two clocks:
•A 32 MHz clock from a crystal for Arm core and radio.
Alternatively, the 32 MHz clock can be provided from a
TCXO (not populated on the board).
•A 32.768 kHz clock from another crystal as RTC and low-
power RF clock
Debug •Onboard MCU-Link debug probe with CMSIS-DAP and
SEGGER J-Link protocol options. It can connect to the
target MCU through a USB-to-UART bridge.
•10-pin Arm JTAG/SWD connector for connecting an
external debug probe
Table 1. KW45B41Z-LOC features...continued
1.4 Board pictures
Figure 2 shows the top-side view of the KW45B41Z-LOC board with connectors, push buttons, and LEDs
highlighted.
LED3
LED2
LED1
D7
U6
(MCU-Link)
J9
(DC power jack)
J1 (mikroBUS
socket connector)
J2 (mikroBUS
socket connector)
SW2
(interrupt)
SW3
(Wake-up)
J8
(u.FL)
ANT_A
J5
(target MCU
SWD connector) SW4
(target MCU
boot config button)
SW1
(reset button)
U2 SP4T
RF switch
U1
(target MCU)
J3 (USB micro-B
connector
J7
u.FL
J10
(CAN header)
ANT_B
Figure 2. KW45B41Z-LOC connectors, push buttons, and LEDs (top-side view)
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NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
Figure 3 shows the top-side view of the KW45B41Z-LOC board with jumpers highlighted.
JP21JP13JP3
JP24
JP23
JP2 JP18 JP14 JP6 JP10 JP1
JP12
JP16
JP4JP8
JP22
JP7JP25JP17
JP9
JP11
Figure 3. KW45B41Z-LOC jumpers
Figure 4 shows the bottom-side view of the KW45B41Z-LOC board with battery holder (BT2) highlighted.
BT2 (battery holder)
Figure 4. KW45B41Z-LOC bottom-side view
1.5 Connectors
Table 2 describes the KW45B41Z-LOC connectors.
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NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
Part identifiers Connector type Description Reference
section
BT1 (DNP)
(secondary option)
Holder for 3 V CR2450N lithium coin cell battery
BT2 (primary
option)
Coin cell battery holders
Note:
•BT1 and BT2 have
overlapping footprints (BT2
is used by default).
•CAN transceiver does not
work when using coin cell
battery.
Holder for 3 V CR2032 lithium coin cell battery
J9 DC power jack Connector for 12 V power adapter
J10 1x4 pin header CAN expansion header and 12 V power source
Section 2.1
J7, J8 U.FL connectors U.FL connectors
ANT_A, ANT_B Antennas 2400 MHz RF chip antennas
Section 2.7
J1, J2 1x8 position receptacles mikroBUS socket connectors Section 2.8
J3 USB 2.0 micro-B receptacle MCU-Link USB connector Section 2.10
J5 2x5 pin header Arm JTAG (SWD) connector to connect an
external debug probe or external debug target
Section 3.5
J4 (DNP) 2x5 pin header MCU-Link SWD connector For more
information on this
connector,
see KW45B41
Z-LOC board
schematics.
Table 2. KW45B41Z-LOC connectors
1.6 Jumpers
Table 3 describes the KW45B41Z-LOC jumpers.
Part identifier Jumper type Description Reference section
JP11 1x2 pin header LED reset button enable jumper:
•Open: LED reset (D3) is disabled
•Shorted (default setting): LED reset (D3) is enabled
JP16 1x2 pin header Target MCU boot configuration button (SW4) enable
jumper:
•Open (default setting): SW4 is disabled
•Shorted: SW4 is enabled
Section 1.7
JP1 1x2 pin header VDD_SWITCH power enable jumper:
•Open: VDD_SWITCH power is OFF
•Shorted (default setting): VDD_SWITCH power is
supplied to the target MCU
JP2 2x2 pin header P_VDD_SWITCH supply power source selection
jumper:
•2-4 shorted (default settings): P_VDD_SWITCH
supply is produced from V_BRD supply
•1-3 shorted: P_VDD_SWITCH supply is produced
from VBAT supply
Section 2.1
Table 3. KW45B41Z-LOC jumpers
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NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
Part identifier Jumper type Description Reference section
Note:
In the KW45B41Z-LOC board, P_VDD_SWITCH supply
produces through jumper JP1 the target MCU supply
VDD_SWITCH, which powers rest of the target MCU
supplies.
By populating the jumper JP2, you can operate KW45
board with the coincell power supply in the following two
methods:
•2-4 shorted and 1-3 shorted: In this configuration,
the coincell supplies power to all the target board
components. This makes functional some components
on the board like the NOR SPI external flash.
Note: This method is not recommended for power
profiling with coincell.
•1-3 shorted: In this configuration, the coincell supplies
power to the KW45 chip only. While, the rest of the
board is powered off.
This method is preferred for power profiling with
coincell. This configuration requires removal of
the jumper JP25 from the board. When the board
operates from coincell and JP2 is configured in
1-3 shorted mode (supplying KW45 chip only), the
RF switch on the board is not functional since it is
supplied from the V_BRD voltage node. Therefore RF
section is disabled in this mode.
JP3 1x3 pin header VDD_REG supply power source selection jumper:
•1-2 shorted (default settings): VDD_REG supply is
produced from P_VDD_SWITCH supply
•2-3 shorted: VDD_REG supply is produced from
VOUT_SWITCH power of the target MCU
JP10 1x3 pin header V_SEC supply power source selection jumper. V_SEC
jumper selects between KW45 DCDC or bypass power
schemes. The jumper settings are:
•1-2 shorted (default settings): V_SEC supply is
produced from 1V8_DCDC supply
•2-3 shorted: V_SEC supply is produced from
VDD_REG supply
JP4 1x2 pin header VDD_LDO_CORE supply enable jumper:
•Open: VDD_LDO_CORE supply is OFF
•Shorted (default setting): VDD_LDO_CORE supply is
ON
JP6 1x2 pin header VDD_RF supply enable jumper:
•Open: VDD_RF supply is OFF
•Shorted (default setting): VDD_RF supply is ON
JP7 1x2 pin header VDD_DCDC supply enable jumper:
•Open: VDD_DCDC supply is OFF
•Shorted (default setting): VDD_DCDC supply is ON
JP8 1x2 pin header VDD_IO_ABC power enable jumper:
•Open: VDD_IO_ABC power is OFF
Table 3. KW45B41Z-LOC jumpers...continued
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NXP Semiconductors KW45B41Z-LOCUM
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Part identifier Jumper type Description Reference section
•Shorted (default setting): VDD_IO_ABC power is
supplied to the target MCU
JP9 1x2 pin header VDD_ANA power enable jumper:
•Open: VDD_ANA power is OFF
•Shorted (default setting): VDD_ANA power is supplied
to the target MCU
JP25 1x2 pin header Target MCU reset enable jumper:
•Open: Target MCU reset is disabled
•Shorted (default setting): Target MCU reset is
enabled.
Note:
In the KW45B41Z-LOC board, P_VDD_SWITCH supply
produces through jumper JP1 the target MCU supply
VDD_SWITCH, which powers rest of the target MCU
supplies.
Depending on the coincell operation mode, the JP25 is
populated.
The following are the two methods to configure JP25 in
coincell operation mode:
•JP25 is populated if the JP2 pins 2-4 and 1-3 are
populated. The coincell supplies power to all the target
board components in this configuration. This makes
some component functional on the board , such as the
NOR SPI flash.
•JP25 is not populated if the JP2 pins 1-3 are shorted.
The coincell supplies power to the KW45 chip only.
While, the rest of the board is powered off in this
configuration.
The jumper needs to be populated when programming
or debugging the board.
JS1 (DNP) 1x2 pin header VDD_MEM supply enable shunt. When populated, this
shunt enables VDD_MEM supply for SPI NOR flash
memory.
Note: You need to cut PCB trace on the bottom side of
the board to enable/disable option.
JS2 (DNP) 1x2 pin header P_LED supply enable jumper. JS2 is a PCB shunt, it is
not a physical component on the board. If populated, it
can be used to enable P_LED supply for LED1, LED2,
and LED3.
Note: You need to cut the PCB trace on the bottom side
of the board either to enable or disable the jumper.
JP13 1x3 pin header
JP14 1x3 pin header
Target MCU LPUART controller selection for MCU-Link:
•1-2 shorted (default setting): LPUART1 controller
connects to MCU-Link
•2-3 shorted: LPUART0 controller connects to MCU-
Link
JP21 1x2 pin header USB-to-UART bridge disable jumper:
•Open (default setting): MCU-Link is connected to the
target MCU through a USB-to-UART bridge
Section 2.4
Table 3. KW45B41Z-LOC jumpers...continued
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NXP Semiconductors KW45B41Z-LOCUM
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Part identifier Jumper type Description Reference section
•Shorted: The USB-to-UART bridge between MCU-
Link and the target MCU is disabled
JP12 1x2 pin header MCU-Link (LPC55S69) boot configuration jumper:
•Open (default setting): MCU-Link follows normal boot
sequence (MCU-Link boots from internal flash if a
boot image is found). With the internal flash erased,
MCU-Link normal boot sequence falls through to ISP
boot mode.
•Shorted: MCU-Link is forced to ISP mode (USB1).
Use this setting to reprogram MCU-Link internal flash
with a new image or use the MCUXpresso IDE with
CMSIS-DAP protocol.
Note: By default, MCU-Link flash is preprogrammed
with a version of CMSIS-DAP firmware.
Installing device drivers
and updating MCU-
Link firmware
JP17 1x2 pin header Debug probe target selection jumper:
•Open (default setting): The onboard target MCU is
selected as the debug probe target and it can be
debugged using the MCU-Link debug probe or an
external debug probe.
•Shorted: The MCU-Link debug probe can be used to
debug an external target MCU.
JP18 1x3 pin header Target power selection jumper:
•1-2 shorted (default setting): Onboard target MCU or
an external target MCU is used as the debug probe
target and it uses board power to operate.
•2-3 shorted: An external target MCU is used as the
debug probe target and it operates using its own
power
JP22 1x2 pin header MCU-Link serial wire debug (SWD) disable jumper:
•Open (default setting): MCU-Link SWD feature is
enabled. MCU-Link drives SWD of target MCU or
external target MCU.
•Shorted: MCU-Link SWD feature is disabled. This
setting of JP22 can be used when connecting an
external debug probe for debugging the target MCU.
Section 3.5
JP23 1x3 pin header Target MCU pin selection jumper for mikroBUS socket
connector J2 pin 1:
•1-2 shorted (default setting): J2 pin 1 (PWM output
pin) connects to the target MCU pin PTD2.
•2-3 shorted: J2 pin 1 connects to the target MCU pin
PTC0.
JP24 1x3 pin header Target MCU pin selection jumper for mikroBUS socket
connector J2 pin 6:
•1-2 shorted (default setting): J2 pin 6 (I2C data pin)
connects to the target MCU pin PTD3.
•2-3 shorted: J2 pin 6 connects to the target MCU pin
PTB4.
For more information
on JP23 and JP24, see
KW45B41Z-LOC board
schematics.
Table 3. KW45B41Z-LOC jumpers...continued
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NXP Semiconductors KW45B41Z-LOCUM
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1.7 Push buttons
Table 4 describes the push buttons of the KW45B41Z-LOC board.
Part identifier Name Description
SW1 Reset button Pressing SW1 resets the target MCU (KW45B41Z) which causes board
peripherals to reset to their default states and executes the boot code. When
SW1 is pressed, the LED D3 turns ON. If the target MCU is in Deep power
down or power down mode, the MCU comes out of this mode. Jumper JP11
can be used to enable or disable LED D3.
SW2
SW3
Interrupt push buttons Both of these switches support Wake-up unit WUU pins to wake up from low
power.
SW4 Target MCU boot
configuration button
Helps the target MCU boot code to determine if the MCU should enter into In-
System Programming (ISP) mode. The main purpose of this button is to force
the target MCU into ISP mode at boot time; to do this, hold down this button
while pressing and releasing the reset button, or while connecting power to the
board. If an application in the target MCU internal flash is crashing or disabling
the SWD port unintentionally, then ISP mode can be useful to recover control
of the board. See KW45B41Z Reference Manual for more information on ISP
mode.
By default, SW4 is disabled. It can be enabled by shorting jumper JP16.
Table 4. KW45B41Z-LOC push buttons
Figure 5 shows the circuit diagrams of the KW45B41Z-LOC push buttons.
MCU RST
WUU0_P12
TMP2_CH1
VDD_DCDC
GND
GND
V_BRD
GND
GND
VDD_DCDC
GND
GND
GND
GND
PTC1
PTC7
RST_TGTMCU_b
R9
10K
DNP
SW3
TL1015AF160QG
PTC7_WUU0_P12 PB
1 2
G1
G2 G3 G4
C45
1000pF
D3
SML-D14U2WT86C
AC
SW1
TL1015AF160QG
RST_SW
1 2
G1
G2 G3 G4
JP11
MTMM-102-06-G-S-236
LED_RST
1
2
TP12
R17
10K
DNP
TP9
R24
100
C46
1000pF
SW2
TL1015AF160QG
PTC1 PB
1
2
G1
G2 G3 G4
LED_RST
VCC_IF_LINK
GND
GND
GND
PTA4/SWO/BOOT_CFG
SW4
TL1015AF160QG
BOOT CONFIG
1 2
G1
G2 G3 G4
JP16
MTMM-102-06-G-S-236
BOOT CFG
1 2
C113
1000pF
DNP
BOOT_CFG
Figure 5. Push button circuit diagrams
1.8 LEDs
Table 5 describes the KW45B41Z-LOC light-emitting diodes (LEDs) that correspond to the target MCU. The
board also has one more LED that is specific to MCU-Link. This LED is described in Section 3.7.
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