NXP Semiconductors KW45B41Z-LOCUM User manual

KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
Rev. 1 — 23 November 2023 User manual
Document Information
Information Content
Keywords KW45B41Z-LOCUM, KW45B41Z-LOC, KW45B41Z, Bluetooth LE 5.3, CAN FD
Abstract The KW45B41Z-LOC board is a highly configurable, low-power, cost-effective evaluation and
development platform for NXPKW45B41Z MCU.

NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
1 KW45B41Z-LOC Overview
The KW45B41Z-LOC board is a highly configurable, low-power, cost-effective evaluation and development
platform for NXP KW45B41Z MCU, which is a low-power, highly secure, single chip wireless MCU based on
Arm Cortex-M33 core. It offers an easy-to-use user interface with a virtual serial port and standard programming
and run-control capabilities. This board provides the most suitable development and evaluation platform for the
Bluetooth LE Channel Sounding feature, as it supports Antenna Switching by default.
The KW45B41Z MCU includes a 96 MHz Arm Cortex-M33 CPU, a radio controller based on Arm Cortex-M3,
called NBU (Narrow Band Unit), a radio transceiver operating in the 2.4 GHz frequency band (supporting GFSK
modulations for Bluetooth Low Energy (LE) 5.3), Bluetooth LE controller stack, transceiver drivers, up to 1 MB
flash, up to 128 KB SRAM, and peripherals optimized to meet the requirements of target applications.
The KW45B41Z MCU supports multiprotocol use cases with Matter, Thread, Zigbee, Bluetooth LE, and CAN FD
for IoT, industrial, and automotive applications.
The KW45B41Z-LOC board provides RF circuitry (including two chip antennas and two u.FL connectors for
the conducted measurements), high-speed CAN transceiver, 16 Mbit QSPI NOR flash memory, and 32 MHz
crystal. It is compatible with Mikroe click boards. The board is a standalone PCB that supports application
development with GFSK libraries from NXP. It can be used with a wide range of development tools, including
NXP MCUXpresso IDE and IAR Embedded Workbench. The board is lead-free and RoHS-compliant.
For debugging the KW45B41Z MCU, the KW45B41Z-LOC board uses an onboard debug probe, known as
MCU-Link OB (OB stands for "onboard"). This MCU-Link OB is based on another MCU, LPC55S69. For
simplicity, MCU-Link OB is referred to as "MCU-Link debug probe" or just "MCU-Link", and the KW45B41Z MCU
is referred to as "target MCU" in this document.
This document provides details about the KW45B41Z-LOC board interfaces, power supplies, clocks, push
buttons, jumpers, and LEDs. In addition, it provides the steps to program the KW45B41Z-LOC board.
Note: For information on the operating temperature range for the board, see Section 2.11.
1.1 Board kit contents
The KW45B41Z-LOC board kit contains the following items:
•KW45B41Z-LOC board
•A USB cable
•A bag with five jumpers
1.2 Block diagram
Figure 1 shows the KW45B41Z-LOC block diagram.
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NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
a a a - 0 5 3 2 2 1
KW45B
41Z
48HVQFN
MCU-Link
QSPI
VIN
UART
3V3 LDO
CR2032
Auto qualified
package
I/OI/O
32 MHz
I/O P5V I/O
32.768 MH
QSPI
FLASH
WakeUp
SW3
CAN
PHY
CAN
CONN
CAN
Reset
SW
JTAG
SWD NMI
SW2
RF
switch
CAN
12 V
U.FL
Antenna
Antenna
U.FL
QSPI
NMI
LED
5 V LDO
LED
Red LED
P5V
SWD
RF line + GPIO
USB
micro-B
I/O header
mikroBUS
I/O header
mikroBUS
Figure 1. KW45B41Z-LOC block diagram
1.3 Board features
Table 1 describes the features of the KW45B41Z-LOC board.
Board feature Target MCU feature used Description
MCU (target MCU) KW45B41Z MCU with Arm Cortex-M33 core running at a
frequency of up to 96 MHz.
Note: For details on the KW45B41Z MCU features,
see KW45 Product Family Data Sheet and KW45B41Z
Reference Manual.
CAN FlexCAN module (CAN0) A high-speed CAN transceiver for driving CAN signals
between the target MCU and a 1x4 pin header
LPUART Two LPUART modules (LPUART0
and LPUART1)
•LPUART0: Connects to one of the two mikroBUS socket
connectors for an external UART connection
•LPUART1: Supports a USB-to-UART bridge for
connecting MCU-Link to the target MCU
LPSPI One of the two LPSPI modules
(LPSPI1) with PCS0 used for LPSPI
connection
PCS0 connects to:
•16 Mbit SPI NOR flash memory, which supports over-the-
air (OTA) programming
•One of the two mikroBUS socket connectors
LPI2C One of the two LPI2C modules (LPI2
C1)
LPI2C1 module connects to one of the two mikroBUS socket
connectors
RF 2.4 GHz radio Two U.FL connectors and two antennas for RF operation
Table 1. KW45B41Z-LOC features
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NXP Semiconductors KW45B41Z-LOCUM
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Board feature Target MCU feature used Description
mikroBUS mikroBUS socket with two 1x8 position receptacles
MCU-Link USB USB 2.0 micro-B connector for creating MCU-Link high-
speed USB connection to the host computer, and providing 5
V power to the board
Power supply •The board can be powered up through:
–Coin cell battery
–USB micro-B connector
–DC power jack
–CAN header
•The following power configuration modes are supported:
–DC-DC Converter with Buck mode
–DC-DC Converter with Bypass mode
Clock The target MCU receives the following two clocks:
•A 32 MHz clock from a crystal for Arm core and radio.
Alternatively, the 32 MHz clock can be provided from a
TCXO (not populated on the board).
•A 32.768 kHz clock from another crystal as RTC and low-
power RF clock
Debug •Onboard MCU-Link debug probe with CMSIS-DAP and
SEGGER J-Link protocol options. It can connect to the
target MCU through a USB-to-UART bridge.
•10-pin Arm JTAG/SWD connector for connecting an
external debug probe
Table 1. KW45B41Z-LOC features...continued
1.4 Board pictures
Figure 2 shows the top-side view of the KW45B41Z-LOC board with connectors, push buttons, and LEDs
highlighted.
LED3
LED2
LED1
D7
U6
(MCU-Link)
J9
(DC power jack)
J1 (mikroBUS
socket connector)
J2 (mikroBUS
socket connector)
SW2
(interrupt)
SW3
(Wake-up)
J8
(u.FL)
ANT_A
J5
(target MCU
SWD connector) SW4
(target MCU
boot config button)
SW1
(reset button)
U2 SP4T
RF switch
U1
(target MCU)
J3 (USB micro-B
connector
J7
u.FL
J10
(CAN header)
ANT_B
Figure 2. KW45B41Z-LOC connectors, push buttons, and LEDs (top-side view)
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NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
Figure 3 shows the top-side view of the KW45B41Z-LOC board with jumpers highlighted.
JP21JP13JP3
JP24
JP23
JP2 JP18 JP14 JP6 JP10 JP1
JP12
JP16
JP4JP8
JP22
JP7JP25JP17
JP9
JP11
Figure 3. KW45B41Z-LOC jumpers
Figure 4 shows the bottom-side view of the KW45B41Z-LOC board with battery holder (BT2) highlighted.
BT2 (battery holder)
Figure 4. KW45B41Z-LOC bottom-side view
1.5 Connectors
Table 2 describes the KW45B41Z-LOC connectors.
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Part identifiers Connector type Description Reference
section
BT1 (DNP)
(secondary option)
Holder for 3 V CR2450N lithium coin cell battery
BT2 (primary
option)
Coin cell battery holders
Note:
•BT1 and BT2 have
overlapping footprints (BT2
is used by default).
•CAN transceiver does not
work when using coin cell
battery.
Holder for 3 V CR2032 lithium coin cell battery
J9 DC power jack Connector for 12 V power adapter
J10 1x4 pin header CAN expansion header and 12 V power source
Section 2.1
J7, J8 U.FL connectors U.FL connectors
ANT_A, ANT_B Antennas 2400 MHz RF chip antennas
Section 2.7
J1, J2 1x8 position receptacles mikroBUS socket connectors Section 2.8
J3 USB 2.0 micro-B receptacle MCU-Link USB connector Section 2.10
J5 2x5 pin header Arm JTAG (SWD) connector to connect an
external debug probe or external debug target
Section 3.5
J4 (DNP) 2x5 pin header MCU-Link SWD connector For more
information on this
connector,
see KW45B41
Z-LOC board
schematics.
Table 2. KW45B41Z-LOC connectors
1.6 Jumpers
Table 3 describes the KW45B41Z-LOC jumpers.
Part identifier Jumper type Description Reference section
JP11 1x2 pin header LED reset button enable jumper:
•Open: LED reset (D3) is disabled
•Shorted (default setting): LED reset (D3) is enabled
JP16 1x2 pin header Target MCU boot configuration button (SW4) enable
jumper:
•Open (default setting): SW4 is disabled
•Shorted: SW4 is enabled
Section 1.7
JP1 1x2 pin header VDD_SWITCH power enable jumper:
•Open: VDD_SWITCH power is OFF
•Shorted (default setting): VDD_SWITCH power is
supplied to the target MCU
JP2 2x2 pin header P_VDD_SWITCH supply power source selection
jumper:
•2-4 shorted (default settings): P_VDD_SWITCH
supply is produced from V_BRD supply
•1-3 shorted: P_VDD_SWITCH supply is produced
from VBAT supply
Section 2.1
Table 3. KW45B41Z-LOC jumpers
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NXP Semiconductors KW45B41Z-LOCUM
KW45B41Z-LOC Board User Manual
Part identifier Jumper type Description Reference section
Note:
In the KW45B41Z-LOC board, P_VDD_SWITCH supply
produces through jumper JP1 the target MCU supply
VDD_SWITCH, which powers rest of the target MCU
supplies.
By populating the jumper JP2, you can operate KW45
board with the coincell power supply in the following two
methods:
•2-4 shorted and 1-3 shorted: In this configuration,
the coincell supplies power to all the target board
components. This makes functional some components
on the board like the NOR SPI external flash.
Note: This method is not recommended for power
profiling with coincell.
•1-3 shorted: In this configuration, the coincell supplies
power to the KW45 chip only. While, the rest of the
board is powered off.
This method is preferred for power profiling with
coincell. This configuration requires removal of
the jumper JP25 from the board. When the board
operates from coincell and JP2 is configured in
1-3 shorted mode (supplying KW45 chip only), the
RF switch on the board is not functional since it is
supplied from the V_BRD voltage node. Therefore RF
section is disabled in this mode.
JP3 1x3 pin header VDD_REG supply power source selection jumper:
•1-2 shorted (default settings): VDD_REG supply is
produced from P_VDD_SWITCH supply
•2-3 shorted: VDD_REG supply is produced from
VOUT_SWITCH power of the target MCU
JP10 1x3 pin header V_SEC supply power source selection jumper. V_SEC
jumper selects between KW45 DCDC or bypass power
schemes. The jumper settings are:
•1-2 shorted (default settings): V_SEC supply is
produced from 1V8_DCDC supply
•2-3 shorted: V_SEC supply is produced from
VDD_REG supply
JP4 1x2 pin header VDD_LDO_CORE supply enable jumper:
•Open: VDD_LDO_CORE supply is OFF
•Shorted (default setting): VDD_LDO_CORE supply is
ON
JP6 1x2 pin header VDD_RF supply enable jumper:
•Open: VDD_RF supply is OFF
•Shorted (default setting): VDD_RF supply is ON
JP7 1x2 pin header VDD_DCDC supply enable jumper:
•Open: VDD_DCDC supply is OFF
•Shorted (default setting): VDD_DCDC supply is ON
JP8 1x2 pin header VDD_IO_ABC power enable jumper:
•Open: VDD_IO_ABC power is OFF
Table 3. KW45B41Z-LOC jumpers...continued
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Part identifier Jumper type Description Reference section
•Shorted (default setting): VDD_IO_ABC power is
supplied to the target MCU
JP9 1x2 pin header VDD_ANA power enable jumper:
•Open: VDD_ANA power is OFF
•Shorted (default setting): VDD_ANA power is supplied
to the target MCU
JP25 1x2 pin header Target MCU reset enable jumper:
•Open: Target MCU reset is disabled
•Shorted (default setting): Target MCU reset is
enabled.
Note:
In the KW45B41Z-LOC board, P_VDD_SWITCH supply
produces through jumper JP1 the target MCU supply
VDD_SWITCH, which powers rest of the target MCU
supplies.
Depending on the coincell operation mode, the JP25 is
populated.
The following are the two methods to configure JP25 in
coincell operation mode:
•JP25 is populated if the JP2 pins 2-4 and 1-3 are
populated. The coincell supplies power to all the target
board components in this configuration. This makes
some component functional on the board , such as the
NOR SPI flash.
•JP25 is not populated if the JP2 pins 1-3 are shorted.
The coincell supplies power to the KW45 chip only.
While, the rest of the board is powered off in this
configuration.
The jumper needs to be populated when programming
or debugging the board.
JS1 (DNP) 1x2 pin header VDD_MEM supply enable shunt. When populated, this
shunt enables VDD_MEM supply for SPI NOR flash
memory.
Note: You need to cut PCB trace on the bottom side of
the board to enable/disable option.
JS2 (DNP) 1x2 pin header P_LED supply enable jumper. JS2 is a PCB shunt, it is
not a physical component on the board. If populated, it
can be used to enable P_LED supply for LED1, LED2,
and LED3.
Note: You need to cut the PCB trace on the bottom side
of the board either to enable or disable the jumper.
JP13 1x3 pin header
JP14 1x3 pin header
Target MCU LPUART controller selection for MCU-Link:
•1-2 shorted (default setting): LPUART1 controller
connects to MCU-Link
•2-3 shorted: LPUART0 controller connects to MCU-
Link
JP21 1x2 pin header USB-to-UART bridge disable jumper:
•Open (default setting): MCU-Link is connected to the
target MCU through a USB-to-UART bridge
Section 2.4
Table 3. KW45B41Z-LOC jumpers...continued
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Part identifier Jumper type Description Reference section
•Shorted: The USB-to-UART bridge between MCU-
Link and the target MCU is disabled
JP12 1x2 pin header MCU-Link (LPC55S69) boot configuration jumper:
•Open (default setting): MCU-Link follows normal boot
sequence (MCU-Link boots from internal flash if a
boot image is found). With the internal flash erased,
MCU-Link normal boot sequence falls through to ISP
boot mode.
•Shorted: MCU-Link is forced to ISP mode (USB1).
Use this setting to reprogram MCU-Link internal flash
with a new image or use the MCUXpresso IDE with
CMSIS-DAP protocol.
Note: By default, MCU-Link flash is preprogrammed
with a version of CMSIS-DAP firmware.
Installing device drivers
and updating MCU-
Link firmware
JP17 1x2 pin header Debug probe target selection jumper:
•Open (default setting): The onboard target MCU is
selected as the debug probe target and it can be
debugged using the MCU-Link debug probe or an
external debug probe.
•Shorted: The MCU-Link debug probe can be used to
debug an external target MCU.
JP18 1x3 pin header Target power selection jumper:
•1-2 shorted (default setting): Onboard target MCU or
an external target MCU is used as the debug probe
target and it uses board power to operate.
•2-3 shorted: An external target MCU is used as the
debug probe target and it operates using its own
power
JP22 1x2 pin header MCU-Link serial wire debug (SWD) disable jumper:
•Open (default setting): MCU-Link SWD feature is
enabled. MCU-Link drives SWD of target MCU or
external target MCU.
•Shorted: MCU-Link SWD feature is disabled. This
setting of JP22 can be used when connecting an
external debug probe for debugging the target MCU.
Section 3.5
JP23 1x3 pin header Target MCU pin selection jumper for mikroBUS socket
connector J2 pin 1:
•1-2 shorted (default setting): J2 pin 1 (PWM output
pin) connects to the target MCU pin PTD2.
•2-3 shorted: J2 pin 1 connects to the target MCU pin
PTC0.
JP24 1x3 pin header Target MCU pin selection jumper for mikroBUS socket
connector J2 pin 6:
•1-2 shorted (default setting): J2 pin 6 (I2C data pin)
connects to the target MCU pin PTD3.
•2-3 shorted: J2 pin 6 connects to the target MCU pin
PTB4.
For more information
on JP23 and JP24, see
KW45B41Z-LOC board
schematics.
Table 3. KW45B41Z-LOC jumpers...continued
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1.7 Push buttons
Table 4 describes the push buttons of the KW45B41Z-LOC board.
Part identifier Name Description
SW1 Reset button Pressing SW1 resets the target MCU (KW45B41Z) which causes board
peripherals to reset to their default states and executes the boot code. When
SW1 is pressed, the LED D3 turns ON. If the target MCU is in Deep power
down or power down mode, the MCU comes out of this mode. Jumper JP11
can be used to enable or disable LED D3.
SW2
SW3
Interrupt push buttons Both of these switches support Wake-up unit WUU pins to wake up from low
power.
SW4 Target MCU boot
configuration button
Helps the target MCU boot code to determine if the MCU should enter into In-
System Programming (ISP) mode. The main purpose of this button is to force
the target MCU into ISP mode at boot time; to do this, hold down this button
while pressing and releasing the reset button, or while connecting power to the
board. If an application in the target MCU internal flash is crashing or disabling
the SWD port unintentionally, then ISP mode can be useful to recover control
of the board. See KW45B41Z Reference Manual for more information on ISP
mode.
By default, SW4 is disabled. It can be enabled by shorting jumper JP16.
Table 4. KW45B41Z-LOC push buttons
Figure 5 shows the circuit diagrams of the KW45B41Z-LOC push buttons.
MCU RST
WUU0_P12
TMP2_CH1
VDD_DCDC
GND
GND
V_BRD
GND
GND
VDD_DCDC
GND
GND
GND
GND
PTC1
PTC7
RST_TGTMCU_b
R9
10K
DNP
SW3
TL1015AF160QG
PTC7_WUU0_P12 PB
1 2
G1
G2 G3 G4
C45
1000pF
D3
SML-D14U2WT86C
AC
SW1
TL1015AF160QG
RST_SW
1 2
G1
G2 G3 G4
JP11
MTMM-102-06-G-S-236
LED_RST
1
2
TP12
R17
10K
DNP
TP9
R24
100
C46
1000pF
SW2
TL1015AF160QG
PTC1 PB
1
2
G1
G2 G3 G4
LED_RST
VCC_IF_LINK
GND
GND
GND
PTA4/SWO/BOOT_CFG
SW4
TL1015AF160QG
BOOT CONFIG
1 2
G1
G2 G3 G4
JP16
MTMM-102-06-G-S-236
BOOT CFG
1 2
C113
1000pF
DNP
BOOT_CFG
Figure 5. Push button circuit diagrams
1.8 LEDs
Table 5 describes the KW45B41Z-LOC light-emitting diodes (LEDs) that correspond to the target MCU. The
board also has one more LED that is specific to MCU-Link. This LED is described in Section 3.7.
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Part identifier Color LED name/function Description
LED1 Red User LED Controlled through a user application
LED2 Yellow User LED Controlled through a user application
LED3 Green Power-on indicator LED Indicates system power-on status. When the
board is powered up, LED3 turns ON.
D3 Red Reset button LED Indicates system reset activity. When board reset
is initiated, for example, by pressing the reset
button, D3 turns ON.
Table 5. KW45B41Z-LOC LEDs
Figure 6 shows the circuit diagrams of the LEDs described in the Table 5.
TMP1_CH0
TMP1_CH5
P_LED
P_LED
V_BRD
P_LED
P_LED
GND
GND
GND
GND
GND
PTC0
PTC6
R25
510
Q2
BSH111BK
1
2 3
R27 0
LED3
LED_GREEN
A
C
R28
10K
Q1
BSH111BK
1
2 3
R23
100
R26 0
LED2
LED_YEL
A
C
LED1
SML-D14U2WT86C
AC
R22
100
JS2
HDR 1X2
DNP
P_LED
1
2
R29
10K
L_R1
L_Y2
PO_LED
LED1_R
LED2_Y
LED1_R1
LED2_Y2
MCU RST
VDD_DCDC
GND
GND
RST_TGTMCU_b
D3
SML-D14U2WT86C
A
C
SW1
TL1015AF160QG
RST_SW
1 2
G1
G2 G3 G4
JP11
MTMM-102-06-G-S-236
LED_RST
1
2
R24
100
LED_RST
Figure 6. LED circuit diagrams
2 KW45B41Z-LOC Functional Description
This chapter describes the features and functions of the KW45B41Z-LOC board. You can use the functionality
described in this chapter as a reference while designing your own target board.
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Note: For details of the KW45B41Z MCU features, see KW45B41Z Reference Manual.
The chapter is divided into the following sections:
•Section 2.1 "Power supplies"
•Section 2.2 "Clocks"
•Section 2.3 "CAN interface"
•Section 2.4 "LPUART interface"
•Section 2.5 "LPSPI interface"
•Section 2.6 "LPI2C interface"
•Section 2.7 "RF interface"
•Section 2.8 "mikroBUS socket"
•Section 2.9 "GPOs"
•Section 2.10 "MCU-Link USB"
•Section 2.11 "Board operating conditions"
2.1 Power supplies
The KW45B41Z-LOC board can be powered up using the following means:
•From an external battery (coin cell CR2032/CR2450). Two coin cell battery options are provided for more
battery lifetime.
•Through the USB micro-B connector (J3), which produces 5 V power (FL_USB_5V0 supply). This supply
powers the MCU-Link 3.3 V regulator U8.
•From external 12 V DC supply through connector J9. This option is used to power up CAN functionality in the
board. Alternatively, 12 V external power can be supplied through pin 3 of CAN header J10.
The above primary power supplies are used to produce secondary power supplies for the board to power
up other board components, including the target MCU, MCU-Link, SPI NOR flash memory, CAN transceiver,
mikroBUS socket, push buttons, and LEDs.
Figure 7 shows the circuit diagrams of major KW45B41Z-LOC power supplies.
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MICRO B
FL_USB_5V0
GND
GND
GND
TP21
L9
330 OHM
12
J3
ZX62D-B-5PA8(30)
MCU_LINK
VBUS 1
D-
2
D+
3
ID
4
GND
5
SHELL1
6
SHELL2
7
SHELL3
8
SHELL4
9
C81
2.2UF
GND VBUS
USB I D
DP
DM
U9
RClamp0854P.TCT
1
5
2
3
4
6
7
R39 0
R40 0
L8
330 OHM
1 2
VBUS_USB
FL_USB1_DM
FL_USB1_DP
Ex te r n a l 1 2 V
P12V P12V_VBAT
P5V_CAN
GND
GND GND
GND
U18
NCP1117ST50T3G
GND
1
VOUT
2
VIN
3
TAB
4
C108
0.1UF
16V
D8
PNS40010ER
A C
C107
10UF
35V
J9
CON PWR 3
1
2
3
SH1 SH2
+
C109
10UF
16V
FL_USB_5V0
P5V
D4
RB160M-30
A C
SECONDARY
OPTION
P5V
P3V3_LDO
VBAT
GND
GND
GND
GND
GND
GND
P5V_CAN
D16
RB160M-30
A
C
D1
RB160M-30
A C
D2
RB160M-30
A C
U4 NCP1117ST33T3G
GND
1
VOUT
2
VIN
3
TAB
4
C25
10uF
16V
BT2
S8421-45R
1
2
TP7
BT1
SMTU2450N-LF
DNP
1
2
C23
10uF
16V
+
C24
10UF
V_LDO_OUT
P3V3_BATT
P3V3_BATT
COIN CELL
HOLDER
Figure 7. Power supply circuit diagrams
Table 6 describes the KW45B41Z-LOC power supplies.
Power source Manufacturing part
number
Power supply rail Description
Coin cell battery holder
BT2 (primary option)
S8421-45R
Coin cell battery holder
BT1 (DNP) (secondary
option)
SMTU2450N-LF
VBAT (3.3 V)
Note:
•BT1 and BT2
have overlapping
footprints (BT2 is
used by default).
•CAN transceiver
does not work
when using coin
cell battery.
One of the two supplies used to produce P_VDD_
SWITCH supply
MCU-Link USB
connector J3
ZX62D-B-5PA8(30)
(Hirose Electric)
FL_USB_5V0 (5 V) •One of the two supplies used to produce P5V
supply
•Supplies USB1_VBUS power to MCU-Link
(LPC55S69)
•Supplies power to MCU-Link 3.3 V regulator U8
Alternative 12 V supply
from power connector J9
or CAN header J10
P12V (12 V) Supplies power to LDO voltage regulator U18
Table 6. KW45B41Z-LOC power supplies
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Power source Manufacturing part
number
Power supply rail Description
LDO voltage regulator
U18
NCP1117ST50T3G
(onsemi)
P5V_CAN (5 V) •Another power supply used to produce P5V
supply
•Supplies power to CAN transceiver U19
(TJA1057GT/3)
•Supplies power to voltage translators U17 and
U20
From FL_USB_5V0 or
P5V_CAN supply
P5V (5 V) •Supplies power to LDO voltage regulator U4
•Supplies power to mikroBUS socket connector
J2
LDO voltage regulator U4 NCP1117ST33T3G
(onsemi)
P3V3_LDO (3.3 V) Produces V_BRD supply
From P3V3_LDO supply V_BRD (3.3 V) •Produces VCC_TGMCU supply
•Another supply used to produce P_VDD_
SWITCH supply
•Supplies power to mikroBUS socket connector
J1
•Supplies power to RF switch U2
•Supplies power to voltage translators U17 and
U20
•Can be used to supply power to interrupt button
SW3
•Can be used to produce VDD_MEM supply for
SPI NOR flash memory through jumper JS1 (not
populated)
•Can be used to produce P_LED supply for the
target MCU LEDs through jumper JS2 (not
populated)
From VBAT or V_BRD
supply through jumper
JP2
Note: When using VBAT
supply at jumper JP2
to produce P_VDD_
SWITCH supply, it is
recommended to open
jumper JP25 to avoid
any damage to the target
MCU chip, due to peak
current limitations of the
battery.
P_VDD_SWITCH
(3.3 V)
•Produces VDD_SWITCH power for the target
MCU (KW45B41Z) through jumper JP1
•One of the two supplies used to produce
VDD_REG supply
From P_VDD_SWITCH
supply or VOUT_
SWITCH power of the
target MCU through
jumper JP3
VDD_REG •One of the two supplies used to produce V_SEC
supply
•Produces VDD_DCDC supply
•Produces VDD_IO_ABC supply
•Produces VDD_ANA power for the target MCU
through jumper JP9
From VDD_REG or
1V8_DCDC supply
through jumper JP10
(1V8_DCDC supply
V_SEC •Produces VDD_LDO_CORE power for the
target MCU through jumper JP4
•Produces VDD_RF power for the target MCU
through jumper JP6
Table 6. KW45B41Z-LOC power supplies...continued
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Power source Manufacturing part
number
Power supply rail Description
is produced in DC-DC
inductor circuit)
From VDD_REG supply
through jumper JP7
VDD_DCDC •Supplies VDD_DCDC power to the target MCU
•Supplies power to reset button SW1 and reset
button LED D3
•Can be used to supply power to interrupt button
SW2
•Supplies power to TCXO (not populated)
From VDD_REG supply
through jumper JP8
VDD_IO_ABC Supplies VDD_IO_ABC power to the target MCU
From V_BRD supply VCC_TGMCU •Produces VCC_IF_LINK supply
•Supplies power to four-pole double-throw
(4PDT) switch U11
•Supplies power to voltage translator U16
From VCC_TGMCU
through shunt SH15
VCC_IF_LINK •Supplies power to the target MCU JTAG / serial
wire debug (SWD) connector J5
•Supplies power to boot configuration button
SW4
•Supplies power to voltage translators U10, U12,
U13, and U14 and buffer U15
•Supplies power to MCU-Link (LPC55S69)
MCU-Link regulator U8 XC6227C331
PR-G (Torex
Semiconductor)
MLINK_3V3 (3.3 V) •Supplies power to MCU-Link
•Supplies power to MCU-Link LED D7
•Supplies power to MCU-Link SWD connector J4
(not populated)
•Supplies power to voltage translators U10, U12,
U13, U14, and U16
Table 6. KW45B41Z-LOC power supplies...continued
2.1.1 Power modes
Table 7 shows the power modes supported by the KW45B41Z-LOC board and how to select the power mode
for the board.
Power mode Description Power mode selection
DC-DC Converter with Buck mode
(default mode)
In this mode, the DC-DC
converter of the target
MCU is enabled.
Configure jumper JP10 as 1-2 shorted.
DC-DC Converter with Bypass
mode
In this mode, the target
MCU DC-DC converter is
disabled.
Configure jumper JP10 as 2-3 shorted.
Table 7. KW45B41Z-LOC power modes
2.1.2 Current measurement
To measure current when the board is supplied from the USB cable, connect an ammeter in between the jumper
JP2 pins 2-4.
Note: This jumper JP2 is used to measure the total power consumption of the chip.
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Table 8 shows the KW45B41Z-LOC board power supplies that support current measurement along with the
jumpers that control these power supplies.
All the jumpers, except the jumper JP2 are 2-pin jumpers and an ammeter is connected to both 1 and 2 pins of
the jumpers given in the Table 8 for the current measurement.
Power supply Jumper
VDD_LDO_CORE + VDD_RF + VDD_DCDC + VDD_IO_
ABC
JP2
When the board is supplied with coincell battery, connect the
ammeter between the jumper JP2 pins 1-3, and open the
jumper JP25.
Note: The coincell current measurement is only supported
when the coincell battery supplies power to the KW45 chip
and the rest of the board is powered off.
VDD_LDO_CORE JP4
VDD_RF JP6
VDD_DCDC JP7
VDD_IO_ABC JP8
Table 8. Power supplies
2.1.3 DC-DC inductor options
The KW45B41Z-LOC board uses a 1 μH DC-DC inductor L1 (TDK MLZ2012A1R0WTD25). The inductor is
enabled when the board is configured in DC-DC Buck mode.
Figure 8 shows the DC-DC inductor circuit diagram of the KW45B41Z-LOC board.
MLZ2012A1R0WTD25
L1 AUTO PART
(t o DCDC_LX induc tor)
DCDC_LX
1V8_DCDC
GND GND
GND
C8
47pF
C6
0.01uf
L1
1uH
1
2
C5
22uF
1210
10V
R1
22
Figure 8. DC-DC inductor circuit diagram
Choosing right DC-DC inductor for your target board is very important. While selecting a DC-DC inductor, look
for the following specifications:
•Inductor value: 1 µH or 1.5 µH
•ESR: < 0.3 Ω
•Saturation current (Isat): > 300 mA
•Self-resonant frequency: > 50 MHz
The DC-DC inductor used in the KW45B41Z-LOC board is a good choice for general automotive applications
(for example, car access) as it delivers good performance (low ESR, high saturation current). It is also a
good choice for keyfob application based on LF technology. It prevents spurious from 100 kHz to 200 kHz
that can interact with another reception device (that is, NXP LF device at 125 kHz) on the same board. Other
recommended inductors are LQM18PH1R0MFRL from Murata and 78438336010 from Wurth.
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Figure 9 shows other possible inductor options.
Inductor type
Manufacturer
Part number
Value
Automotive
qualified
AEC-Q200
ESR
(Ω)
Isat
(mA)
Maximum
DC current
(mA)
Temperature
range (°C)
Size
(LxWxH) mm
SMD shielded
Multilayer ferrite
1 μH
TDK
MLZ2012A1R0WTD25
Yes 0.13 280 900
-55 to +125
SMD shielded
Multilayer ferrite
1 μH
TDK
MLZ1608A1R0WTD25
Yes 0.15 190 600
-55 to +125
1.6x0.8x0.8
SMD shielded
Thin film Metal core
1 μH
TDK TFM2016ALMA1R0MTAA Yes 0.05 3400 3700
-55 to +125
2x1.6x1
Wound (Metal)
1 μH
Murata
DFE322512F-1R0M
Yes 0.032 4800
-40 to +125
3.2x2.5x1.2
SMD shielded
Multilayer ferrite
1 μH
Murata
LQM18PH1R0MFRL
Yes 0.29 600 950
-40 to +125
1.6x0.8x0.5
SMD shielded
Multilayer ferrite
1 μH
Murata
LQM21PH1R0NGCD
Yes 0.1–0.13 200
-40 to +125
2x1.25x0.9
Chip coil
1 μH
Murata
LHQ3NPH1R0MM
Yes 0.03 2350 3000
-40 to +125
3x3x1.4
Chip coil
1 μH
Murata
LQW21FT1R0M0H
Yes 0.13 700 700
-40 to +125
2x1.2x1.6
SMD shielded
Multilayer ferrite
1 μH
Chilisin
AKPB001608DZ1R0MA2
Yes 0.2 200 700
-40 to +125
1.6x0.8x0.8
SMD shielded
Multilayer ferrite
1 μH
Chilisin
AKPB002012101R0MA2
Yes 0.12 650 1200
-40 to +125
2x1.25x1
SMD shielded
Multilayer ferrite
1 μH
Chilisin
AKPB002016101R0MA6
Yes 0.085 850 1300
-40 to +125
2x1.6x1
T-core
1 μH
Cyntec
VCTA20161B-1R0MS6
Yes 0.041–0.048 3100 3800
-55 to +165
2x1.6x1.2
Wound shielded
1 μH
Wurth
78 438 336 010
Yes 0.032 4000 5000
-40 to +125
3x3x2
2.2x1.45x1.05
Figure 9. DC-DC inductor options
2.2 Clocks
Table 9 describes the clocks available on the KW45B41Z-LOC board.
Clock generator Clock Frequency Destination
Y1: Crystal (NX1612SA 32MHZ EXS00A
CS14160)
[XTAL, EXTAL]_32M 32 MHz Target MCU (KW45B41Z)
Y2: Crystal (NX2012SE 32.768kHz EXS00A-
MU01517)
XTAL32K / EXTAL32K 32.768 kHz Target MCU
Y3: Temperature compensated crystal
oscillator (TCXO) (NT2016SB-32MHZ-
NSA3561B) (DNP)
EXTAL_RF 32 MHz Target MCU
Y4: Crystal MCU_LINK_[P, N]_16MHz 16 MHz MCU-Link (LPC55S69)
Table 9. KW45B41Z-LOC clocks
In the KW45B41Z-LOC board, the target MCU requires the following two clocks:
•32 MHz clock (with ±30 ppm accuracy): Provides clock inputs to the Arm Cortex-M33 core and 2.4 GHz radio
•32.768 kHz clock: Provides an accurate low-power timebase and acts as real-time clock (RTC) and low-power
RF clock
By default, the Y1 crystal provides a 32 MHz clock to the target MCU. Alternatively, Y3 TCXO (not populated)
can be used to provide a 32 MHz clock to the target MCU.
Figure 10 shows the circuit diagram of the Y1 crystal that provides 32 MHz clock. Internal load capacitors
provide the crystal load capacitance, and they can be adjusted to tune the center frequency of the crystal.
To measure the 32 MHz crystal frequency, program the XTAL (XTAL_RF) signal to provide buffered output clock
signal.
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NXP Semiconductors KW45B41Z-LOCUM
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GND
XTAL_RF
EXTAL_RF
Y1
32MHz
NX1612SA 32MHZ EXS00A CS14160
32M
1
4
3
2
R32 0
XTAL_32M
EXTAL_32M
Figure 10. 32 MHz clock circuit diagram
Figure 11 shows the circuit diagram of the Y2 crystal that provides 32.768 kHz clock. Internal load capacitors
provide the crystal load capacitance.
The 0 Ω resistors are provided to bypass the Y2 crystal which gives two additional GPIOs, PTD4 and PTD5, to
the I/O headers.
GND
GND
PTD4_XTAL32K
PTD5_EXTAL32K
Y2
32.768 kHz
32K
NX2012SE
32.768kHz
EXS00A-MU01517
1
2
R300
C50
12pF
DNP
R310
C49
12pF
DNP
XTAL32K
EXTAL32K
Figure 11. 32.768 kHz clock circuit diagram
2.3 CAN interface
The target MCU has a FlexCAN module (CAN0), which supports controller area network (CAN) and CAN
flexible data rate (FD). The KW45B41Z-LOC board allows communication with CAN0 module through a high-
speed CAN transceiver, which drives CAN signals between CAN0 module and a physical two-wire CAN bus that
terminates at a 1x4 pin header.
Figure 12 shows the KW45B41Z-LOC CAN diagram.
KW45B41Z
Two voltage
translators CAN transceiver CAN header J10
CAN0
Figure 12. CAN diagram
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NXP Semiconductors KW45B41Z-LOCUM
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Table 10 explains the KW45B41Z-LOC CAN connections.
CAN module Voltage translators Transceiver Connector
CAN0 Two voltage translators U17
and U20 (74LVCH1T45).
U17 and U20 shift voltage
levels of signals between
the target MCU and CAN
transceiver from V_BRD to
P5V_CAN and vice versa.
High-speed CAN transceiver
U19 (NXP TJA1057GT/3),
which is designed for high-
speed CAN applications
in the automotive industry,
providing the differential
transmit and receive
capabilities to a CAN
protocol controller. It
converts and sends analog
data from CAN bus lines to
the target MCU as digital
data, and converts and
sends digital data from the
target MCU to the CAN bus
lines as analog data.
1x4 pin CAN header J10. It allows external
CAN connection and has the following
pinout:
•1: High-level CAN bus line connection
•2: Low-level CAN bus line connection
•3: Power connection (P12V)
•4: Ground (GND)
Table 10. KW45B41Z-LOC CAN connections
Figure 13 shows the CAN circuit diagram involving J10, U19, U17, and U20.
CAN0_TX
CAN0_RX
P5V_CAN
P5V_CAN
V_BRD
P5V
GND
GND
GND
GND
P12V
GND
GND
P5V_CAN
V_BRD
GND
GND
GND
GND
GND
GND
GND
PTC5 3
PTC4 3
J10
HDR 1X4 RA
1
2
3
4
R45
60.4
C106
0.1UF
U20
74LVCH1T45
VCCA
1
GND 2
A
3B4
DIR
5VCCB 6
C103
0.1UF
R97
4.7K
R98 0
C110
4700PF
C112
0.1UF
C105
0.1UF
TJA1057GT/3
U19
TXD 1
GND
2
VCC 3
RXD 4
VIO 5
CANL
6
CANH
7
S8
R99
60.4
R100 0
C104
0.1UF
U17
74LVCH1T45
VCCA
1
GND 2
A
3B4
DIR
5VCCB 6
C111
0.1UF
CAN_DIR
CAN_HI
CAN_TX
CAN_RX
CAN_LO
Figure 13. CAN circuit diagram
The Figure 13 circuit diagram is explained below:
•The CAN interface of the board is only functional if the board is powered up using the P12V supply, which can
be produced through connector J9 or pin 3 of CAN header J10
•U19 is powered up using the P5V_CAN supply, which is produced by the regulator U18
•J10 provides pins to interface with a CAN bus
•Pin 3 of J10 can be used to power up other KW45B41Z-LOC boards
•Pin 3 of the J10 can also be used as an input to power up the KW45B41Z-LOC board
2.4 LPUART interface
The target MCU (KW45B41Z) has two low-power universal asynchronous receiver/transmitter (LPUART)
modules, LPUART0 and LPUART1. The KW45B41Z-LOC board supports connections to both LPUART
modules.
Figure 14 shows the LPUART diagram of the KW45B41Z-LOC board.
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KW45B41Z
Target MCU
Debugger MCU
MCU-Link
LPUART0
mikroBUS socket
connector J2
LPUART1
Voltage
translator
Figure 14. LPUART diagram
Table 11 explains the KW45B41Z-LOC LPUART connections.
LPUART module Voltage translator Connector / MCU-Link
LPUART0 mikroBUS socket connector J2. It allows a
UART connection between the target MCU
and plugged-in click board.
LPUART1
(default) / LPUART0
(alternative)
Bidirectional voltage translator U16 (74AVC4TD245
BQ). It supports a USB-to-UART bridge between MCU-
Link and the target MCU, by shifting voltage levels of
signals between the two devices from 3.3 V to VCC_
TGMCU and vice versa. The USB-to-UART bridge can
be disabled by shorting jumper JP21.
MCU-Link (LPC55S69). The USB-to-UART
bridge between MCU-Link and the target
MCU can be used for debugging the target
MCU from MCU-Link.
Table 11. KW45B41Z-LOC LPUART connections
A USB-to-UART bridge can be established between MCU-Link and the target MCU using either the LPUART1
module or the LPUART0 module of the target MCU based on the settings of jumpers JP13 and JP14:
•JP13 and JP14 are 1-2 shorted (default settings): LPUART1 module is used to create a USB-to-UART bridge.
When LPUART1 is used, ISP programming is supported.
•JP13 and JP14 are 2-3 shorted: LPUART0 module is used to create a USB-to-UART bridge.
Note: ISP programming is not supported with LPUART0.
2.5 LPSPI interface
The target MCU has two low-power serial peripheral interface (LPSPI) modules, LPSPI0 and LPSPI1. Each
LPSPI module can act as a SPI master or slave, and supports four peripheral chip selects (PCSes), PCS0,
PCS1, PCS2, and PCS3. The KW45B41Z-LOC board only supports LPSPI1 module, with PCS0 used for LPSPI
connection.
Figure 15 shows the KW45B41Z-LOC LPSPI diagram.
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