NXP Semiconductors QorIQ LS1028A User manual

1 Introduction
The QorIQ®LS1028A reference design board (LS1028ARDB) provides a
comprehensive platform that enables design and evaluation of the the QorIQ
LS1028A processor, which is a dual-core Arm®Cortex®-v8 A72 processor with
frequency up to 1.3 GHz.
This document provides settings of the switches, connectors, jumpers, power
supplies, push buttons, and LEDs present on the LS1028ARDB. It also explains
how to set up and boot the board.
The LS1028ARDB functions with an integrated development environment
(IDE), such as CodeWarrior Development Studio. For instructions on how to
work with the CodeWarrior Development Studio IDE, see CodeWarrior
Development Studio for QorIQ LS series - ARM V8 ISA, Targeting Manual.
2 Related documentation
The table below lists and explains the additional documents and resources that
you can refer to for more information on the LS1028ARDB.
Some of the documents listed below may be available only under a non-
disclosure agreement (NDA). To request access to these documents, contact your local field applications engineer or sales
representative.
Table 1. Related documentation
Document Description Link/how to access
QorIQ LS1028A Reference
Design Board Reference
Manual
Provides detailed description of the LS1028ARDB QorIQ LS1028A Reference
Design Board Reference
Manual
QorIQ LS1028A Product
Brief
Provides a brief overview of the LS1028A processor Contact FAE / sales
representative
QorIQ LS1028A Data Sheet Provides information about electrical characteristics, hardware
design considerations, and ordering information
Contact FAE / sales
representative
QorIQ LS1028A Family
Reference Manual
Provides a detailed description about the LS1028A QorIQ
multicore processor and its features, such as memory map, serial
interfaces, power supply, chip features, and clock information
Contact FAE / sales
representative
QorIQ LS1028A Chip Errata Lists the details of all known silicon errata for the LS1028A Contact FAE / sales
representative
Table continues on the next page...
Contents
1 Introduction..........................................1
2 Related documentation....................... 1
3 Hardware kit contents......................... 2
4 Chassis and board pictures................2
5 Power and reset buttons.....................5
6 Connectors...........................................5
7 Jumpers................................................7
8 DIP switches.........................................8
9 LEDs....................................................10
9.1 Multi-status LEDs..................13
10 Getting started with LS1028ARDB..14
10.1 Prerequisites........................14
10.2 Booting LS1028ARDB.........15
11 Troubleshooting............................... 17
12 Revision history............................... 17
LS1028ARDBGSG
QorIQ LS1028A Reference Design Board Getting Started Guide
Rev. 0 — 2/2019 User's Guide

Table 1. Related documentation (continued)
Document Description Link/how to access
QorIQ LS1028A Design
Checklist, AN12028
This document provides recommendations for new designs
based on the LS1028A SoC. This document can also be used to
debug newly designed systems by highlighting those aspects of
a design that merit special attention during initial system start-up
Contact FAE / sales
representative
Layerscape LS1028A BSP This document explains how to use the QorIQ LS1028A BSP,
which is a Linux-based development kit, to evaluate and explore
the features of the LS1028A SoC
Layerscape LS1028A BSP
CodeWarrior Development
Studio for QorIQ LS series -
ARM V8 ISA, Targeting
Manual
This manual explains how to use the CodeWarrior Development
Studio for QorIQ LS series - ARM V8 ISA product
CodeWarrior Development
Studio for QorIQ LS series -
ARM V8 ISA, Targeting
Manual
CodeWarrior TAP Probe
User Guide
Provides details of CodeWarrior®TAP, which enables target
system debugging through a standard debug port (usually JTAG)
while connected to a developer workstation through Ethernet or
USB
CodeWarrior TAP Probe
User Guide
3 Hardware kit contents
The table below lists the items included in the LS1028ARDB hardware kit.
Table 2. Hardware kit contents
Item Description
LS1028ARDB hardware assembly with enclosure -
12 V, 6.67 A AC-DC power adapter An external 12 V power adapter to power the board
Universal adaptor -
DB9F-to-DB9F cable -
Cable, USB3.1 Type C Male to USB3.0 Type A Female, 50 mm -
Cable, DB9F-to-USB Type A (Windows 10 support), 1 m -
Ethernet cable -
Programmed 16 GB SD card -
4 Chassis and board pictures
The figure below shows the front panel of the LS1028ARDB chassis.
NXP Semiconductors
Hardware kit contents
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SW1
Power
button
SW4
Reset
button
J34
Audio jack
connector
P3
CAN2: Top
CAN1: Bottom
P1
UART2: Top
UART1: Bottom
D27
RED: RESET
GREEN: SYSTEM
READY
D47
D48
D49
D50
D51
Figure 1. LS1028ARDB chassis front panel
The figure below shows the back panel of the LS1028ARDB chassis.
J1
Power
Jack
J10
Display
Port
J22
USB2
J21
USB1 P2
SD card
slot
J14
SGMII Ethernet
port
J15
QSGMII Ethernet
ports
Figure 2. LS1028ARDB chassis back panel
The following figure shows the connectors available on the LS1028ARDB board.
NXP Semiconductors
Chassis and board pictures
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J15 J12 J14 J13
J24
P2 J21 J22 J10 J1
J29
J30
J31
J11
J32
J23
J4
J3
BT1
P1
J33
J8
P3
J34
J2
J9
J16
J18
J20
J5
Figure 3. LS1028ARDB connectors
The following image shows the push buttons, jumpers, LEDs, and switches on the LS1028ARDB board.
NXP Semiconductors
Chassis and board pictures
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D14
D15
D16
D25 D26 D28 D29 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D2
D27
D47 D48 D49 D50 D51 SW2 SW3 SW5
J6
J7
J28
J27
D17
D19
SW1 SW4
Figure 4. LS1028ARDB jumpers, LEDs, switches, push buttons
5 Power and reset buttons
The power and reset buttons are available on the chassis front panel of the LS1028ARDB (see Figure 1. on page 3). The following
table lists the functions of these push buttons.
Table 3. LS1028ARDB push buttons
Push button Label Function Description
SW1 PWR Power cycle Press PWR to turn the power ON or OFF
SW4 RST System reset Press RST to reset the system, including the device and all the
attached peripherals
6 Connectors
Figure 3. on page 4 shows the connectors available on the board. The table below describes the factory default settings for the
LS1028ARDB connectors.
NXP Semiconductors
Power and reset buttons
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Table 4. Connector settings
Connector Description Connector type Typical connection
BT1 Battery 3-pin battery holder Connects to 3 V CR2032 lithium coin cell
battery
J1 Power connector DC power jack Connects to 12 V, 5 A power supply adapter.
Available on the chassis back panel.
J2 Remote power 1x2-pin header Connects to remote power switch
J9 Remote reset 1x2-pin header Connects to remote reset switch
J3, J4, J5 Fan header 1x3-pin connector Provides 12 V to chassis fans and device heat
sink fan
J8 CPLD_JTAG 2x5-pin header Connects to JTAG interface for CPLD
debugging
J24 DUT JTAG 2x5-pin Arm JTAG header Connects to CodeWarrior TAP using a 10-pin
cable
J11 IEEE1588 2x6-pin header Open, provides access to IEEE 1588 pins
J12 1PPS (IEEE1588) SMA connector Provides option to observe and use 1PPS
signals from IEEE1588 block of LS1028A
J13 IEEE1588(SW) & 1722 2x3-pin header Provides access to TSN switch 1588 pins and
IEEE 1722 pins
J17 M.2_1 COEX 1x4-pin header M.2 connector (1) header for coexistence
signals
J19 M.2_2 COEX 1x4-pin header M.2 connector (2) header for coexistence
signals
J23 EMU 2x10-pin connector Connects to DediProg EM100Pro QSPI
emulator using a sideband cable (ISP-
ADPintel- B)
J33 EMU RST 1x2-pin header Allows system reset to be triggered by the
DediProg EM100Pro emulator
J26 I2C1 1x3-pin header Access to I2C channels
P1 UART1 (BOT)
UART2 (TOP)
DB9 connector (2) Connects to an external RS-232 cable.
Available on the chassis front panel.
P3 CAN1 (BOT)
CAN2 (TOP)
DB9 connector (2) Connects to external CAN adapter cable.
Available on the chassis front panel.
J21 USB1 USB 3.0 Type-A
connector
Connects to USB-compatible device. Available
on the chassis back panel.
J22 USB2 24-pin USB Type-C
connector
Connects to USB-compatible device. Available
on the chassis back panel.
P2 SD card slot 9-pin SD card slot Provides access to SD card. Available on the
chassis back panel.
Table continues on the next page...
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Connectors
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Table 4. Connector settings (continued)
Connector Description Connector type Typical connection
J10 DisplayPort 20-pin DisplayPort
connector
Connects display devices. Available on the
chassis back panel.
J15 QSGMII Ethernet ports Four 2x8-pin RJ45
connectors
Four 1GbE Ethernet ports from TSN switch.
Available on the chassis back panel.
J14 SGMII Ethernet port 1x8-pin RJ45 connector 1GbE from ENETC SGMII MAC interface
J16 M.2 Key E 2x32-pin card slot Supports a Wi-Fi capable M.2 Type E card
J18 M.2 Key E 2x32-pin card slot Supports a Wi-Fi capable M.2 Type E card
J20 M.2 Key B 2x38-pin card slot Supports an SSD capable M.2 Type B card
J29, J30 mikroBUS1 Two 8-pin header Allows connection to mikro-click modules
J31, J32 mikroBUS2 Two 8-pin header Allows connection to mikro-click modules
J34 LINE_OUT 1x3-pin header SAI4 - Audio jack connector
7 Jumpers
Jumpers (shorting headers) are used to select some options, which either do not change often or involve power conduction.
Figure 4. on page 5 shows the jumpers available on the board. The table below describes the factory default settings for the
LS1028ARDB jumpers.
Table 5. Default jumper settings
Jumper Type Name/function Description
J6 1x2-pin connector TA_BB_EN enable Open: TA_BB_TMP_DETECT_B pin is High
(default value)
Shorted: TA_BB_TMP_DETECT_B pin is Low
J7 1x2-pin connector VBAT_EN Open: Disable battery backup for TA_BB_VDD
(default value)
Shorted: Enable battery backup for TA_BB_VDD
J27 1x2-pin connector PROG_MTR voltage control (for
NXP use only)
Open: PROG_MTR pin is powered off (default
value)
Shorted: PROG_MTR pin is powered by OVDD
(1.8 V)
J28 1x2-pin connector TA_PROG_SFP voltage control
(for NXP use only)
Open: TA_PROG_SFP pin is powered off
(default value)
Shorted: TA_PROG_SFP pin is powered by
OVDD (1.8 V)
Most of these jumpers are installed during assembly, and do not require any changes.
NOTE
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Jumpers
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8 DIP switches
The LS1028ARDB provides dual inline package (DIP) switches to allow easy configuration of the system for the most popular
board options. The CPLD stores the DIP switch values in the BRDCFG and DUTCFG registers and that allows the software (either
local or remote) to reconfigure the system as required.
For each DIP switch:
• If the switch is up (on), the value is 1
• If the switch is down (off), the value is 0
Figure 4. on page 5 shows the switches available on the board.
The table below shows the available switches, and also indicates the default switch settings as shipped.
Table 6. Switch settings
Switch Supported function Description
SW2[1:4] RCW fetch location
CFG_RCW_SRC[3:0]
SW_RCW_SRC[3:0]
• 0000: Hard-coded RCW
• 1000: SDHC1: SD card
• 1001: SDHC2: eMMC
• 1010: UEFI/I2C Boot EEPROM
• 1101: XSPI serial NAND, 4K pages
• 1111: XSPI serial NOR, 24-bit address (default setting)
SW2[5] Reset mode
RESET_REQ_B
SW_RST_MODE
• 0: Ignore RESET_REQ_B
• 1: Trigger system reset on RESET_REQ_B (default setting)
SW2[6:8] XSPI_A device mapping
CFG_XSPI_MAP
SW_XSPIMAP[2:0]: Controls how XSPI_A chip-selects are connected to
devices/peripherals.
Table 7.
Bit value XSPI_A_CS0 XSPI_A_CS1 Description
000 (default
setting)
sNOR sNAND Normal NOR
001 sNAND sNOR Normal NAND
010 Emulator sNOR Programmable
NOR
011 Emulator sNAND Programmable
NAND
100 sNOR Emulator Boot from sNOR
and program
emulator
NXP Semiconductors
DIP switches
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Table 6. Switch settings (continued)
Switch Supported function Description
SW3[1] CFG_ENG_USE0 SW_enguse[0]
• 0: Reserved
• 1: Reserved (default setting)
SW3[2:4] Device type selection
TEST_SEL_B,
CFG_SVR[0:1]
Table 8.
TESTSEL_
B
SVR[0] SVR[1] PVR/SVR Part Descriptio
n
1 1 1 870B_0010 LS1028AE 2 cores,
GPU
enabled
(Default
setting)
0 1 1 870B_0410 LS1027AE 2 cores,
GPU
disabled
1 0 1 870B_2010 LS1018AE 1 core,
GPU
enabled
0 0 1 870B_2410 LS1017AE 1 core,
GPU
disabled
X X 0 Varies Unassigne
d
-
SW3[5:6] UART2 configuration
CFG_MUX_UART2_SEL0
SW_UART2MAP[1:0]
• 0x: UART2 on DB9 connector (default setting)
• 10: UART2 on mikroBUS™click module 1
• 11: UART2 on mikroBUS click module 2
SW3[7] PWM configuration
CFG_MUX_PWM2uBUS1_B
CFG_MUX_PWM2uBUS2_B
SW_UCLICK_PWMMAP
• 0: PWM signal routed to mikroBUS click module 1 (default setting)
• 1: PWM signal routed to mikroBUS click module 2
SW3[8] SPI configuration
CFG_MUX_SPI2uBUS1_B
CFG_MUX_SPI2uBUS2_B
SW_UCLICK_SPIMAP
• 0: SPI signal routed to mikroBUS click module 1 (default setting)
• 1: SPI signal routed to mikroBUS click module 2
Table continues on the next page...
NXP Semiconductors
DIP switches
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Table 6. Switch settings (continued)
Switch Supported function Description
SW5[1:2] SoC use SW_CPU_FORCE[1:0]
• 0x: Normal mode (default setting)
• 10: Reserved
• 11: Force LS1028
Do not change the default setting of this switch.
NOTE
SW5[3] Bypass mode SW_BYPASS_B
• 0: Disable thermal monitors and other alarms
• 1: Normal operation (default setting)
SW5[4] Write protect SW_CFG_WP
• 0: Allow write to SYSID and UEFI flash
• 1: Write-protect SYSID and UEFI flash (default setting)
SW5[5] Boot Box mode SW_BOOTBOX_B
• 0: Enable boot-box mode
• 1: Normal operating mode (default setting)
SW5[6:7] Unused Reserved
Default value is 0.
SW5[8] IEEE/SAI • 0: Signals routed to IEEE1588 connector
• 1: Signals routed to TX-only SAI transceiver (default setting)
The table below summarizes the switch settings of the LS1028ARDB DIP switches for eMMC boot (SDHC2) and SD boot
(SDHC1).
Table 9. Switch settings for eMMC/SD boot
DIP switch Setting for eMMC boot Setting for SD boot
SW2[1:8] 1001_1000 1000_1000
SW3[1:8] 1111_0000 1111_0000
SW5[1:8] 0011_1001 0011_1001
9 LEDs
The LS1028ARDB has numerous onboard light-emitting diodes (LEDs), which can be used to monitor various system functions,
such as power-on, reset, board faults, and so on. The information collected from LEDs can be used for debugging purposes.
The following table lists all the LEDs available on the top-side of the LS1028ARDB board.
Figure 4. on page 5 shows the position of LEDs on the board.
NXP Semiconductors
LEDs
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Table 10. LEDs available on top-side of LS1028ARDB
Reference
designator
LED color LED name Description (when LED is ON)
D2 Green 12V_IN Indicates 12 V input power supply is operating.
D14 Green M.2 LED1 The M.2 card on J16 is powered properly and its
transmitter is ready to transmit.
D15 Green M.2 LED1 The M.2 card on J18 is powered properly and its
transmitter is ready to transmit.
D16 Green M.2 DAS The SSD M.2 card on J20 is powered properly and
drive is active. DAS stands for Drive Activity Signal.
D19 Green USB2 5V 5 V power is supplied to the USB 2 connector for
external devices
D17 Green USB1 5V 5 V power is supplied to the USB 1 connector for
external devices
D25 Yellow ASLEEP The processor has not exited Sleep mode, which
generally indicates:
• Improper RCW source selection
• Boot memory does not contain a valid
RCW/PBL
• PLL multipliers in the RCW data are not
compatible with the fixed SYSCLK, DDRCLK, or
SDCLK values
D26 Red FAIL Indicates one of the following has happened:
• A thermal over-temperature fault has occurred
• One or more power supplies have not started
• Software has set the CTL.FAIL bit to indicate a
software fault
D28 Red RST_REQ The processor is asserting RESET_REQ_B. This is
typically due to the reasons described for the
ASLEEP LED.
D29 Red THERM Thermal monitors have detected a thermal fault and
have shut down the system.
Unless reprogrammed by user
software, the thermal trip point
is 85 °C.
NOTE
.
D35 Green M3 General status. See Multi-status LEDs for details.
D36 Green M2
D37 Green M1
Table continues on the next page...
NXP Semiconductors
LEDs
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Table 10. LEDs available on top-side of LS1028ARDB (continued)
Reference
designator
LED color LED name Description (when LED is ON)
D38 Green M0
D39 Green 5.0V 5V0 power supply is operating correctly
D40 Green 3.3V 3V3 power supply is operating correctly
D41 Green 1.0V 1V0 power supply is operating correctly
D42 Green PS_DDR DDR power supply is operating correctly
D43 Green VR500 VR500 output supplies (2V5/1V8/1V35) are
operating correctly
D44 Green TA_BB_VDD Low power security monitor supply is operating
correctly
D45 Green SocInSocket Indicates that the LS1028A processor is in socket
The following table lists all the LEDs available on the front-panel of the LS1028ARDB board chassis.
Figure 1. on page 3 shows the LEDs available on the board chassis.
Table 11. LEDs available on front-panel of board chassis
Reference
designator
LED color LED name Description (when LED is ON)
D27 Red RESET RESET is 'ON' when reset to DUT is
asserted due to:
• Power cycle
• Debugger reset
• Reset from SoC (RESET_REQ_B if
enabled in CPLD)
• RESET switch
Green SYSTEM READY SYSTEM READY is 'On', when power-on
reset sequencing is done
SYSTEM READY is 'Off' for:
• Power sequencing fault
• Any alarm, such as over-temperature
• Explicit software enable (reg CTL.FAIL)
• Other fault signals
SW1 Green/Yellow POWER • OFF: off
• YELLOW: power cycle in progress/fault
• GREEN: System ready
D47 Green/Yellow SWP0 • GREEN : Link is active
Table continues on the next page...
NXP Semiconductors
LEDs
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Table 11. LEDs available on front-panel of board chassis (continued)
Reference
designator
LED color LED name Description (when LED is ON)
D48 Green/Yellow SWP1 • YELLOW: Link is 1000BaseT
Available on the chassis front panel.
D49 Green/Yellow SWP2
D50 Green/Yellow SWP3
D51 Green/Yellow MAC1
9.1 Multi-status LEDs
The board includes four multi-status LEDs that indicate hardware activity; however, software can override these LEDs to use them
for debugging purposes. The table below describes the functions of the multi-status LED arrays.
Table 12. LED array functions
LED Reset sequencer state Normal (after 2 seconds) User-defined (if register
CTL[1] (LED) = 1)
M3 (see Table 13. Reset sequencer
state on page 13)
Not applicable M[3:0] reflect contents of
the LED register
M2 Not applicable
M1 Not applicable
M0 Heartbeat: Clock monitor
Table 13. Reset sequencer state
State LED: M[3:0] Description
IDLE 0000 = 0x0 Waiting for initial reset events
SAMPLE 0001 = 0x1 Sample configuration switches
RECONFIG 0010 = 0x2 Update configuration from registers
Reserved 0011 = 0x3 Reserved
Reserved 0100 = 0x4 Reserved
CLOCK_LOCK 0101 = 0x5 Wait for clock PLLs to stabilize
RELEASE_ALL 0110 = 0x6 Release all hardware resets except DUT
RELEASE_DUT 0111 = 0x7 Release DUT from reset
STABLE 1000 = 0x8 Reset sequencing complete. Wait for reset events.
RESET_REQ 1001 = 0x9 Start reset due to (cause): DUT HRESET_REQ_B
Table continues on the next page...
NXP Semiconductors
LEDs
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Table 13. Reset sequencer state (continued)
State LED: M[3:0] Description
PORESET 1010 = 0xA Start reset due to (cause): JTAG HRESET_B (PORESET_B)
RST_WATCH 1011 = 0xB Start reset due to (cause): Watchdog timeout
RST_BY_REG 1100 = 0xC Start reset due to (cause): Register bit set
RST_BY_SW 1101 = 0xD Start reset due to (cause): Pushbutton switch
RECONFIG 1110 = 0xE Start reset due to (cause): Reconfig request
POST_RST 1111 = 0xF Recover from requester reset
10 Getting started with LS1028ARDB
This section describes the following:
•Prerequisites on page 14
•Booting LS1028ARDB on page 15
This section outlines the standalone activation of the LS1028ARDB board.
10.1 Prerequisites
The following table describes prerequisites to set up and boot the LS1028ARDB board.
Table 14. Prerequisites
Item Purpose/required action
Hardware
Windows or Linux machine Host computer to control and monitor the LS1028ARDB board
from the serial console using a serial terminal emulator, such
as Tera Term (for Windows platform) or Minicom (for Linux
platform).
NOTE: In this document, the board booting steps are described
using a Windows-based machine.
AC-DC power adapter (available with the board kit) An external 12 V power adapter to power the board
DB9F-to-USB Type A cable (available with the board kit) To make a console connection from UART1 port (bottom) of the
board to USB port of the host computer
SD card (available with the board kit) To boot the board to Linux prompt
Ethernet cable (available with the board kit) To get updated board software by connecting board to the
network
CodeWarrior TAP (optional, not available with board kit) To debug and control the board using the CodeWarrior IDE
Software
Table continues on the next page...
NXP Semiconductors
Getting started with LS1028ARDB
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Table 14. Prerequisites (continued)
Item Purpose/required action
USB-to-serial/UART/RS-232 driver Download and install USB-to-serial port driver on the host
computer from Internet
Tera Term (serial terminal emulator) Download and install on the host computer from Internet
TFTP server Download and install on the host computer from Internet; used
to transfer files from host computer to the board
10.2 Booting LS1028ARDB
Follow these steps to boot the board:
1. Ensure that you have met the prerequisites described in Table 14. Prerequisites on page 14.
2. Open the chassis top cover and verify that the board has default switch settings (see DIP switches on page 8).
3. Verify that the board has default jumper settings (see Jumpers on page 7).
4. Connect one end of the 12 V AC to DC power supply adapter cable to power jack at the chassis back panel and the
other end of the power adapter cable to the wall mount power switch.
5. Turn on the wall mount power switch. Verify that the SYSTEM READY LED on chassis front-side has turned on (Green).
6. Press the power button available on the chassis front panel to power off the board.
7. Plug the SD card in the SD card slot available on the chassis back panel.
8. Connect one end of the DB9F-to-USB Type A cable to the UART1 DB9 connector (P2-Bottom) available on chassis front
panel and the other end of the cable to the USB port of the host machine. This connection allows you to make a console
connection between the board and host computer to see the console output.
9. Optionally, connect the CodeWarrior TAP to the board by performing the following steps:
Follow the instructions included with the CodeWarrior package to set up the environment and host attachment,
such as USB and Ethernet.
NOTE
a. Connect the 10-pin micro adapter (CWH-CTP-CTX10-YE), provided with the CodeWarrior TAP, to the
CodeWarrior TAP.
b. Connect one end of the 10-wire cable (gray ribbon cable) to the 10-pin micro adapter (both ends of the wire are
keyed and can be connected on either side).
c. Connect the other end of the 10-wire cable to the 10-pin Arm JTAG header (J24) on the board.
10. Optionally, connect the Ethernet cable if you want to connect your board to the network, for example, for obtaining
latest board software and updating board images.
11. Set up Tera Term on the host computer:
a. Start Tera Term. The Tera Term console appears along with the Tera Term: New connection dialog.
b. On the Tera Term: New connection dialog, select the Serial option, and ensure that COM: USB-to-Serial
Comm Port is selected in the Port menu.
c. Click OK to close the Tera Term: New connection dialog.
d. Choose Setup > Serial port from the Tera Term console menu bar. The Tera Term: Serial port setup dialog
appears.
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Getting started with LS1028ARDB
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e. On the Tera Term: Serial port setup dialog, configure the serial port of the host computer with the following
settings:
• Baud rate: 115200
• Data: 8 bit
• Parity: none
• Stop: 1 bit
• Flow control: none
f. Click OK to close the Tera Term: Serial port setup dialog and complete setting up Tera Term.
12. Press the power button available on the chassis front panel to power on the board. The SYSTEM READY LED on
chassis front-side turns on (Green).
13. The board boots up. The U-Boot log appears on the Tera Term console as given below.
U-Boot 2018.03 (Jan 20 2019 - 13:52:05 +0800)
SoC: LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
CPU0(A72):1300 MHz CPU1(A72):1300 MHz
Bus: 400 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 34004010 00000030 00000000 00000000
00000010: 00000000 008f0000 0030c000 00000000
00000020: 01a031a0 00002580 00000000 00003296
00000030: 00000000 00000010 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 200e705a 00000000
00000070: bb580000 00000000
Model: NXP Layerscape 1028a RDB Board
Board: LS1028AE Rev1.0-RDB, Version: C, boot from NOR
FPGA: v6 (RELEASED: RDB_2018_1206_2148)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz
I2C: ready
DRAM: Initializing DDR....
Detected UDIMM Fixed DDR on board
3.9 GiB
DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
PPA Firmware: Version LSDK-18.09
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from SPI Flash... SF: Detected mt35xu02g with page size 256 Bytes, erase
size 128 KiB, total 2 GiB
*** Warning - bad CRC, using default environment
Failed (-5)
EEPROM: NXID v1
In: serial
Out: serial
Err: serial
Net: eth0: enetc#0, eth1: enetc#1, eth2: enetc#2, eth3: netc_mdio, eth4: enetc#3
MDIO MUX: no MDIO MUX node
Hit any key to stop autoboot: 0
NXP Semiconductors
Getting started with LS1028ARDB
QorIQ LS1028A Reference Design Board Getting Started Guide, Rev. 0, 2/2019
User's Guide 16 / 18

The above U-Boot log is an example log; the actual U-Boot log may vary slightly depending on the BSP version
available on the board.
NOTE
After U-Boot, if you do not hit any key to stop autoboot, the board automatically boots to Linux prompt from SD card.
QorIQ LSDK (NXP Reference Distro) 2.0 TinyDistro /dev/ttyS0
TinyDistro login: root
root@TinyDistro:~#
If you do not install SD card on the board, the board automatically boots to Linux prompt from the eMMC card
available on the board.
NOTE
For steps to download and assemble updated BSP composite firmware image and deploy Ubuntu distribution on
the LS1028ARDB, see "LS1028A BSP user guide" section in LS1028A BSP documentation.
NOTE
11 Troubleshooting
This section explains the basic troubleshooting tips for the LS1028ARDB.
U-boot log does not appear
Perform the following steps in case console does not show any print:
• Ensure that the board is configured for the default switch settings. For detail, see DIP switches on page 8
• Ensure that the power cord is connected to the power jack.
• Check status LED D27 (SYSTEM READY). It should be ON.
• Ensure that the cables making console connection are properly connected as mentioned in Booting LS1028ARDB on page
15.
• Ensure that Tera Term has communication settings as mentioned in Booting LS1028ARDB on page 15.
• Press the reset button. The U-Boot log should be available on the console.
•If U-Boot log still does not appear on console, the BSP image may be corrupt. Try to flash the BSP firmware images and U-
Boot again.
12 Revision history
The table below summarizes the revisions to this document.
Table 15. Revision history
Revision Date Topic cross-reference Change description
Rev. 0 02/2019 - Initial public release
NXP Semiconductors
Troubleshooting
QorIQ LS1028A Reference Design Board Getting Started Guide, Rev. 0, 2/2019
User's Guide 17 / 18

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Date of release: 2/2019
Document identifier: LS1028ARDBGSG