Oki ML63611 User manual

ML63611
User’s Manual
CMOS 4-bit microcontroller
SECOND EDITION
ISSUE DATE: Jun. 2001
1
Preliminary
PEUL63611-02

NOTICE
1. The information contained herein can change without notice owing to product and/or technical improvements.
Before using the product, please make sure that the information being referred to is up-to-date.
2. The outline of action and examples for application circuits described herein have been chosen as an explanation
for the standard action and performance of the product. When planning to use the product, please ensure that the
external conditions are reflected in the actual circuit, assembly, and program designs.
3. When designing your product, please use our product below the specified maximum ratings and within the
specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating
temperature.
4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting
from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical
or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or
operation outside the specified operating range.
5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by
us in connection with the use of the product and/or the information and drawings contained herein. No
responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof.
6. The products listed in this document are intended for use in general electronics equipment for commercial
applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics,
etc.). These products are not authorized for use in any system or application that requires special or enhanced
quality and reliability characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace
equipment, nuclear power control, medical equipment, and life-support systems.
7. Certain products in this document may need government approval before they can be exported to particular
countries. The purchaser assumes the responsibility of determining the legality of export of these products and will
take appropriate and necessary steps at their own expense for these.
8. No part of the contents contained herein may be reprinted or reproduced without our prior permission.
Copyright 2001 Oki Electric Industry Co., Ltd.

Preface
This manual describes the hardware of Oki’s original CMOS 4-bit microcontroller ML63611.
Refer to the “nX-4/250, 300 Core Instruction Manual” for details of the 4-bit CPU core nX-4/250 which is built in the
ML63611.
The manuals related to the ML63611 is shown below.
•nX-4/250, 300 Core Instruction Manual:
Describes the base architecture and instruction set of nX-4/250 core and nX-4/300 core.
•SASM63K User’s Manual:
Describes the structured assembler operation and assembler language specification.
•Dr.63611 User’s Manual:
Describes the hardware of the emulator.
•DT63K Debugger User’s Manual:
Describes the debugger commands and the hardware of the simulator.
•MOGTOOL Mask Option Generator User’s Manual:
Describes the mask option settings and the generator operation.
This document is subject to change without notice.

Notation
Classification Notation Description
■Numeric value xxh, xxH Represents a hexadecimal number.
xxb Represents a binary number.
■Unit word, W 1 word = 16 bits
byte, B 1 byte = 2 nibbles = 8 bits
nibble, N 1 nibble = 4 bits
mega-, M 106
kilo-, K 210 = 1024
kilo-, k 103= 1000
milli-, m 10–3
micro-, µ 10–6
nano-, n 10–9
second, s (lower case) second
KB 1 KB = 1 kilobyte = 1024 bytes
MB 1 MB = 1 megabyte = 220 bytes
= 1,048,576 bytes
■Symbol Note: Gives more information about mistakable items.
■Terminology “H” level Indicates high side voltage signal levels VIH and VOH as
specified by the electrical characteristics.
“L” level Indicates low side voltage signal levels VIL and VOL as
specified by the electrical characteristics.
■Register description
Invalid bit : When read, a value of “1” is always obtained. Write operations are invalid.
R/W attribute : “R” indicates data can be read and “W” indicates data can be written.
Bit name
Invalid bit
A
ddress
R/W attribute
Register name
PBF PB1MOD PB0MOD
bit 3 bit 2 bit 1 bit 0
PBMOD (032H)
(R/W)

!

ML63611 User’s Manual
Contents
Contents – i
Contents
Chapter 1. Overview 1-1
1.1 Overview.....................................................................................................................................................1-1
1.2 Features.......................................................................................................................................................1-1
1.3 Mask Options..............................................................................................................................................1-5
1.4 Function List...............................................................................................................................................1-7
1.5 Block Diagram............................................................................................................................................1-8
1.6 Pin Configuration......................................................................................................................................1-12
1.6.1 ML63611 Pin Configuration...............................................................................................................1-12
1.7 Pin Descriptions........................................................................................................................................1-15
1.7.1 Descriptions of the Basic Functions of Each Pin ................................................................................1-15
1.7.2 Descriptions of the Secondary Functions of Each Pin.........................................................................1-19
1.7.3 Handling of Unused Pins.....................................................................................................................1-20
1.8 Basic Timing.............................................................................................................................................1-21
1.8.1 Basic Timing of CPU Operation.........................................................................................................1-21
1.8.2 Port I/O Basic Timing.........................................................................................................................1-21
1.8.3 Interrupt Basic Timing........................................................................................................................1-23
Chapter 2. CPU and Memory Spaces 2-1
2.1 Overview.....................................................................................................................................................2-1
2.2 Registers .....................................................................................................................................................2-1
2.2.1 Accumulator (A) ...................................................................................................................................2-1
2.2.2 Flag Register .........................................................................................................................................2-1
2.2.2.1 Carry Flag (C)..................................................................................................................................2-1
2.2.2.2 Zero Flag (Z) ...................................................................................................................................2-2
2.2.2.3 G Flag (G)........................................................................................................................................2-2
2.2.3 Master Interrupt Enable Flag (MIE)......................................................................................................2-2
2.2.4 Current Bank Register (CBR), Extra Bank Register (EBR), HL Register (HL), XY Register (XY)....2-3
2.2.5 Program Counter (PC)...........................................................................................................................2-4
2.2.6 RA Registers (RA3, RA2, RA1, RA0)..................................................................................................2-4
2.2.7 Stack Pointer (SP) and Call Stack.........................................................................................................2-5
2.2.8 Register Stack Pointer (RSP) and Register Stack..................................................................................2-6
2.3 Memory Spaces...........................................................................................................................................2-7
2.3.1 Program Memory Space........................................................................................................................2-7
2.3.2 Data Memory Space..............................................................................................................................2-8
Chapter 3. CPU Control Functions 3-1
3.1 Overview.....................................................................................................................................................3-1
3.2 System Reset Mode (RST)..........................................................................................................................3-2
3.2.1 Transfer to and State of System Reset Mode ........................................................................................3-2
3.3 Halt Mode...................................................................................................................................................3-4
3.3.1 Transfer to and State of Halt Mode.......................................................................................................3-4
3.3.2 Halt Mode Release................................................................................................................................3-5
3.3.2.1 Release of Halt Mode by Interrupt ..................................................................................................3-5
3.3.2.2 Release of Halt Mode by RESET Pin..............................................................................................3-5
3.3.3 Melody Data Interrupt and Halt Mode Release.....................................................................................3-6
3.3.4 Note Concerning HALT Instruction......................................................................................................3-6

ML63611 User’s Manual
Contents
Contents – ii
Chapter 4. Interrupt (INT) 4-1
4.1 Overview.....................................................................................................................................................4-1
4.2 Interrupt Registers.......................................................................................................................................4-3
4.3 Interrupt Sequence....................................................................................................................................4-11
4.3.1 Interrupt Processing.............................................................................................................................4-11
4.3.2 Return from an Interrupt Routine........................................................................................................4-12
4.3.3 Interrupt Hold Instructions..................................................................................................................4-12
Chapter 5. Clock Generator Circuit (OSC) 5-1
5.1 Overview.....................................................................................................................................................5-1
5.2 Clock Generator Circuit Configuration.......................................................................................................5-1
5.3 Low-Speed Clock Generator Circuit...........................................................................................................5-2
5.4 High-Speed Clock Generator Circuit..........................................................................................................5-3
5.5 System Clock Control.................................................................................................................................5-5
5.6 Frequency Control Register (FCON)..........................................................................................................5-6
5.7 System Clock Select Timing.......................................................................................................................5-7
Chapter 6. Time Base Counter (TBC) 6-1
6.1 Overview.....................................................................................................................................................6-1
6.2 Time Base Counter Configuration..............................................................................................................6-1
6.3 Time Base Counter Registers......................................................................................................................6-2
6.4 Time Base Counter Operation.....................................................................................................................6-2
Chapter 7. Timers (TIMER) 7-1
7.1 Overview.....................................................................................................................................................7-1
7.2 Timer Configuration ...................................................................................................................................7-1
7.3 Timer Registers...........................................................................................................................................7-3
7.4 Timer Operation........................................................................................................................................7-14
7.4.1 Timer Clock ........................................................................................................................................7-14
7.4.2 Timer Data Registers...........................................................................................................................7-14
7.4.3 Timer Counter Registers .....................................................................................................................7-14
7.4.4 Timer Interrupt Requests and Overflow Flags....................................................................................7-15
7.4.5 Auto-Reload Mode Operation.............................................................................................................7-16
7.4.6 Capture Mode Operation.....................................................................................................................7-18
7.4.7 Frequency Measurement Mode Operation..........................................................................................7-21
Chapter 8. 100 Hz Timer Counter (100HzTC) 8-1
8.1 Overview.....................................................................................................................................................8-1
8.2 100 Hz Timer Counter Configuration.........................................................................................................8-1
8.3 100 Hz Timer Counter Registers ................................................................................................................8-2
8.4 100 Hz Timer Counter Operation ...............................................................................................................8-3
Chapter 9. Watchdog Timer (WDT) 9-1
9.1 Overview.....................................................................................................................................................9-1
9.2 Watchdog Timer Configuration..................................................................................................................9-1
9.3 Watchdog Timer Control Register (WDTCON).........................................................................................9-2
9.4 Watchdog Timer Operation ........................................................................................................................9-2

ML63611 User’s Manual
Contents
Contents – iii
Chapter 10. Ports (INPUT, I/O PORT) 10-1
10.1 Overview...................................................................................................................................................10-1
10.2 Ports List...................................................................................................................................................10-1
10.3 Port 0 (P0.0–P0.3).....................................................................................................................................10-2
10.3.1 Port 0 Configuration............................................................................................................................10-2
10.3.2 Port 0 Registers ...................................................................................................................................10-2
10.3.3 Port 0 External Interrupt Function (External Interrupt 5)....................................................................10-5
10.4 Port A (PA.0–PA.3)..................................................................................................................................10-7
10.4.1 Port A Configuration...........................................................................................................................10-7
10.4.2 Port A Registers ..................................................................................................................................10-8
10.5 Port B (PB.0–PB.3).................................................................................................................................10-11
10.5.1 Port B Configuration.........................................................................................................................10-11
10.5.2 Port B Registers.................................................................................................................................10-12
10.5.3 Port B External Interrupt Function (External Interrupt 0).................................................................10-17
10.6 Port C (PC.0–PC.3).................................................................................................................................10-19
10.6.1 Port C Configuration.........................................................................................................................10-19
10.6.2 Port C Registers.................................................................................................................................10-20
10.6.3 Port C External Interrupt Function (External Interrupt 1).................................................................10-25
10.7 Port E (PE.0–PE.3) .................................................................................................................................10-27
10.7.1 Port E Configuration .........................................................................................................................10-27
10.7.2 Port E Registers.................................................................................................................................10-28
10.7.3 Port E.3 External Interrupt Function (External Interrupt 2)..............................................................10-31
Chapter 11. Melody Driver (MELODY) 11-1
11.1 Overview...................................................................................................................................................11-1
11.2 Melody Driver Configuration ...................................................................................................................11-1
11.3 Melody Driver Registers...........................................................................................................................11-2
11.4 Melody Circuit Operation.........................................................................................................................11-4
11.4.1 Tempo Data.........................................................................................................................................11-5
11.4.2 Melody Data........................................................................................................................................11-6
11.4.3 Melody Circuit Application Example .................................................................................................11-9
11.5 Buzzer Circuit Operation........................................................................................................................11-10
Chapter 12. Serial Port (SIO) 12-1
12.1 Overview...................................................................................................................................................12-1
12.2 Serial Port Configuration..........................................................................................................................12-1
12.3 Serial Port Registers..................................................................................................................................12-3
12.4 Serial Port Operation Description...........................................................................................................12-12
12.4.1 Data Format.......................................................................................................................................12-12
12.4.2 Send Operation Description ..............................................................................................................12-13
12.4.3 Receive Operation Description .........................................................................................................12-19
12.5 Send/Receive Data LSB/MSB First Select.............................................................................................12-25
12.5.1 Selecting Send Data LSB/MSB First ................................................................................................12-25
12.5.2 Selecting Receive Data LSB/MSB First............................................................................................12-26
Chapter 13. LCD Driver (LCD) 13-1
13.1 Overview...................................................................................................................................................13-1
13.2 LCD Driver Configuration........................................................................................................................13-2
13.3 LCD Driver Registers...............................................................................................................................13-7
13.4 LCD Driver Operation............................................................................................................................13-10
13.5 Output Port Selection by Mask Option...................................................................................................13-11
13.6 Bias Generator Circuit (BIAS)................................................................................................................13-12
13.7 LCD Driver Output Waveform...............................................................................................................13-17

ML63611 User’s Manual
Contents
Contents – iv
Chapter 14. Battery Low Detect Circuit (BLD) 14-1
14.1 Overview...................................................................................................................................................14-1
14.2 Battery Low Detect Circuit Configuration................................................................................................14-1
14.3 Judgment Voltage .....................................................................................................................................14-2
14.4 Battery Low Detect Circuit Register.........................................................................................................14-2
14.5 Battery Low Detect Circuit Operation......................................................................................................14-3
Chapter 15. Power Supply Circuit (POWER) 15-1
15.1 Overview...................................................................................................................................................15-1
15.1.1 Precautions in Using the Halver Circuit..............................................................................................15-1
15.2 Power Supply Circuit Related Register ....................................................................................................15-2
15.3 Power Supply Circuit Configuration.........................................................................................................15-3
15.3.1 OPTION A Power Supply Circuit Configuration................................................................................15-3
15.3.2 Operation of the OPTION A Power Supply Circuit............................................................................15-4
15.3.3 OPTION B Power Supply Circuit Configuration................................................................................15-5
15.3.4 Operation of the OPTION B Power Supply Circuit............................................................................15-6
15.3.5 OPTION C Power Supply Circuit Configuration................................................................................15-7
15.3.6 Operation of the OPTION C Power Supply Circuit............................................................................15-8
15.3.7 OPTION D Power Supply Circuit Configuration................................................................................15-9
15.3.8 Operation of the OPTION D Power Supply Circuit..........................................................................15-10
Chapter 16. A/D Converter (ADC) 16-1
16.1 Overview...................................................................................................................................................16-1
16.2 A/D Converter Configuration ...................................................................................................................16-2
16.3 Operation of A/D Converter .....................................................................................................................16-3
16.3.1 RC Oscillation Circuit.........................................................................................................................16-4
16.3.2 Counter A/B Reference Mode.............................................................................................................16-7
16.3.3 Example of Usage of A/D Converter................................................................................................16-11
16.3.4 RC Oscillation Monitor.....................................................................................................................16-17
16.4 Registers Related to A/D Converter........................................................................................................16-18
Appendixes
Appendix A List of Special Function Registers .................................................................................Appendix-1
Appendix B Input/Output Circuit Configuration................................................................................... Appendix-5
Appendix C Peripheral Circuit Examples.............................................................................................. Appendix-7
Appendix D Instruction List ................................................................................................................Appendix-11

Chapter 1
Overview

ML63611 User’s Manual
Chapter 1 Overview
1 – 1 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
1. Overview
1.1 Overview
The ML63611 is a CMOS 4-bit microcontroller using Oki’s original CPU core nX-4/250.
The ML63611 is provided with the mask options of eight items of selection including (1.5 V or 3.0 V) power
supply specifications and (With or Without) the regulator circuit for the LCD bias reference voltage.
When a 3.0 V power supply specificaiton is selected, the halver circuit can be used to decrease power
consumption. The halver circuit cannot be used when a 1.5 V power supply specification is selected.
When “With the regulator circuit for the LCD bias reference voltage” is selected, the LCD bias reference voltage
will be generated based on the output voltage of the regulator circuit. When “Without the regulator circuit for the
LCD bias reference voltage” is selected, the LCD bias reference voltage will be generated based on the power
supply voltage; for this reason, the LCD bias voltage decreases as the power supply voltage decreases, causing the
display density of the LCD panel to thin down.
The ML63611 has incorporated in it an 8K-word program memory, a 1K-nibble data memory, four input ports,
four output ports (only when the mask option of LCD driver pins is selected), 16 I/O ports, a melody circuit, a
serial port, four 8-bit timers, and a 64-segment LCD driver (60 segment lines and 4 common lines, max.). (A
part of the SEG pins can also be selected as output port pins or COM pins depending on the mask option.)
Note:
In this manual, for convenience of description, the symbols OPTION A, OPTION B, OPTION C, and OPTION D are
used in accordance with the mask option selection of a power supply specification (1.5 V or 3.0 V) and the regulator
circuit for the LCD bias reference voltage (With or Without), as shown below.
•OPTION A: 1.5 V power supply specification (halver circuit disabled), without the regulator circuit for the LCD
bias reference voltage
•OPTION B: 1.5 V power supply specification (halver circuit disabled), with the regulator circuit for the LCD bias
reference voltage
•OPTION C: 3.0 V power supply specification (halver circuit enabled), without the regulator circuit for the LCD
bias reference voltage
•OPTION D: 3.0 V power supply specification (halver circuit enabled), with the regulator circuit for the LCD bias
reference voltage
1.2 Features
The ML63611 has the following features.
a. Extensive instruction set
•407 instructions
Transfer, rotate, increment/decrement, arithmetic operations, compare, logic operations, mask
operations, bit operations, ROM table reference, stack operations, flag operations, jump, conditional
branch, call/return, control
b. Wide variety of addressing modes
•Indirect addressing mode for 4 types of data memory with current bank register, extra bank register, HL
register and XY register
•Data memory bank internal direct addressing mode
!

ML63611 User’s Manual
Chapter 1 Overview
1 – 2 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
c. Processing speed
•2 clocks per machine cycle, with most instructions executed in 1 machine cycle
•Minimum instruction execution time: 61 µs (@ 32.768 kHz system clock)
10 µs (@ 200 kHz system clock)
2.86 µs (@ 700 kHz system clock)
d. Clock generator circuit
•Low-speed clock:
Crystal oscillation (32.768 kHz)
•High-speed clock:
OPTION A, OPTION B: RC oscillation (200 kHz max.)
OPTION C, OPTION D: Ceramic oscillation or RC oscillation selected with software (700 kHz max.)
e. Program memory space
•8K words
•The basic instruction length is 16 bits per word.
f. Data memory space
•1024 nibbles
g. Stack level
•Call stack level: 16
•Register stack level: 16
h. Ports
Input port (Port 0.0 to Port 0.3):
Selectable as input with pull-up resistor/high-impedance input
Provided with the reset function that resets the system when there is a simultaneous key
depression of multiple bits (2, 3, or 4 bits).
Output port: Selectable as N-channel open drain output/CMOS output
Enabled only when the SEG pins (L32 to L35) are selected as the output port by the mask
option.
Input-output port (Port A.0 to Port A.3, Port B.0 to Port B.3, Port C.0 to Port C.3, Port E.0 to Port E.3):
Selectable as input with pull-up resistor/input with pull-down resistor/high-impedance input
Selectable as P-channel open drain output/N-channel open drain output/CMOS output/high-
impedance output
Number of ports: Input ports Output ports Input-output ports
Chip products 1 port ×4 bits 1 port ×4 bits 4 ports ×4 bits
(mask option)
i. Melody output
•Melody frequency: 529 Hz to 2979 Hz (@ 32.768 kHz)
•Tone length: 63 varieties
•Tempo: 15 varieties
•Melody data: Stored in program memory
•Buzzer driver signal output: 4 kHz (@ 32.768 kHz)

ML63611 User’s Manual
Chapter 1 Overview
1 – 3 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
j. LCD driver
Segment-type LCD drivers built-in
The following pin modes can be specified for L0 to L63 by the mask option generator setting. (Refer to the
“MOGTOOL Mask Option Generator User’s Manual”.)
“●” in the table below indicates that that particular function can be selected.
L0 to L3 L4 to L31 L32 to L35 L36 to L39 L40 to L63
SEG Pins ●● ●●●
COM Pins ●*1 — — ●*1 —
Output Port Pins — — ●*2 — —
*1 Can be selected as a COM pin in 1-bit unit (L0 to L3, L36 to L39). A maximum of four pins can
be selected as COM pins.
*2 Can be selected as an output port in 4-bit unit (L32 to L35).
N-channel open drain output or CMOS output can be specified for each bit.
Number of segments: 64 (60 SEG. ×4 COM. Max.)
Duty : 1/1 to 1/4 duty (fixed to 1/2 duty when at 1/2 bias)
Bias : Selectable as 1/2 or 1/3 bias
OPTION B, OPTION D: Regulator circuit used (0.95/1.90/2.85 V)
OPTION A, OPTION C: Regulator circuit not used (directly connected to the power
supply voltage (1.5/3.0/4.5 V))
Frame frequency : 64 Hz (at 1/1, 1/2, 1/4 duty), 85.3 Hz (at 1/3 duty)
Contrast : OPTION B, OPTION D: Adjustable up to 16 levels (in steps of 0.03 V)
OPTION A, OPTION C: Adjustment not available
Display modes : Selectable as all-ON mode/all-OFF mode/power down mode/normal display mode
k. RC oscillation type A/D converter
•2 channels (time sharing is used)
l. System reset function
•System reset by RESET pin (2 kHz sampling function provided)
•System reset that resets the system when the combined bits (2, 3, or 4 bits) of the input port (Port 0) are
all set to a “H” level
(Whether system reset is disabled or enabled, the number of bits to be combined, and the polarity can be
specified by mask option. Refer to the “MOGTOOL Mask Option Generator User’s Manual”.)
2 bits : P0.0, P0.1
3 bits : P0.0, P0.1, P0.2
4 bits : P0.0, P0.1, P0.2, P0.3
m. Battery check
•Applies to the OPTION C and OPTION D. Does not apply to the OPTION A and OPTION B.
•Function that detects battery low voltage
•Selection of judgment voltage by software (LD1 and LD0 bit settings of BLDCON)
LD1 LD0 Judgment voltage (V) Accuracy (V) Comments
0 0 1.8 ±0.1 ±0.1 Ta = 25°C
0 1 2.0 ±0.1 ±0.1 Ta = 25°C
1 0 2.4 ±0.1 ±0.1 Ta = 25°C
1 1 2.6 ±0.1 ±0.1 Ta = 25°C

ML63611 User’s Manual
Chapter 1 Overview
1 – 4 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
n. Timers, counters
•8-bit timer: 4 channels
Selectable as auto-reload mode, capture mode, clock frequency measurement mode
•Watchdog timer: 1 channel
•100 Hz timer: 1 channel
1/100 sec. measurement possible
•15-bit TBC: 1 channel
1 Hz, 2 Hz, 4 Hz, 8 Hz, 16 Hz, 32 Hz, 64 Hz, 128 Hz signals can be read
o. Serial port
•Mode: UART mode, synchronous mode
•Communication speed in UART mode: 1200 bps, 2400 bps, 4800 bps, 9600 bps
•Clock frequency in synchronous mode: 32.768 kHz (internal clock mode); external clock frequency
•Data length: 5 to 8 bits
p. Interrupt factors
•External interrupt (4 sources) : Selectable as rising edge/falling edge/both rising and falling edges
•Internal interrupt (14 sources) : Watchdog timer interrupt ×1
Melody end interrupt ×1
ADC interrupt ×1
Timer interrupt ×4
Serial port reception interrupt ×1
Serial port transmission interrupt ×1
1/100 timer (10 Hz) interrupt ×1
Time base interrupt ×4 (2, 4, 16, and 32 Hz)
q. Operating temperature
•–20 to +70°C
r. Power supply voltage
OPTION A, OPTION B (1.5 V versions): 1.3 to 1.7 V
Note: The operation will only be at the battery voltage and no voltage halver circuit can be used.
OPTION C, OPTION D (3.0 V versions): 1.8 to 3.6 V
Note: It is possible to select by software to use the output of the halver circuit as the power supply of
the voltage regulator circuit when the battery voltage is in the range 2.4 to 3.6 V, and to use the
battery voltage itself as the power supply of the voltage regulator circuit when the battery voltage
is in the range 1.8 to 2.4 V.
It is possible to detect whether the battery voltage is 2.4 V or 1.8 V using the BLD function.
• When the halver circuit is ON: 2.4 to 3.6 V
• When the halver circuit is OFF: 1.8 to 2.4 V
s. Supply current
•In the HALT mode, with the LCD display OFF, low-speed operation, and at normal temperature:
OPTION A (1.5 V power supply specification, without the regulator circuit for the LCD bias reference
voltage): Typ. 1.06 µA, 2.4 µA Max.
OPTION B (1.5 V power supply specification, with the regulator circuit for the LCD bias reference
voltage): Typ. 1.4 µA, 2.8 µA Max.
OPTION C (3.0 V power supply specification, without the regulator circuit for the LCD bias reference
voltage): Typ. 0.53 µA, 1.2 µA Max.
OPTION D (3.0 V power supply specification, with the regulator circuit for the LCD bias reference
voltage): Typ. 0.70 µA, 1.4 µA Max.
t. Packages available
Package Product name
Chip (116-pad) ML63611-xxxWA
(Here, ‘xxx’ denotes the code number.)

ML63611 User’s Manual
Chapter 1 Overview
1 – 5 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
1.3 Mask Options
There are eight items in the mask option of the ML63611.
Make the settings for the following items using the MOGTOOL mask option generator. Refer to the “MOGTOOL
Mask Option Generator User’s Manual” for details of the method of making the settings.
1) Selection of power supply voltage
Select a power supply specification for the power supply voltage to be used as either a 1.5 V power supply
specification (1.3 to 1.7 V) or a 3.0 V power supply specification (1.8 to 3.6 V).
Note:
When a 1.5 V power supply specification (OPTION A and OPTION B) is selected, the halver circuit and the battery
low detect circuit cannot be used.
2) Selection of the regulator circuit for the LCD bias reference voltage
Select the LCD bias reference voltage as either the output of the regulator circuit or the power supply
voltage.
Note:
When power is supplied from the battery:
When “Without the regulator circuit for the LCD bias reference voltage” is selected with the mask option, the LCD
bias reference voltage will be generated based on the power supply voltage. When a 1.5 V power supply
specification is selected, VDD1 will be the pin for the LCD bias reference voltage, and when a 3.0 V power supply
specification is selected, VDD2 will be the pin for the LCD bias reference voltage. In addition, the LCD bias voltage
will decrease as the power supply voltage decreases, causing the display density of the LCD panel to thin down.
When “With the regulator circuit for the LCD bias reference voltage” is selected, the display density will be kept
constant even if the battery voltage decreases.
3) Selection of the initial state of Port 0
Select the initial state of Port 0 as either “input with pull-down resistor” or “input with pull-up resistor”.
This selection determines the initial value of P0PUD (P0CON1).
Note:
This selection applies to all four bits and it is not possible to make this selection separately for each bit.
4) Selection of simultaneous key depression reset function of Port 0
Select the simultaneous key depression reset function and the number of bits (pins) that can be pressed
simultaneously.
The pins that are set according to the number of bits pressed simultaneously are fixed as follows:
2 bits: P0.0, P0.1; 3 bits: P0.0, P0.1, P0.2; 4 bits: P0.0, P0.1, P0.2, P0.3.
Note:
The system reset mode will be entered at the second falling edge of the 1 Hz signal.
5) Selection of MDB pin output voltage level
Select whether to make the output voltage level of the melody output pin (MDB: negative logic) either VDD
or VSS when the melody is OFF.
!
!
!
!

ML63611 User’s Manual
Chapter 1 Overview
1 – 6 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
6) SEG/COM/PORT/DATA selection of the LCD driver pins
It is possible to make the pins L0 to L3 and L36 to L39 either SEG pins or COM pins. However, it is a
maximum of four pins that can be selected as COM pins.
It is possible to make the pins L32 to L35 either SEG pins or output port pins.
The pins L4 to L31 and L40 to L63 are always SEG pins.
The segment register corresponding to the pins L0 to L63 can also be used as a DATA area.
Notes:
• When the selection is made as output port pins, the selection applies to all four bits.
• When the segment register is selected as the DATA area, the corresponding pins will still be outputting the
segment waveforms, and hence should be left open.
7) Selection of the register address and data of the LCD driver pins
The allocation of the register address and data is set for each LCD driver pin.
Note:
It is not possible to make multiple settings for the same address and the same bit.
8) Selection of whether or not to detect stoppage of low-speed clock oscillations
Select whether or not to detect stoppage of the low-speed clock oscillations and to transfer to the system reset
mode.
!
!

ML63611 User’s Manual
Chapter 1 Overview
1 – 7 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
1.4 Function List
Table 1-1 lists the functions of the ML63611. The solid black circles within the chart indicate that the product has
the particular function.
Table 1-1 Function List
Function Symbol OPTION A OPTION B OPTION C OPTION D Reference
page
Power supply voltage VDD 1.5 V (1.3 to 1.7 V) 3.0 V (1.8 to 3.6 V) —
STACK RAM 2-1
Call 16 levels 2-5
Register STACK 16 levels 2-6
Internal memory 2-7
Program memory ROM 8160 (×16 bits) 2-7
Data memory RAM 1024 (×4 bits) 2-8
System reset generation circuit RST 2 kHz sampling function, simultaneous key depression reset function of Port 0, detection of stoppage of the low-
speed clock oscillations 3-2
Interrupt INT External: 4 sources; internal: 14 sources 4-1
Clock generator circuit 5-1
Crystal oscillation circuit (32.768 kHz)
Low-speed clock XT 32.768 kHz 5-2
RC oscillation circuit, ceramic oscillation circuit
High-speed clock OSC 200 kHz max. 700 kHz max. 5-3
Time base counter TBC 15 bits ×1 ch 6-1
Timer TIMER 8 bits ×4 ch 7-1
100 Hz timer counter 100HzTC 1 ch 8-1
Watchdog timer WDT 1 ch 9-1
Port 10-1
Input-only port INPUT PORT 1 port ×4 bits —
Port 0 P0 4 bits (P0.0, P0.1, P0.2, P0.3) 10-2
Output-only port OUTPUT PORT 1 port ×4 bits (selectable by mask option) —
Port LP LP0 4 bits (LP0.0, LP0.1, LP0.2, LP0.3) 13-9
Input-output port I/O PORT 4 ports ×4 bits —
Port A PA 4 bits (PA.0, PA.1, PA.2, PA.3) 10-7
Port B PB 4 bits (PB.0, PB.1, PB.2, PB.3) 10-11
Port C PC 4 bits (PC.0, PC.1, PC.2, PC.3) 10-19
Port E PE 4 bits (PE.0, PE.1, PE.2, PE.3) 10-27
Melody driver MELODY 529 to 2979 Hz 11-1
Serial port SIO Asynchronous (UART) or synchronous 12-1
LCD driver LCD 64 segments (60 seg. by 4 com.) 13-1
Segment register SEGREG 256 ×4 bits 13-10
Bias generator circuit BIAS 1/2 or 1/3 bias 13-12
Battery low detect circuit BLD — — 1.8 V, 2.0 V, 2.4 V, 2.6 V 14-1
Power supply circuit (POWER) 15-1
Halver circuit V/H — — ●● 15-1
Voltage regulator circuit 15-1
For internal logic circuits V/R1 ●●●● 15-1
For low-speed oscillation V/R2 ●●●● 15-1
For LCD bias generation
reference V/R3 — ●—●15-1
A/D converter ADC 2 channels, of RC oscillation type 16-1

ML63611 User’s Manual
Chapter 1 Overview
1 – 8 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
1.5 Block Diagram
Block diagrams of the ML63611 are shown in Figures 1-1, 1-2, 1-3 and 1-4.
Asterisks (*) indicate port secondary functions.
CPU CORE : nX-4/250
TIMING
CON-
TROL
CBR
EBR
HL
XY
RA
MIE
A
INSTRUCTION
DECODER IR
BUS
CON-
TROL
ROM
(8 KW)
SP
RSP
CG Z
STACK
CAL.S:16 levels
REG.S:16 levels
PC
A
LU
RAM
(1 KN)
INT
TBC
RST
TST
XT0
XT1 XT
RESET
TM0CAP/TM1CAP*
TIMER
(8-bit, 4ch) TM0OVF/TM1OVF*
T02CK*
T13CK*
SIO
(Sync/Async)
RXC*
TXC*
MELODY MD
INT
4
TXD*
LCD
&
DSPR L0 to L63
INT
4
TST2
DATA BUS
WDT
INT
1
TST1 MDB
100HzTC
INT
1
BIAS
VSS
INPUT
PORT
INT
1P0.0 to P0.3
I/O
PORT
INT
3
INT
1
INT
2
V/H
PA.0 to PA.3
PB.0 to PB.3
VDD3
VDD2
VDD1
C1
C2
(open) VHF
(open) HC1
(open) HC2
V/R2
VCH
V/R1
OSC0
OSC1 OSC
TBCCLK*
OUTPUT
PORT LP0.0 to LP0.3
(mask option of LCD
segments)
RXD*
PC.0 to PC.3
PE.0 to PE.3
A
DC
RT0
CRT0
RS0
CS0
IN0
RT1
RS1
CS1
IN1
INT
1
MON*
HSCLK*
VDD
Figure 1-1 OPTION A Block Diagram

ML63611 User’s Manual
Chapter 1 Overview
1 – 9 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
Asterisks (*) indicate port secondary functions.
CPU CORE : nX-4/250
TIMING
CON-
TROL
CBR
EBR
HL
XY
RA
MIE
A
INSTRUCTION
DECODER IR
BUS
CON-
TROL
ROM
(8 KW)
SP
RSP
CG Z
STACK
CAL.S:16 levels
REG.S:16 levels
PC
A
LU
RAM
(1 KN)
INT
TBC
RST
TST
XT0
XT1 XT
RESET
TM0CAP/TM1CAP*
TIMER
(8-bit, 4ch) TM0OVF/TM1OVF*
T02CK*
T13CK*
SIO
(Sync/Async)
RXC*
TXC*
MELODY MD
INT
4
TXD*
LCD
&
DSPR L0 to L63
INT
4
TST2
DATA BUS
WDT
INT
1
TST1 MDB
100HzTC
INT
1
BIAS
VSS
INPUT
PORT
INT
1P0.0 to P0.3
I/O
PORT
INT
3
INT
1
INT
2
V/H
PA.0 to PA.3
PB.0 to PB.3
VDD3
VDD2
VDD1
C1
C2
(open) VHF
(open) HC1
(open) HC2
V/R2
VCH
V/R3
V/R1
OSC0
OSC1 OSC
TBCCLK*
OUTPUT
PORT LP0.0 to LP0.3
(mask option of LCD
segments)
RXD*
PC.0 to PC.3
PE.0 to PE.3
A
DC
RT0
CRT0
RS0
CS0
IN0
RT1
RS1
CS1
IN1
INT
1
MON*
HSCLK*
VDD
Figure 1-2 OPTION B Block Diagram

ML63611 User’s Manual
Chapter 1 Overview
1 – 10 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
Asterisks (*) indicate port secondary functions.
CPU CORE : nX-4/250
TIMING
CON-
TROL
CBR
EBR
HL
XY
RA
MIE
A
INSTRUCTION
DECODER IR
BUS
CON-
TROL
ROM
(8 KW)
SP
RSP
CG Z
STACK
CAL.S:16 levels
REG.S:16 levels
PC
A
LU
RAM
(1 KN)
INT
TBC
RST
TST
XT0
XT1 XT
RESET
TM0CAP/TM1CAP*
TIMER
(8-bit, 4ch) TM0OVF/TM1OVF*
T02CK*
T13CK*
SIO
(Sync/Async)
RXC*
TXC*
MELODY MD
INT
4
TXD*
LCD
&
DSPR L0 to L63
INT
4
TST2
DATA BUS
BLD
WDT
INT
1
TST1 MDB
100HzTC
INT
1
BIAS
VSS
INPUT
PORT
INT
1P0.0 to P0.3
I/O
PORT
INT
3
INT
1
INT
2
V/H
PA.0 to PA.3
PB.0 to PB.3
VDD3
VDD2
VDD1
C1
C2
VHF
HC1
HC2
V/R2
VCH
V/R1
OSC0
OSC1 OSC
TBCCLK*
OUTPUT
PORT LP0.0 to LP0.3
(mask option of LCD
segments)
RXD*
PC.0 to PC.3
PE.0 to PE.3
A
DC
(use/nonuse
selected by
software)
RT0
CRT0
RS0
CS0
IN0
RT1
RS1
CS1
IN1
INT
1
MON*
HSCLK*
Figure 1-3 OPTION C Block Diagram

ML63611 User’s Manual
Chapter 1 Overview
1 – 11 OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
Asterisks (*) indicate port secondary functions.
CPU CORE : nX-4/250
TIMING
CON-
TROL
CBR
EBR
HL
XY
RA
MIE
A
INSTRUCTION
DECODER IR
BUS
CON-
TROL
ROM
(8 KW)
SP
RSP
CG Z
STACK
CAL.S:16 levels
REG.S:16 levels
PC
A
LU
RAM
(1 KN)
INT
TBC
RST
TST
XT0
XT1 XT
RESET
TM0CAP/TM1CAP*
TIMER
(8-bit, 4ch) TM0OVF/TM1OVF*
T02CK*
T13CK*
SIO
(Sync/Async)
RXC*
TXC*
MELODY MD
INT
4
TXD*
LCD
&
DSPR L0 to L63
INT
4
TST2
DATA BUS
BLD
WDT
INT
1
TST1 MDB
100HzTC
INT
1
BIAS
VSS
INPUT
PORT
INT
1P0.0 to P0.3
I/O
PORT
INT
3
INT
1
INT
2
V/H
PA.0 to PA.3
PB.0 to PB.3
VDD3
VDD2
VDD1
C1
C2
VHF
HC1
HC2
V/R2
VCH
V/R3
V/R1
OSC0
OSC1 OSC
TBCCLK*
OUTPUT
PORT LP0.0 to LP0.3
(mask option of LCD
segments)
RXD*
PC.0 to PC.3
PE.0 to PE.3
A
DC
(use/nonuse
selected by
software)
RT0
CRT0
RS0
CS0
IN0
RT1
RS1
CS1
IN1
INT
1
MON*
HSCLK*
Figure 1-4 OPTION D Block Diagram