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  9. ON Semiconductor MT9J003 User manual

ON Semiconductor MT9J003 User manual

©Semiconductor Components Industries, LLC, 2016
July, 2016 −Rev. 0
1Publication Order Number:
EVBUM2419/D
MT9J003I12STCVH-GEVB
MT9J003 Evaluation Board
User's Manual
Evaluation Board Overview
The evaluation boards are designed to demonstrate the features of
ON Semiconductor’s image sensors products. This headboard is
intended to plug directly into the Demo 2X system. Test points and
jumpers on the board provide access to the clock, I/Os, and other
miscellaneous signals.
Features
•Clock Input
♦Default – 10 MHz Crystal Oscillator
♦Optional Demo 2X Controlled MClk
•Two Wire Serial Interface
♦Selectable Base Address
•Parallel Interface
•HiSPi (High Speed Serial Pixel) Interface
•ROHS Compliant
+1V8_SOC
OSC_CLK
I2C
SOC_EXTCLK
Figure 2. Block Diagram of MT9J003I12STCVH−GEVB
Reset
Supervisor
Demo2 VF
(HiSPi)
EPROM
Jumper
AND Gate
OSC
Socket
Level Shifter
RJ45 HiSPi
Power
Supply
+3V3_HiSPi
+3V3_SERIAL
+2V8_PLL
+2V8_PLL
+VDDIO_SOC
+VDDIO_PERIPH
+0V4
+2V8_VAAPIX +5VD_BUS
SOC_RST_L SYS_RST_L
IMAGE
SOC_EXTCLK
IMAGE
DEMO2_RST_L
DEMO2_MCLK
I2C
Block Diagram
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EVAL BOARD USER’S MANUAL
Figure 1. MT9J003 Evaluation Board
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Top View
Figure 3. Top View of Evaluation Board −Default Jumpers
+2V8_PLL JP6
+VDDIO_SOC JP5
GPIOs J6
TEST J8
CLK_SELECT JP1
EEPROM ADDR SW1
RESET SW2
ATEST J7
+2V8_VAAPIX JP4
+2V8_VAA JP2
+1V8_SOC JP3
SHUTTER J5
ON_LED SW3
+VPP J4
Bottom View
Baseboard Connector P2
Baseboard Connector P1
Figure 4. Bottom View of the Evaluation Board −Connectors
HiSPi Connector J50
HiSPi Connector J51
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Jumper Pin Locations
The jumpers on headboards start with Pin 1 on the leftmost
side of the pin. Grouped jumpers increase in pin size with each
jumper added.
Figure 5. Pin Locations for a Single Jumper.
Pin 1 is Located at the Leftmost Side and Increases as it Moves to the Right
Pin 1 Pins 1−4
Figure 6. Pin Locations and Assignments of Grouped Jumpers.
Pin 1 is Located at the Top-Left Corner and Increases in a Zigzag Fashion Shown in the Picture
Pins 1 and 2
Pins 3 and 4
Pins 5 and 6
Pins 7 and 8
Pins 9 and 10
Pin 1
Figure 7. EEPROM Switches in their Defaults Positions. The First Switch (A0) of SW1 is ON,
the Second Switch(A1) is ON, the Third switch (A2) is OFF, and the Fourth Switch (WP) is ON
A0
A1
A2
WP
Jumper/Header Functions & Default Positions
Table 1. JUMPERS AND HEADERS
Jumper/Header No. Jumper/Header Name Pins Description
JP1 CLK_SELECT 1−2 (Default) Connects to on-board oscillator
2−3Connects to external clock from Demo 2X board
JP2 +2V8_VAA 1−2 (Default) Connects to on-board +2V8_VAA power supply
2−3Connection to external power supply
JP3 +1V8_SOC 1−2 (Default) Connects to on-board +1V8_SOC power supply
2−3Connection to external power supply
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Table 1. JUMPERS AND HEADERS (continued)
Jumper/Header No. DescriptionPinsJumper/Header Name
JP4 +2V8_VAAPIX 1−2 (Default) Connects to on-board +2V8_VAAPIX power supply
2−3Connection to external power supply
JP5 +VDDIO_SOC 1−2 (Default) Connects to on-board +VDDIO_SOC power supply
2−3Connection to external power supply
JP6 +2V8_PLL 1−2 (Default) Connects to on-board +2V8_PLL power supply
2−3Connection to external power supply
J4 +VPP Open (Default) Connects to external +VPP power supply for OTPM
J5 SHUTTER Open (Default) Connects to external shutter
J6 GPIOs Open (Default) Connects to various sensor’s settings
J7 ATEST Open (Default) For debug/test
J8 TEST 2−3 (Default) Normal operation
1−2Test mode
SW1 EEPROM ADDR P24 Open,
P23 Closed,
P27 Closed
(Default)
EEPROM Address set to 0xA8
P24 Open,
P23 Open,
P27 Closed
EEPROM Address set to 0xAC
P24 Closed,
P23 Open,
P27 Closed
EEPROM Address set to 0xA4
P24 Closed,
P23 Closed,
P27 Closed
EEPROM Address set to 0xA0
SW2 RESET N/A When pushed, 200 ms reset signal will be sent to
MT9J003
SW3 ON_LED On (Default) Turns on +5V LED indicator
Off Turns off +5V LED indicator
Interfacing to ON Semiconductor Demo 2X Baseboard
The ON Semiconductor Demo 2X baseboard has a
similar 26-pin connector and 13-pin connector which mate
with P1 and P2 of the headboard. The four mounting holes
secure the baseboard and the headboard with spacers and
screws.
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1
onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A
listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
The evaluation board/kit (research and development board/kit) (hereinafter the “board”) is not a finished product and is not available for sale to consumers. The board is only intended
for research, development, demonstration and evaluation purposes and will only be used in laboratory/development areas by persons with an engineering/technical training and familiar
with the risks associated with handling electrical/mechanical components, systems and subsystems. This person assumes full responsibility/liability for proper and safe handling. Any
other use, resale or redistribution for any other purpose is strictly prohibited.
THE BOARD IS PROVIDED BY ONSEMI TO YOU “AS IS” AND WITHOUT ANY REPRESENTATIONS OR WARRANTIES WHATSOEVER. WITHOUT LIMITING THE FOREGOING,
ONSEMI (AND ITS LICENSORS/SUPPLIERS) HEREBY DISCLAIMS ANY AND ALL REPRESENTATIONS AND WARRANTIES IN RELATION TO THE BOARD, ANY
MODIFICATIONS, OR THIS AGREEMENT, WHETHER EXPRESS, IMPLIED, STATUTORY OR OTHERWISE, INCLUDING WITHOUT LIMITATION ANY AND ALL
REPRESENTATIONS AND WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, NON−INFRINGEMENT, AND THOSE ARISING FROM A
COURSE OF DEALING, TRADE USAGE, TRADE CUSTOM OR TRADE PRACTICE.
onsemi reserves the right to make changes without further notice to any board.
You are responsible for determining whether the board will be suitable for your intended use or application or will achieve your intended results. Prior to using or distributing any systems
that have been evaluated, designed or tested using the board, you agree to test and validate your design to confirm the functionality for your application. Any technical, applications or
design information or advice, quality characterization, reliability data or other services provided by onsemi shall not constitute any representation or warranty by onsemi, and no additional
obligations or liabilities shall arise from onsemi having provided such information or services.
onsemi products including the boards are not designed, intended, or authorized for use in life support systems, or any FDA Class 3 medical devices or medical devices with a similar
or equivalent classification in a foreign jurisdiction, or any devices intended for implantation in the human body. You agree to indemnify, defend and hold harmless onsemi, its directors,
officers, employees, representatives, agents, subsidiaries, affiliates, distributors, and assigns, against any and all liabilities, losses, costs, damages, judgments, and expenses, arising
out of any claim, demand, investigation, lawsuit, regulatory action or cause of action arising out of or associated with any unauthorized use, even if such claim alleges that onsemi was
negligent regarding the design or manufacture of any products and/or the board.
This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC,
CE or UL, and may not meet the technical requirements of these or other related directives.
FCC WARNING – This evaluation board/kit is intended for use for engineering development, demonstration, or evaluation purposes only and is not considered by onsemi to be a finished
end product fit for general consumer use. It may generate, use, or radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant
to part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment may cause interference with radio
communications, in which case the user shall be responsible, at its expense, to take whatever measures may be required to correct this interference.
onsemi does not convey any license under its patent rights nor the rights of others.
LIMITATIONS OF LIABILITY: onsemi shall not be liable for any special, consequential, incidental, indirect or punitive damages, including, but not limited to the costs of requalification,
delay, loss of profits or goodwill, arising out of or in connection with the board, even if onsemi is advised of the possibility of such damages. In no event shall onsemi’s aggregate liability
from any obligation arising out of or in connection with the board, under any theory of liability, exceed the purchase price paid for the board, if any.
The board is provided to you subject to the license and other terms per onsemi’s standard terms and conditions of sale. For more information and documentation, please visit
www.onsemi.com.
PUBLICATION ORDERING INFORMATION
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800−282−9855 Toll Free USA/Canada
Phone: 011 421 33 790 2910
LITERATURE FULFILLMENT:
Email Requests to: [email protected]
onsemi Website: www.onsemi.com
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
◊
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