Panasonic KX-T7456 - Digital 24 Button Speakerphone... User manual

ORDERNO. KMS0104564C1
F5
DIGITALPROPRIETARYTELEPHONE
KX-T7456 / KX-T7456B
White Version
Black Version
(for U.S.A.)
SPECIFICATIONS
1

2001 Kyushu Matsushita ElectricIndustrial Co., Ltd. All rights
reserved. Unauthorized copying and distribution isaviolation of
law.
1. CAUTION
Note:
Whenyou note the serial number, write downall 11 digitals.
The serial numbermaybe found on the bottomof the unit.
2. FOR SERVICE TECHNICIANS
1. Note the following items when exchanging the LEDs(Ref. No.
2

D100-130, D201, D202) of MainBoard, LCD Board.
1) Donot reuse aLEDwhich isremoved from the P.C. Board.
2) Use asoldering iron (less than 15 W) for exchanging LED.
3) Donot heat the LEDfor more than 2seconds.
4) Donot move the LEDafter soldering.
2. Thisunitemploysthe switch which isinfluenced bythe light for
the hook switch.
When you open the cabinet to repairthe unitinthe bright light,
the hook switch might work improperly.
Therefore, take care not to shine the hook switch directly, or use
the jigas shownbelow.
3. LOCATION OF CONTROLS
3

4. DISASSEMBLY INSTRUCTIONS
4.1. HOWTO REMOVE THELOWERCABINET
(Procedure 1)
4

(1) Remove the 4 screws A.
(2) Remove the lowercabinet.
4.2. HOWTO REMOVE THEHOOKBUTTON
(Procedure 1 2)
(1) Remove the hook button.
4.3. HOWTO REMOVE THESWITCH AND MAINBOARDS
(Procedure 1 2 3)
5

(1) Remove the screws A.
(2) Pull out the switchboardconnector.
(3) Remove the switchboard.
(4) Pull out the flat cable. (See Fig. 1)
(5) Remove the 2 screws B.
(6) Pull out the speakerand microphone connectors.
(7) Remove the mainboard.
4.4. HOWTO REMOVE THELCD BOARD
(Procedure 1 4)
6

(1) Pull out the flat cable. (See Fig. 1)
(2) Remove the LCD block. (See Fig. 2)
(3) Remove the 2 screws A.
(4) Remove the lowercabinet.
(5) Remove the LCD board.
7

5. IC DATA
5.1. IC1
8

Name Pin Dir. Pull Up Type Io Act. Block MHz
Descriptions
DB3 2 bidir --- TTL 8.0mA high PT5B03 2.0 Data Bus [3]
DB2 3 bidir --- TTL 8.0mA high PT5B03 2.0 Data Bus [2]
DB1 4 bidir --- TTL 8.0mA high PT5B03 2.0 Data Bus [1]
DB0 5 bidir --- TTL 8.0mA high PT5B03 2.0 Data Bus [0]
ADR1 6 input 12-38k TTL --- high PT5D01U 2.0 Address Bus [1]
ADR0 7 input 12-38k TTL --- high PT5D01U 2.0 Address Bus [0]
CSN 8 input --- TTL --- low PT5D01 1.0 ChipSelect
REN 10 input 12-38k TTL --- low PT5D01U 2.0 ReadEnable
Command
WEN 9 input 12-38k TTL --- low PT5D01U 2.0 Write Enable
Command
RST 63 input --- CMOS
schmidt --- high PC5D21 0.01 Asynchronous
Reset
INT0N 11 output --- CMOS 2.0mA low PC5O01 0.01 Interrupt Request
INT1N 12 output --- CMOS 2.0mA low PC5O01 0.01 Interrupt Request
DR0 38 input --- CMOS --- low PC5D01 0.6 Dpits Receive
Data
DR1 39 input --- CMOS --- low PC5D01 0.6 Dpits Receive
Data
DX0 40 output --- CMOS 4.0mA low PC5O02 0.6 Dpits Transmit
Data
DX1 41 output --- CMOS 4.0mA low PC5O02 0.6 Dpits Transmit
Data
CK512K 37 output --- CMOS 2.0mA high PC5O01 0.6 Dpits Bit Rate
Clock
SR0 19 input 12-38k TTL --- high PT5D01U 0.1 Serial Receive
Data
Stream[0]
SR1 20 input 12-38k TTL --- high PT5D01U 0.1 Serial Receive
Data
Stream[1]
SX 21 output --- CMOS 4.0mA high PC5O02 0.1 Serial Transmit
Data
Stream
CK2M 18 output --- CMOS 4.0mA high PC5O02 2.1 Serial Stream
Clock
EP0 13 output --- CMOS 2.0mA high PC5O01 0.01 External Channel
Pulse
EP1 14 output --- CMOS 2.0mA high PC5O01 0.01 External Channel
Pulse
EP2 15 output --- CMOS 2.0mA high PC5O01 0.01 External Channel
Pulse
EP3 16 output --- CMOS 2.0mA high PC5O01 0.01 External Channel
Pulse
PI 61 input --- CMOS
schmidt --- high PC5D21 0.01 RotaryEncoder
Input
[Pos]
NI 62 input --- CMOS
schmidt --- high PC5D21 0.01 RotaryEncoder
Input
[Neg]
CLM0 43 output --- CMOS 4.0mA high PC5O02 0.01 LED Column
Drive
CLM1 44 output --- CMOS 4.0mA high PC5O02 0.01 LED Column
Drive
CLM2 45 output --- CMOS 4.0mA high PC5O02 0.01 LED Column
Drive
CLM3 46 output --- CMOS 4.0mA high PC5O02 0.01 LED Column
Drive
CLM4 47 output --- CMOS 4.0mA high PC5O02 0.01 LED Column
Drive
CLM5 48 output --- CMOS 4.0mA high PC5O02 0.01 LED Column
Drive
NROW0 50 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
0]
NROW1 51 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
1]
NROW2 52 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
2]
NROW3 53 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
3]
NROW4 54 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
4]
9

NROW5 55 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
5]
NROW6 56 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
6]
NROW7 57 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
7]
NROW8 58 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
8]
NROW9 59 output --- CMOS 4.0mA low PC5O02 0.01 LED RowDrive [
9]
IP0 27 input 12-38k CMOS --- high PC5D01U 0.01 Input Port [0]
IP1 28 input 12-38k CMOS --- high PC5D01U 0.01 Input Port [1]
IP2 29 input 12-38k CMOS --- high PC5D01U 0.01 Input Port [2]
IP3 30 input 12-38k CMOS --- high PC5D01U 0.01 Input Port [3]
OP0 23 output CMOS 4.0mA high PC5O02 0.01 Output Port [0]
OP1 24 output CMOS 4.0mA high PC5O02 0.01 Output Port [1]
OP2 25 output CMOS 4.0mA high PC5O02 0.01 Output Port [2]
OP3 26 output CMOS 4.0mA high PC5O02 0.01 Output Port [3]
CK2K 22 output CMOS 4.0mA high PC5O02 0.20 2kHz Clock
Output
25%)
CK16M 36 output --- CMOS 2.0mA high PC5O01 16.4 MasterClock Out
OSI 33 input --- Analog --- --- PC5X02 16.4 X'tal In(XIN)
OSO 34 output --- Analog --- --- PC5X02 16.4 X'tal Out (XOUT)
N.C. 32 not used
N.C. 42 not used
N.C. 60 not used
VDD1 1 vdd Vdd (5V)
VDD2 31 vdd Vdd (5V)
VDD3 49 vdd Vdd (5V)
VSS1 17 vss Vss (GND)
VSS2 35 vss Vss (GND)
VSS3 64 vss Vss (GND)
5.2. IC2
10

11

Name NO. I/O Classification Function
APMP 1 Analog
input Analog Non-invering input terminal of microphone amplifier
M1.
Connect tothe microphone.
VREFDA 2 --- Power
supply, etc. Reference voltage teminal of DAC.
Connect the capacitorof 40 Fbetweenthis
terminal
(AG2).
AG1 3 Ground terminal of the analog circuit.
HO+ 4Analog
output Analog Output terminal forthe handset receiver. HO+ terminal and HO- terminal are biasedtoVdd/2
voltage.
HO- terminal is the inverse poralityoutput terminal for
pin
+).
Connect the capacitorinseries betweenthe handset
and
terminals tocut the DC.
Use the nonpolartype capacitor.
HO- 5
A5V1 6 --- Power
supply, etc. 5V powersupplyterminal of analog circuit.
A5V2 7
SPO 8 Analog
output Analog Output treminal forthe speakeramplifier. Connect tothe external speakeramplifierinput
terminal.
SPO terminal is biasedtoVdd/2 voltage.
Connect the capacitorof 0.1 Finseries between
the
speakeramplifierinput terminal and this terminal.
AG2 9 --- Power
supply, etc. Ground terminal of the analog circuit.
P/-S 10 CMOS
inout Micro- computer
interface
Mode selection terminal of microcomputerinterface.
Inputting “0“ selects the serial mode, and “1“ selects
the
parallel mode.
-RESET 11 Systemreset terminal.
The systemis reset when“0“ is pressed.
DG1 12 --- Power
supply, etc. Ground terminal of the analog circuit.
OP0 13 3 states
output Output port Outputs BIT0 signal of OPORT1 resistor.
OP1 14 Outputs BIT1 signal of OPORT1 resistor.
D5V1 15 --- Power
supply, etc. 5V powersupplyterminal of analog circuit.
OP2 16 3 states
output
Output
Outputs BIT2 signal of OPORT1 resistor.
OP3 17 Outputs BIT3 signal of OPORT1 resistor.
OP4 18 Outputs BIT4 signal of OPORT1 resistor.
OP5 19 Outputs BIT5 signal of OPORT1 resistor.
OP6 20 Outputs BIT6 signal of OPORT1 resistor.
OP7 21 Outputs BIT7 signal of OPORT1 resistor.
12

RXD 22 TTL
input
PCM
interface
Input terminal forPCM data
TXD 23 Output Output terminal forPCM data
-FSYNC 24 TTL
input Input terminal of Sync. signal forPCM interface. The
frequency
of input sync.
signal is 8 kHz.
BCLK 25 Input terminal of shift clock pulse forPCM deta. Input
pulse
frequencyrenge is 64 kHz~2.048 kHz.
PCM data (TXD termianl signal) is output st the
positive
PCM data (RXD terminal signal) is sampledat the
negative
The sameling is performedinside LSI.
MCLK 26 Output Clock Clock pulse output terminal. Output pulse frequency
is
6.144MHz.
Systemreset (inputting “0” to-RESETterminal)
doesn’t
this output.
CLKO 27 Clock pulse output terminal whichhas selective
frequencies.
The following 4 frequencies canbe selectedby
resistor
12.228, 4.096, 2.048, 1.536 (MHz).
Systemreset (inputting “0” to-RESETterminal)
selects
frequencyof 1.536MHz and doesn’t stop this output.
DG2 28 --- Power
supply, etc. Ground terminal of digital circuit.
OSCI 29 --- Clock Input terminal of oscillation circuit.
Connect the oscillatorand resistorberweenthis
terminal
pin30 (OSCO), moreover, connect the capacitor
between
terminal and digital ground tomake the oscillation
circuit.
OSCO 30 --- Output terminal of oscillation circuit.
Connect the oscillatorand resistorberweenthis
terminal
pin29 (OSCI), moreover, connect the capacitor
between
terminal and digital ground tomake the oscillation
circuit.
D5V2 31 --- Power
supply, etc. 5V powersupplyterminal of digital circuit.
-INT 44 Output Micro-
computer
interface
Outputs 8 kHz clock pulse whichis synchronizedwith
-
TEST 45 CMOS
input Power supply, etc. Test terminal Connect tothe digital ground.
A5V3 46 --- 5V powersupplyterminal of analog circuit.
HI 47 Analog
input Analog Input terminal of TX handset signal. Eitherthis signal orthe signal suppliedtopin49 (HI)
is
AD converter.
VBB 48 --- Power
supply, etc. Reference voltage terminal of AD converter.
Connect the capacitorof 10 FbetweenVBB
termunal
50 (AG3).
13

MI 49 Analog
input Analog Input terminal of TX microphone signal. Eitherthis signal orthe signal suppliedtopin47 (HI)
is
AD converter.
AG3 50 --- Power
supply, etc. Ground terminal of analog circuit. A5V4 51 5V powerterminal of analog circuit.
AP2HO 52 Analog
output
Analog
Output terminal of microphone amplofierH2.
Connect the capacitorof 0.1 Ftothis terminal to
cut
AP2HI 53 Analog
input Inverting input terminal of microphone amplofierH2.
Connect the capacitorof 0.1 Ftothis terminal to
cut
AP1HO 54 Analog
output Output terminal of microphone amplofierH1.
Connect the capacitorof 0.1 Ftothis terminal to
cut
AP1HN 55 Analog
input Inverting input terminal of microphone amplofierH1. Connect tothe handset.
AP1HP 56 Analog
input Analog Non-inverting input terminal of microphone amplofier
H1.
VREFM 57 --- Power
supply, etc. Reference voltage terminal of microphone amplifier.
Connect the capacitorof 40 Fbetweenthis
terminal
56 (MCG).
AG4 58 Ground terminal of the analog circuit.
APMO 59 Analog
input
Analog
Output terminal of microphone amplifier.
Connect the capacitorof 0.1 Ftothis terminal to
cut
APMN 60 Analog
input Non-inverting input terminal of microphone amplofier
M.
5.3. IC5
14

15

Classification Terminal PinNo. Input/
Output Function
Power
supply Vcc 59 --- Powersupplyterminal
GND 8 --- Ground terminal
Test 2 Input Not the user’s terminal. Connect tothe Vcc
terminal.
Reset RESET 5 Input Reset terminal forMCU.
Oscillation OSC1 3 Input Input/output terminal tothe mainoscillator.
Connect
the ceramic oscillator, crystal oscillator, or
external
oscillation circuit.
OSC2 4 Output
X1 6 Input Input/output terminal tothe sub oscillator.
Connect
the 32.768kHz crystal oscillator. If not, fix X1
terminal
Vcc and openX2 terminal.
X2 7 Output
ResetTestPort
D0~D5
D9~D11 9~17 Input/
output Input/output terminal whichis adressedevery
1
The terminal D0~D3 are the source large
current
output terminal, whichsupplies the current of
max.
10mA toeachterminal.
The terminal D4, D5, D9~D11 are sink iarge
current
output terminal, whichsupplies the current of
max.
15mA toeachterminal.
D12, D13 18, 19 Input Input terminal whichis adressedevery1 bit.
R00,~R43
R60,~RA1 20~57 Input/
output Input/output terminal whichis adressedevery
4
RB0~2,
RD0~1,
RE0
60~64, 1 Input Input terminal whichis adressedevery4 bit.
Interrupt
INT2 ~
INT4,
19~23 Input Input terminal forexternal interrupt.
Stop clear 18 Input Input terminal usedforthe transferfromstop
mode
active mode
Serial
interface 37 Input/
output Clock input/output terminal forserial
interface.
SI1 38 Input RX data input terminal forserial interface.
SO1 39 Output TX data output terminal forserial interface.
Timer TOC, TOD 35, 34 Output Timeroutput treminal.
EVND 36 Input Event input terminal.
Voltage
comparator COMP0, COMP1 63, 64 Input Analog input terminal forcomparator.
VCref 1 --- Reference level voltage terminal forthreshold
voltage
analog input terminal.
Divide ratio
selection SEL 58 Input The terminal whichselects the divide ratioof
system
clock right afterthe reset and whenreturned
to
mode fromstop mode.
Connect toVcc voltage whenselecting the
divide
and connect toGND voltage whenselecting
the
by-32.
16

6. BLOCK DIAGRAM
7. CIRCUIT OPERATIONS
7.1. KEY INPUTCONTROLCIRCUIT
1) Circuit Operation
Sequential input information (negative logic) fromthe DSHS proprietarytelephone is executed
bydynamic scanning.
The ports RR70 toRR73, RR80 toRR83 of IC6 are brought tolowstatus consecutively.
If a keyis pressed, the key-ininformation input is executedbyports R91 toR93, RB1, RB11,
RB21, RB0, RD1.
7.2. LCD CONTROLCIRCUIT
17

1) Circuit Operation
The LCD data is output frompins 32 to35, 40 to47 and 11 of IC6.
LCD contrast adjustment is performedbythe circuit composedof Q28, Q29, R109, R108 and
R106.
The contrast is determinedonlybythe voltage level betweenV5 and VEE of IC203, IC204 and
IC205.
Higherpotential makes the contrast high.
18

7.3. LEDCIRCUIT
1) Circuit Operation
The LED executes dynamic lighting forthe status indicators, and control is executedbythe
output ports C0 toC5 (column) and R0 toR9 of IC1.
A fixedpulse (T=1.82 msec) is output continuouslyfromthe/SCK1 terminal of IC9. This pulse is
countedand the output of IC1 is shiftedsequentiallyfromC0 toC5.
R0 toR7 of IC1 alsooutput pulses, and the lighting of the LED is controlledbythe timing of the
output ports C0 toC5.
19

7.4. DATACOMMUNICATIONCIRCUIT
1) Function
20