Prime Computer 50 Series User manual

PRIME CUSTOMER SERVICE
50 SERIES COMPUTER SYSTEMS
SERVICE MANUAL 070
MARCH
1985
NOTICE: THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION
This document contains proprietary and confidential
information of PRIME COMPUTER, INC. ("PRIME"). In
consideration of the receipt of this document, the
recipient agrees not to copy any of its contents, nor to
disclose them to or allow them to be used by any person
not currently a PRIME employee or an employee of the
recipient having a need to know, without the express
written consent of PRIME, and further agrees to
surrender this document to PRIME when the reason for its
receipt has terminated.
PRIME
Computer
PRIME PARK
NATICK, MA 01760

COPYRIGHT INFORMATION
The information in this document is subject to change without notice
and should not be construed as a commitment by Prime Computer
Corporation. Prime Computer Corporation assumes no responsibility for
any errors that may appear in this document.
The software described in this document is furnished under a_ license
and may be used or copied only in accordance with the terms of such
license.
Copyright © 1985 by
Prime Computer, Incorporated
Prime Park Way
Natick, Massachusetts 01760
Prime Computer, Incorporated Trademarks
The following are trademarks of Prime Computer, Incorporated:
PRIME PRIMOS PRIMENET 50 SERIES
150-IT 250-11 550-II 750 850 .
CREDITS
Technical Writer cecceccecsccccesecevcevsescseseses Dick McCretton
Editor e@seaeoeeeeosevnseeveseepeeueecev eee seeaanavpeveeweeeevevevaesesee ave Lisa Craycraft
Technical Illustrator .ocscccecesvovevesscscvecveess LISA Kirouac
Technical Typist csccccsacvvccccssesvccssessecsess RODin Flood
ii
od
oo

Oe
FOREWORD
Prime Computer Corporation is committed to a policy of providing the
best possible service for our products and our customers. This manual
has been prepared for use by Customer Service Representatives. It is
intended to be used as a training aid and as a guide for installation,
preventive and corrective maintenance.
The manual is organized into chapters based on tasks the Customer
Service Representative performs at the customer's site. Tasks that
are too difficult and time consuming to be performed on the customer's
site are beyond the scope of the handbook.
Through.experience and necessity Customer Service Representatives
continually find methods to simplify Installation and Maintenance
procedures. With the understanding that the best manuals are an
organized collection of these field proven shortcuts, you are
encouraged to forward all such procedures to Customer Service,
Documentation. ,
Use of WARNING, CAUTION and NOTE is as follows:
WARNING - To warn the operator of a potentially hazardous condition
that may cause physical injury.
CAUTION - To caution the operator of a condition that could cause
damage to the equipment.
NOTE - To provide additionai information.
iii

MANUAL
MANO10
MANO 20
MANO 30
MANO40
MANO50
MANO60
MANO70
MANO80
MANO90
MAN100
MANI10
MAN120
MAN] 30
MAN140
MANI50
MAN160
MAN170
MAN180.
MAN200
MAN210
MAN220
MAN230
MAN240
MAN250
MAN270
MAN280
MAN290
MAN320
MAN340
MAN350
MAN360
MAN900
INDEX OF SERVICE MANUALS
DEVICE(S) COVERED
GE TERMINET 30
KENNEDY MAGNETIC TAPE
P.E. FOX AND OWL
CDC 40 & 80 MBYTE SMD
DIABLO 44B MHD
DATA PRINTER 300/600 LPM
50 SERIES COMPUTER SYSTEMS
SYSTEMS SOFTWARE
CDC 32, 64 & 96 MBYTE CMD
INTRODUCTION TO COMPUTER MAINTENANCE
PRINTRONIX MODEL 300 PRINTER
300 MEGABYTE STORAGE MODULE DRIVE
TELEX 6250 BPI TAPE
NEC SPINWRITER
PW90 SERIES WORKSTATIONS
DATAPRODUCTS PRINTER 300/600 LPM
CDC 160 MBYTE MMD
GE TERMINET 2030
2250 COMPUTER SYSTEM
CAD
GRAPHICS
WORKSTATION
(PW200)
CDC 675 MBYTE FMD
9000-ECL-CPU SYSTEMS
PRIME SYSTEM TERMINAL (PST100)
INTELLIGENT COMMUNICATIONS SUBSYSTEM
MODEL II (1CS2)
2550 COMPUTER SYSTEM
MAGNETIC STREAMING TAPE SUBSYSTEM
PRIME PRODUCER WORKSTATION (PW100)
300 MEGABYTE FIXED MODULE DISK
LETTER QUALITY PRINTER (3185)
PT200 TERMINAL
9650 COMPUTER SYSTEM
INTRODUCTION TO FIELD ENGINEERING
iv
PART NUMBER
TEAMANO10
TEAMANO 20
TEAMANO30
TEAMANO40
TEAMANO50
TEAMANO 60
TEAMANO70-C
TEAMANO80
TEAMANO90
TEAMAN 100
TEAMAN1 10
TEAMAN] 20-A
TEAMAN1 30
TEAMAN1 40
TEAMAN150
TEAMAN160
TEAMAN170
TEAMAN1 80
TEAMAN 200
TEAMAN210
TEAMAN220
TEAMAN230-Al
TEAMAN240
TEAMAN 250
TEAMAN 270
TEAMAN280
TEAMAN290
TEAMAN320
TEAMAN340
TEAMAN350
TEAMAN360
TEAMANS0O

RECORD OF CHANGES
LEVEL: ISSUE
REV UPDATE DATE NOTES/PAGES AFFECTED
B 0 08/82 Second Revision
Cc 0 02/85 Third Revision

CHAPTER 1. GENERAL DESCRIPTION ..
ee
eo
DW
&®
WNP
CHAPTER 2. INSTALLATION 2... ccc ccc ccc cece ccc enscecsseseces
2.1
2.2
2.3
INTRODUCTION. .
SPECIFICATIONS. .-cssccccces
RELATED DOCUMENTATION. ....0--
FCO LOGe wc cccccvennncccccecccerecvescesesesesees ees
TABLE OF CONTENTS
EQUIPMENT IDENTIFICATION. ccc cc cc cc ccc cccnccwsccsncvnesesece
PRIME MODEL NUMBERS....
1.6.1 MARKETING SYSTEM NUMBERING SCHEME......
1.6.2 INFORMATION SYSTEM NUMBERING SCHEME. ..ececeseee
1.6.3 PRIME TYPE NUMBERS... cccccccescces
INTRODUCTION. cccccccvccccceseweneveneeccceceessncessseseses
CHECKING FOR SHIPPING DAMAGE. cs ccccccceccescccceccsseseeeee
UNPACKING INSTRUCTIONS «cc ccccc cc cc cece cee necscsesevece
2.3.1 UNPACKING 50 SERIES CABINETS (NON-FCC)..cccesccee
2.3.2 UNPACKING A 50 SERIES CABINET (FCC). ccccccccccscccecss
203-3 PERIPHERALS «ccc cc ccccccnesceenceveccteesseensseeecees
2.3.4 MISCELLANEOUS ITEMS AND SOFTWARE BOXES..cescsecesceees
INVENTORY. cc vccsccccvccccccccareersecerseesssesevccresesece
SITE SURVEY cc cccccccccncc rec cc cece eee asaeeeseeeeneseeeeese
PRINTED CIRCUIT BOARD (PCB) CURRENT SPECIFICATIONS. «ecscvese
VOLTAGE AND FREQUENCY CONVERSIONS... .coccccccccsene
2.7.1 1045 POWER SUPPLY CONVERSION. coseccsvesvcvverccessces
2.7.2 1051 POWER SUPPLY CONVERSION. .cosscccvsccsssccscccese
SYSTEM INSTALLATION. cc ccccsccccncccvescesccccsesccsccseeves
2.8.1 850 DUAL-CABINET (NON-FCC) INSTALLATION... .cccccscces
2.8.1.1 Dual-Cabinet VCP Bezel Installation.....ceees
2.8.1.2 Dual-Cabinet Interchassis I/O Cable:
Installations cccccccccccccncccccsvenseensececesce
850 DUAL CABINET (FCC) INSTALLATION. eccccceccecceccce
2.8.2.1 Joining The Cabinets. .csccccccsvcvccsccccsces
2.8.2.2 Dual (FCC) Cabinet Inter-Cabinet Cabling.....
CPU VERIFICATION & TOP-HAT INSTALLATION. ..cccccvecces
MEMORY BOARD INSTALLATION PROCEDURE. cccccesscccsccvce
2.8.4.1 Handling E6, E7, E8 and E9 Memory Boards.....
2.8.4.2 Memory Configuration. .cccsssccccccccccccnsens
I/o CABLING GUIDELINES. .ccccccccccccsccvccsce
2.8.5.1 I/O Cabling Guidelines For Non-FCC Cabinets..
2.8.5.2 I/O Cabling For FCC CabinetsS.....sssesescsees
1045/1051 POWER SUPPLY INSTALLATION VERIFICATION.....
UNINTERRUPTIBLE POWER SUPPLY INSTALLATION... .cscecees
POWER DISTRIBUTION UNIT (PDU) CABLING... .cceccccccccce
2.8.8.1 Non-FCC Cabinet PDU Cabling...c.scccccccccvcee
8.1.1 Mainbay Cabinet (Domestic)....scccsneees
hm
Nh
8
8
8
8
8
I
8
8
2
Peripheral Cabinet (Domestic) .cccosscees
3 Mainbay and Peripheral Cabinets
nternational) .cccccccccccccvccccesveccvsceces
1
1
1
1
4 Free-Standing Peripherals. eeeoeneeesneeosee
5 PDU InterconnectionsS...s.ccccrcessccceces
vii
1l- 1
1l-
1
1- 4
l- 7
1-7
1- 7
1- 8
1l- 8
9
13
2-
2-
2-
2-
2-
2-
2-
2Q-
2-
2Q-
2-10
2-10 :
2-12 -
2-12
2-12
2-14
oOonnynrnnPerr
2-14
2-16
2-16
2-20
2-20
2-20
2-23
2-24
2-29
2-30
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2-39
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TABLE OF CONTENTS
2.8.8.2 FCC Cabinet PDU Cabling.....cccccccsccssccecs
2.8.8.2.1 Power Supply Cables Installation........
2.8.8.3 Blower Power Cables Installation......sseeees
8.9 SYSTEM CONSOLE INSTALLATION... cccccsceccccvcevcsccces
8.10 SYSTEM CONFIGURATION. .cccccccccsccvcnccesccccccscess
2.8.10.1 Disk Controller Configuration and Cabling...
2.8.10.1.1 Model 4005 Disk Controller
CONEIGULALLON. ce cecncccescccccsccesecnccccasoes
2.8.10.1.2 Model 4004 Disk Controller
CONLIGULALLON. cecesccvccvacerceesssnvccccessces
2.8.10.1.3 Model 4004/4005 PROM ConverSion.....e..
2.8.10.1.4 Disk Controller Cabling. ...ecsesesescee
2.8.10.2 Tape Controller Device Address Conversion...
2.8.10.3 GCR Magnetic Tape Controller Configuration..
2.8.
2.8.
2.
2
10.4 Kennedy Model Magnetic Tape Configuration...
10.5 Streaming Tape Subsystem (STS) Controller
CONEIGULALION. cecececccceccccecccossesesscescccess
2.8.10.6 Unit Record Controller (URC) Configuration..
2.8.10.6.1 URC Address ConverSion..secvscccceceece
268.10.6.2 URC Cabling. .ccccccccccscccccccsvvcsess
2.8.10.7 System Option Controller (SOC)
Configuration and AddreSsS ConverSion...ssccceneees
2.8.10.7.1 SOC General Address ConverSion...ceseos
2.8.10.7.2 SOC Specific Address Conversion........
2.8.10.8 ICS] Configuration. .cccccecvccncvcceesccnecs
2.8.10.8.1 ICS1 Address ConverSion...ccccccsecesce
2.8.10.8.2 ICS] Cabling. ....cccccccccccccccssccces
228.10.9 ICS2 Configuration. .cwrcccccccesccscesssces
2.8.10.9.1 ICS2 Controller to Buffer Board
CADLING. corcercccccscceccccvcacscccssenecsscees
2.8.10.9.2 ICS2 Buffer Board Configuration........
2.8.10.9.3 ICS2 LAC Bus Backplane Configuration...
2.8.10.9.4 ICS2 LAC Bus Power Supply
CONEIGULALLON. cc cccccccnvcccesccccnsecconsccece
2.8.10.9.5 ICS2 Asynchronous RS232 LAC
CONLIGUIACION. ccecccvvccncccscoveceesossccesess
2.8.10.10 Asynchronous Multi-Line Controller (AMLC)
CONEIGULALION. cc ccccceccenvcvccscccsesscesscvevess
2.8.10.10.1 AMLC Address ConverSion.cccccessoseees
2.8.10.10.2 AMLC Baud Rate COnverSions.cscccessece
2.8.10.10.3 AMLC Cabling... cccsccccccccccccccosceve
2.8.10.11 Synchronous Controller (MDLC)
CONEIQGULALLON. .cacreccccvecccesccccesesesesceveces
2.8.10.11.1 MDLC Address ConverSion..ccocscsscvece
2.8.10.11.2 MDLC Cabling. ccccccccccvvcccccvencvvce
2.8.10.12 PRIMENET Node Controller (PNC) System
CONELGUTALLON. ..crccseccccvccccccsessccvessccescece
2.8.10.13 Main OR I/O Cabinet To Peripheral Cabinet
CADLING. cccccccccccccnccesccccsasccscsvessscesvecse
2.8.10.14 Air Baffle Assembly Configuration..........
2.8.11 FREE-STANDING PERIPHERALS CABLINGe ccccecccccvcsveces
2.8.12 PERIPHERAL BPOUIPMENT GROUNDING. ecccccccccccncccsvces
2.9 INSTALLATION CHECKOUT . ccocvcvccvcvcccsevesccccesessereeceses
viii
2-44
2-45
2-47
2-47
2-48
2-51
2-51
2-51
2-52
2-53
2-54
2-55
2-56
2-56
2-56
2-57
2-57
2-59
2-59
2-60
2-61
2-61
2-62
» 2-64
2-65
2-66
2-66
2-66
2-67
2-67
2-67
2-68
2-68
2-70
2-71
2-71
2-73
2-75
2-75
2-76
2-76
2~76

NL
TABLE OF CONTENTS
9.1
9.2 AADING OPERATING SYSTEM SOFTWARE. «ccecscesccsscccvce
9.2.1 SMD Present: Loading OS From A Disk Pack.....
9.2.2 No SMD: Loading OS From Tape. .ceccsscccnsecees
NAL CHECKOUT. ccccccccsccvccccecsenssect sees tessees
POWER“-UP. occcccccoecnccscvecsccccccccecceves
LO,
2.
2.
2.9.3 FI
CHAPTER 3. OPERATING INSTRUCTIONS ..-ccvcccevccccccvevecevecccns
3
3
3
3
1
2
3
4
3.5
3.6
3
3
3
3
3
7
8
9C¢
1
1
INTRODUCTION. oc cccccscasccccccnccesesesscccescecesecasececs
CONTROLS & INDICATORS. cccccccccccccscevcccrsvccsevetenscees
“3.2.1 SYSTEM STATUS PANEL CONTROLS AND INDICATORS. ..cesvcace
3.2.1.1 Non-FCC Cabinet Status Panel. ..ccccsccecssces
3.2.1.2 FCC Cabinet Status PanelS.ecccscccccccecseves
»2-2 POWER DISTRIBUTION UNIT CONTROLS AND INDICATORS..coc.
YSTEM POWER-UP. ccvccvcccccceecccecseceneeeceseeeeeeeeeccee
YSTEM POWER—DOWN. occcccccccccscnevccecseccesevessesesnecece
24.1 OPERATING SYSTEM SHUT-DOWN, ccc cccccccncccccccccecseces
3.4.1.1 PRIMOS Shut—down Procedure. .ccscescccsccssves
3.4.1.2 PRIMOS II Shut—down Procedure. .cccccevcevccses
3.4.2 REMOVING SYSTEM POWER. .ccccccccccccvccsccvessecsesece
AUTOBOOT TO PRIMOS. .cccccncccnccccvcccevesnccssesesscecsere
VIRTUAL CONTROL PANEL (VCP) OPERATION. .ccccccccvesvcscsesece
3.6.1 CONTROL PANEL (CP) MODE. cc cece cccccoccccesccsccsccces
3
S
S
3
-6.1.1 Controlling Supervisor Terminal Output.......
6.1.2 Halting the SyStem....sccccesccscccscessccecs
6.1.3 Master Clearing the System....crccccsccscccee
6.1.4 Booting the SyStem...cccscceccccvccsscccceces
6.1.5 Accessing Memory and Register FileS.....seee.
5.1 Memory AddreSSeS..cccccsceccccccvvecsees
2 Data Representation. ..ccccscsscccccccees
3 Control Panel CommandsS.....ccsssscceceees
4 Memory Display CommandS.....c.cccssceces
5 Memory AcceSS CommandS..cccccscscesseees
3
3.
3.
3.
3.
ccessing Physical (Unmapped) Memory....-cees
ccessing Virtual (Mapped) Memory...cececsees
Accessing Physical Register FileS....ccseeeee
6
7
8
9 Accessing CRS Register FileS......sesscececes
10 Single-Stepping InstructionS...s.ssscccssvees
1]
1
1
1
>
3.6.1
3.6.1.
3.6.1.
3.6.1.
3.6.1.
1 Changing Processor ModeS..cscccscccsscccceens
2 Starting a Program (Placing it in "RUN")....
3 Stopping Execution Of a PLOGraMmesccccecccces
-14 Exiting Control Panel Mode..ccsscsceccscenes
3. TEM TERMINAL (ST) MODE. .ccccccccccccccccccescesees
3. MODE. cc ccc c ence enn nce necncesveccecaereseeseeseee
M STREAM PROCESSOR MULTI/UNI OPERATION. «.cccssccscccees
CHANGING I/O MASTERSHIP (MULTI-STREAM PROCESSOR) ...ssseceee
CHANGING SUPERVISOR TERMINAL BAUD RATE. cccccccvccccccccvece
6.2
6.3
LTI-
° 0 CHANGING BAUD RATE OF BOOT cocccccccencccccenccneesecesece
1 TEMS cc ccc ccc ccc ccc c cen cccen ecco entecereeereseseesteesesene
ix
2-76
2-77
2-77
2-78
2-80
3+
he
35
Ww
i
CWOADUNWNHHE
rH

TABLE OF CONTENTS
CHAPTER 4. PRINCIPLES OF OPERATION ....-..eese08
4.1 INTRODUCTION. ccccccccccccccsvececvcesccseseresseenesessese
4.2 CENTRAL PROCESSOR UNIT (CPU) ccccsecccccceccccccscccccescece
» 4-
4-
—
4-
-2.1 CPU FUNCTIONAL DESCRIPTION. .ccccccccccvccccssecesseee 4-
2 TIMING AND CONTROL UNIT. ccccsccccccccesesensevcsscses 4=
03 ARITHMETIC UNIT. .ccccccncvcsvcccccnccssenesssceveeese 47
-4 MEMORY MANAGEMENT. «200.
5 OPERATING MODES... .ccccccaccssscnscsissosssssevcssece A>
4.2.5.1 Absolute Addressing. ..ccccccccceccsecccscesces 4>
4.2.5.2 Virtual (Segmented/Paging) Addressing........ 4-
4.2.6 SEGMENT TABLE LOOKASIDE BUFFER (STLB).ccccccerececses 4-
4.2.7 CACHE MEMORY. ..ccccccccvevce
4.2.7.1 CPU Cache Reads..
eeeerereeeseseeesneeeteerees es eneeen 4-
Oo
CO
On
SAI
OY UT
Re bP
eeeeeeeesneearesreeenereeser 4-10
eeerererescecereeesesereerenessese 4-10
»2.7.2 CPU Cache WriteS.....eseee.
207.3 DMX Cache CycleS....ccccccnccccccccvesercsees 4-1]
2267.4 Cache/STLB Summary. ..ccccccccccccccccscscssees 4-1]
FRESH. ccc esececccccccncccnccccccsesveccccnsoscesece 4-1]
PROCESSOR MANAGEMENT... ccccescceccsccccvessscccscceces 4-]]
4.2.9.1 Process Exchange. ..ccccccrccccccccccecsecsees 4-12
4.2.9.2 Procedure Call.cwcccccccccvccccccccosvccceees 4-13
4.2.10 ERROR MANAGEMENT. .occccccccccncvccvccvccsscccccccses 4-14
Peeeeeeeaneeeneene 4-11
Bobb
&
4.2.10.1 TrapS..ccccuccccccsccvccnscscvsccssscceceses 4-14
4.2 e2 FAULtSs wceccccvcccccvvccsccessereseccescssse 4-14
10.2.1 Restricted InsStruction.....seceseesseee 4-15
-10.2.2 Unimplemented Instruction...ceceeseeeee 4-15
10.2.3 Tllegal Instruction... .ccccccecsecsescee 4-15
CHECKS. ec cecccccccccrccscvccsescessceceseces 4-15
el Machine CheckS...cceccccccscccccsecseee 47-16
02 Power Fallescccccccccccccsccecesscecees 4-16
03 Memory Parity. ..cccccccccscccsccceseses 4-16
o4 I/O Parityreccvcccvescescecsccvcesesese 4°18
CLLUPES . occ nccccsvecccscccccsvccsassvcces 4-19
Device Driver PYOGramS...secccecseccees 4-19
PYOGraM VECCOLINd. .coccescccccsccceeses 4-20
Interrupt ModeS..wsscccccccccccccsvesees 4-2]
Interrupts in Process Exchange Mode.... 4-22
Memory Increment InterruptS....cecscesee 4-22
Interrupt Inhibits/Enables...secscesese 4°23
Override Inhibits... .ccccccccecccecveece 4-23
Interrupt Priority Network....sssccesees 4-23
Highest Priority Active Interrupt...... 4-24
RAL I/O MANAGEMENT... cccccccscccccvccccseccccs 4-24
Programmed I/O (PIO) .occcccccccccvcccccescee 4-26
1.1.1 Output/Input The A Register (OTA/INA).. 4-27
1.1.2 Skip On Condition Set (SKS) .scessecseee 4-27
1. 1. 3 Output Control Pulse (OCP)..ecececevces 4-28
rect Memory Transfer (DMX) ...cccesceccreee 4-28
1 Direct Memory AccesSS (DMA)..ccccecesees 4-29
Direct Memory Transfers (DMT) ..cceccsess 4°32
Direct Memory Channel (DMC)...scccesees 4734
Direct Memory Queue (DMO)...csceescecees 4-36
Burst Mode DMA (BDMA).cecccccccscccsens 4738
1
1
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4.3 MA
4.4
4.5
4.6
4.7
TABLE OF CONTENTS
4.2.11.2.6 DMX Priority Networkecceccccccccccccces
4.2.12 ADDITIONAL PROCESSOR FEATURES. .cccccscccascccscsvces
PE
4.
4.
4.
4
4.
4
PH
1
2
3
4
5
ERI
5.
5
5e
5
5
5
4.4
a—4.4.2.2 Backplane BuS SignalS...ecccsscccvccccccccece
4.
2.1 Extended Instruction Set (P500)...cccccccsces
2 Instruction Preprocessor Unit (P750)..ccesee
Multi-Stream Processor (P850)..ccescscscseces
Stream Synchronization Unit (SSU)....ccesees
2.4.1 Automatic Cache Invalidation......ceee.
2.4.2 Processor-to-Processor Communications..
2
2
4.2.1
4.2.12.
4.2.12.3
4.2.12.4
4.2.1
4.2.1
4.2.12.4.3 DiagnoStic MOdeS..cccccccvsecscccees eee
4.2.12.4.4 I/O and Refresh Master/Slave Logic.....
MEMORY. ... emcee rere sneer aceceee
NONINTERLEAVED MEMORY CYCLE. cccccccccccsvcccsnsvesces
INTERLEAVED MEMORY CYCLE. scecccsccnccvccvccscvevesees
NONINTERLEAVED WRITE CYCLES ON INIERLEAVED BOARDS....
WIDE-WORD MEMORY. ccoccccccscscccescsssvccccecssccccecs
4.3.4.1 Wide-Word Interleaved Read. .cccceasccscccsces
4.3.4.2 Wide-Word Interleaved Write... .ceccscccccccces
MEMORY ERROR CHECKING AND CORRECTING (ECCC).ccccscess
4.3.5.1 ECCC Memory Write Operation...cccecccccccccee
4.3.5.2 ECCC Memory Read Operation. .ccesescccvencenes
MEMORY TYPE SELECTION. .ccccccccccccccvccccccsccvccees
MEMORY SLOT SELECTION. .ccccccceccccccesecvsccsesesees
IS AND BACKPLANE, ccccsscccccccnvcnccccnnesecssenscsnese
CHASSIS. cc cccccsccesesenesesccrses eeeveeeeoseeesneeseesn
BACKPLANE. occvescccncccccavscccccccccscccccecsescseceve
2.1 Major Backplane BUSES. ..ecccevcccccsscecovens
2.3 P850 Multilayer BackplaneS....cccsceccvcvece
RAL I/O CONTROLLERS. ccccececcccccccscccscscscscscecs
CONTROLLER FUNCTION. «0 cscvccccsscscvccncccccesceccecs
CONTROLLER LOGIC BLOCKS. ccccccvccncvccsccesscccvesccs
DISK CONTROLLER (SMC) scccceccsescecccccscsssscescsece
MAGNETIC TAPE CONTROLLER (MIC). .cccscccccvsvcccvveces
UNIT RECORD CONTROLLER (URC) ..ccvccccsvcccrsevcscecee
4.
E
°5+6 SYSTEM OPTION CONTROLLER (SOC). cceseccccccccvccvevecs
COMMUNICATIONS I/O CONTROLLERS 0c cccnccccccccccccnsecccecses
4.6.1 PRIMENET NODE CONTROLLER. oc cccsncccccccvcccncccccecees
4.6.1.1 PRIMENET Network Information...ccsrescocccece
4.6.1.2 PRIMENET Network Operation. .cccesccccccsvcece
4.6.2 ASYNCHRONOUS MULTI-LINE CONTROLLER (AMLC) ..csccececes
4
4
Vv
4
4
4
I
6.3
6.4
2.1 AMLC & QAMLC Functional Operation....evcosees
2.2 AMLC Initialization. cccccseccscsccccsccccecs
2.3 AMLC Transmit Operation. .ccorccccerccceccvene
2.4 AMLC Receive Operationsssceccccceccvsccccvece
2.5 AMLC
2.6 AMLC
2.7 UART
6
6
6.
6.
6. Status REPOrtinGecscccseccscvvccsesvccce
6 INCErrupt .accccccvcccsveccncccrescccees
6 Functional Operation..ccccccccsencvesoes
LTI-DATA LINK CONTROLLER (MDLC) .ccccscecsccsccccces
INTELLIGENT COMMUNICATIONS SUBSYSTEM (ICS1 &ICS2)....
4
4
4
4
4.
4,
4.
M
RITUAL CONTROL PANEL (VCP) cccccccccccccccccsseccccccncecce
7el
7.2
7.3
VCP INTERFACE. cccccccccscsccccncnesessssenvesssveseve
VCP IMPLEMENTATION OF PIO COMMANDS....cccccsvcsevsece
280 CODE DEBUGGER, oo scccccscvvccccccvareccecesecseeee
xi
4-39
4-40
4-40
4-42
4-43
4-44
4-45
4-46
4-49
4-50
4-51
4-51
4-52
4-54
4-55
4-55
4-56
4-56
4-57
4-57
4-58
4-58
4-59
4-59
4-61
4-6]
4-65
- 4-70
4-75
4-76
4-77
4-77
4-77
4-77
4-77
4-77
4-78
4-78
4-79
~
4-81
4-82
4-83
4-83
4-84
4-84
4-85
4-85
4-86
4-87
4-87
4-89
4-90
4-90

TABLE OF CONTENTS
4.7. 4v VCP CONNECTOR SIGNALS. @e@eeseoeovoeaveeveeeeveeeseseoneveeeneneensd
4.8 POWE POWER SUPPLIES. ccc cccc ccc ccc c cent cece cere eee e ence seeeaee
1045 AND 1051 POWER SUPPLIES. .ccscvcccccccncvecs 8.1
8.2 DC VOLTAGE BUSES. cece ccccccccccrccesscvcsssecsssenes
8.3 POWER SUPPLY PROTECTION. «ccccsccccscvscccccccsecvence
8.4
8
4.
4
4.
4 AC/DC POWER FAILURE SEQUENCE AND CONTROLS....ccsecvee
4.8.5 UNINTERRUPTIBLE POWER SUPPLY (UPS) ..cccecccsesceccces
4.9 POWER DISTRIBUTION UNIT (PDU) NON-FCC CABINET. .ccsccccvcces
4.1
4-99
. Q POWER DISTRIBUTION UNIT (PDU) ECC cece ccc cc ccesescveveseee4—l02
CHAPTER 5. PREVENTIVE MAINTENANCE .....ccccccccccsccccccccseces
el INTRODUCTION. ccc ccc ccc cc wc cece ccc ccccc neces scssccercceeseee
2 MAINTENANCE PHILOSOPHY. .cscccccecccncscsscncscccccesccccces
3 PRODUCT HISTORY. .cccccacccccncccccccvevescasssscccccsesssse
523.1 SYSTEM LOGBOOK. .ecccccccccvccnescsnssesnssscccssscces
5.3.2 EVENT LOGGERS. ccccccccenccccnscccevesccssccteeseecees
5.3.2.1 System Event Loggerecsccccccccscncasvccsccces
5.3.2.2 Network Event Loggeresscccccescccccesecsscese
4 PM SCHEDULE. ..cccccccccvccnscccnaceveccscccassssescesessece
5 MAINTENANCE TOOLS... ccc cnccccccccccccccsnensccescccesscsces
6 PM PROCEDURE. ccc ccc cree ence cece neste enenecetseessscscsees
5.6.1 SYSTEM SHUTDOWN. 2... cccscccccccccncccnsncccccccescscce
5.6.2 CLEANING AND INSPECTION, cacccccccssccsasscccecescsece
5.26.3 PERIPHERALS... cccccccccccccnseccnnssnccccceucscececes
5.6.3.1 Disk Drives (Removable) ..sccoscecvccsevcsccece
6.3.2 Magnetic Tape DriveS..cccccecccvvcecscccceens
-6.3.3 System Console (TERMINET)..sccccncessscccece
6.3.4 PLINCerS.cccosevecscnvcssnscsccvsscssecsscece
5.6.3.5 Terminals (CRIS) .cccccccccccccsccccensscceces
5.7 ENVIRONMENTAL CHECKOUT. .cccccccccccccccccccnsucsececesscces
5-8 SYSTEM STARTUP. ..cccccccccccscnnccccesseccncscnssssssescces
5
5
5
CHAPTER 6. CORRECTIVE MAINTENANCE ...ccccccccccsccccccccscveces
6.1 CORRECTIVE MAINTENANCE OVERVIEW, ccccncccccscceccccceccsoves
6.1.1] MAINTENANCE TOOLS & MATERIALS. ..ccccccccccccccccscccs
6.1.2 LOGIC LEVELS... ccccc ccc cc cccccccvevcesccccessssssscees
6.2 TROUBLESHOOTING GUIDE... cece esc cccccesccecccvesccsevesseuse
6.2.1 GENERAL TROUBLESHOOTING NOTES. cccccccccsccccccveseses
6.2.2 VCP VERIFICATION. .ccccccccccsevecuscccccessccessseses
6.2.2.1 VCP Dynamic RAM TeSt..cecccccccseccccescsscns
6.2.2.2 VCP High Speed Buffer TeSt..ccccccsccocevcces
6.2.3 MICRO-VERIFY ERROR HANDLING. .ccsecccccsccccccvccesces
6.2.3.1 Micro-Verify Initialization... .ccccccccvcccces
6.2.3.2 P850/P750 Micro-Verify DifferenceS....eseeees
6.2.4 TROUBLESHOOTING SYSTEM (PRIMOS) HALTS. ..cccccsccccess
6.2.4.1 Hardware Diagnostic Status RegisterS....eeeeee
6.2.4.2 General System Halt Handling... ..cccccsscccees
6.2.4.2.1 850 Halts. .ccccvcceccccncccsvscscccavere
6.224.262 SSU HaltSecccccrccccccsccccccccccssccsecs
xii
5-
_
5-
5~
5.
5~
5-
5
5-
5~
5-
5~
5-
5-10
5-11
5-11
5-11
WWUONUNN
RHR
e
- 5-11
5-12
5-12
5-12
5-12
nN
I
_
n
i
~
OWS
PF
BWNHNH
RR
er

TABLE OF CONTENTS
+» 2.4.3 Memory ECCU Error (MEMPA) Handling....-eseeees 6-15
é. 204.4 Machine Check Handling. cecscsceccccccccssces 6-16
6.2.4.5 Troubleshooting FlowchartS...cccsesccecvesess 6-17
6.2.5 TROUBLESHOOTING COMMON SYSTEM PROBLEMS.....ceccceosee 6728
6.2.6 TROUBLESHOOTING WITH LOGREC. ceoccccescccccvccecvcccss 0738
6.2.6.1 LOGREC Disk ErrorS..ccscsccccccccsevevscevess 6739
6.2.6.2 LOGREC Machine CheckS.coccccccevcccceccccsees 0-40
Havlt 4/216.56.2.6.3 LOGREC Memory Parity...cccccccccccceccccceees 6-40
6.2.6.3.1 LOGREC Memory Parity Format....cecsecees 6-41
6.2.6.
3.2 Memory ECCC Error Handling...escceeeeees 6-41
6.2.6.4 LOGREC Missing Memory ErrorS..ceescccsccesees 6-47
6.3 1045/1051 POWER SUPPLY MEASUREMENTS AND ADJUSTMENTS...+eee+ 6-47
CHAPTER
7.
PARTS
REMOVAL
AND
REPLACEMENT
...cccsccvcccccsccees
J-
7.1 FRU REMOVAL/REPLACEMENT PROCEDURES ..cssccescccccccccccecees I-
7.1.1 PRINTED CIRCUIT BOARD (PCB) REMOVAL/REPLACEMENT...... 7-
Telel.1 PCB REMOVAL. cccccsccccccccevscccececccevesees I>
71.1.2 PCB Replacement.cccsscccsccccccecsccsccccecees Im
7.1.2 MEMORY BOARD RAM REMOVAL/REPLACEMENT..ccccscccosccees U7
7.1.3 NON-FCC CABINET FRU REMOVAL/REPLACEMENT PROCEDURES... 7-
7.1.3.1 PDU Removal/Replacementicccrccsccescecssccceses Im
7.1.3.2 Cabinet Blower Removal/Replacement....eeeseee 7-
7.1.3.3 Power Supply Removal/Replacement...secccssece TO
7.1.3.4 16-Slot and 19-Slot Backplane
Removal /Replacement.crcocsccceccccccscvesccessseses I-
CABINET FRU REMOVAL/REPLACEMENT PROCEDURE.....e. ~ 7
1 Blower Front Air Filter Removal/Replacement.. 7-
2 Blower Bottom Air Filter Replacement..... eoee TO
3 Cabinet Blower Assembly Removal/Replacement.. 7-
4 Blower Belt Removal/Replacement...cocccecseee I7
5
6
7
7.1.4 FOC
Blower Vane Switch Removal/Replacement...+se. 7-
Power Supply Removal/Replacement..ccesccceees J-
Power Distribution Unit (PDU)
Removal /Replacement..cecscecccscscsccccccsccsscces 7
7.1.4.8 16-slot and 19-Slot Backplane
e
me
mm WW
RR
bP Pr
MAAADNMNUNUW
8
Removal /Replacement.ccccccccccsccsescesescccsesees Ill
7.2 50 SERIES FRUS.cccc ccc cccccc sec vccccccncescccescesssceesees 7-12
xili

FIGURE
FIGURE
FIGURE
FIGURE
TABLE
TABLE
TABLE
TABLE
TABLE
TABLE
TABLE
TABLE
FIGURE
FIGURE
FIGURE
FIGURE
TABLE
TABLE
TABLE
TABLE
FIGURE
FIGURE
FIGURE
FIGURE
FIGURE
FIGURE
FIGURE
FIGURE
FIGURE
TABLE
. FIGURE
TABLE
TABLE
TABLE
TABLE
TABLE
TABLE
TABLE
TABLE
“TABLE
TABLE
TABLE
TABLE
TABLE
TABLE
FIGURE
FIGURE
FIGURE
FIGURE
TABLE
TABLE
TABLE
TABLE
FIGURE
FIGURE
Hone
ee
bee
ee
b
CIN
PWN
PWDde
TABLE OF CONTENTS
150-1I/250-11I/550-II CPU SYSTEM (NON-FCC) ..scseeeeee l-
150-I1/250-II/550-II CPU SYSTEM (FCC) wcscecsceeseees l-
750/850 CPU SYSTEM (NON-FCC) .ccccecescsccescrccccese I>
750/850 CPU SYSTEM (FCC) .ccccccccscccvccccsccccecees I-
GENERAL SPECIFICATIONS: 150, 250-II, 550-II SYSTEMS jl-
GENERAL SPECIFICATIONS: 750 & 850 SYSTEMS ...ceeeeeee LH
CABINET GENERAL DIMENSIONS wssccceccccccscccccsesecse Im
50 SERIES WEIGHT .ocescccccccccccccccccnccccscecscese Im
50 SERIES CENTRAL SYSTEMS DOCUMENTATION .....-eseeee0- L-
50
SERIES CONFIGURATIONS 2. cccccccnccccccsccccseccsee I-10
INFORMATION SYSTEM (DEALER) CONFIGURATIONS .....-.ee0. 1-12
COMMON PRIME TYPE NUMBERS ..ccccccscccccsescccccsceee 1-13
JI
DUI
PSP
PWN
PF
UNPACKING THE NON-FCC CABINET .ccccccvccccccccceecsees om
CABINET LEVELING PADS cecccccccccccrcccccescscceccces 2m
SHIPPING RESTRAINTS REMOVAL .ccccccccccececscscnescee 2m
UNPACKING THE FCC CABINET ..cccccccccscccescccscceece 2”
ELECTRICAL SPECIFICATIONS ..cccsvcccccscccssveseseces 2m
ENVIRONMENTAL SPECIFICATIONS: ccccccccccccncccceeccee 2m
POWER CORDS AND CONNECTORS .eccccccccvccccnccccccsves 27
OPERATING SPECIFICATIONS: DC CURRENT DRAW PER BOARD 2-
1045 POWER SUPPLY CONVERSION JUMPERS ..ccccsesensesee 2-il
1051 POWER SUPPLY CONVERSION JUMPERS ..ccescscccceees 2-13
DUAL CHASSIS LAYOUT AND CHASSIS INTERCONNECTION ..... 2-15
850 MAIN BAY CABINET ccoccccccccccccccccccecceseceeee On716
850 I/O CABINET .ccccccccccccvccccncecesceseccesecces Q-ll
JOINING THE CABINETS ceocsecccccvccccccnnccccccccscceee 2-18
LEVELING LEGS wecccccccccccccceccccrccccccccesevecsses 2-19
850 FCC CABINETS CABLING OVERVIEW .sscccccccccceveene 2-21
SSO-IT CABLING cescccccccccvcvecvccesccccccescccscene 2-22
MEMORY BOARD CAPACITY csccccccccccccccnccccccvcesecess L722
750 CABINET .wccccvccerevcvcccccccccevcuccvcvevccesers L723
50 SERIES MEMORY ADDRESSING ..cceccccccccccccccecvece 2724
50
SERIES MEMORY SIZE CONFIGURATIONS —- 2.0 eessees 2-29
50 SERIES MEMORY SIZE CONFIGURATIONS —- eveceee 2-25
50 SERIES MEMORY SIZE CONFIGURATIONS — wevcsee 2-26
50 SERIES MEMORY SIZE CONFIGURATIONS - eoeesee 2726
50 SERIES MEMORY SIZE CONFIGURATIONS - cessees 2-26
50 SERIES MEMORY SIZE CONFIGURATIONS ~ eeecees 2-27
50 SERIES MEMORY SIZE CONFIGURATIONS - eesvees 2-27
50 SERIES MEMORY SIZE CONFIGURATIONS — sosssee 2-28
50 SERIES MEMORY SIZE CONFIGURATIONS - eovevee 2728
50 SERIES MEMORY SIZE CONFIGURATIONS - eveeves 2728
50
SERIES MEMORY SIZE CONFIGURATIONS - seeseee 2-28
50 SERIES MEMORY SIZE CONFIGURATIONS - eeeeeee 2-29
E6, E7, E8 AND E9 MEMORY BOARD SWITCH SETTINGS ...... 2-29
MEMORY BOARD SWITCHES .cscenccccccccvcvecesscseveseee 2-30
TYPICAL LAYOUT OF CABLES AND EQUIPMENT ....secccceees 2-31
TYPICAL CABLE CONNECTIONS AT MAINFRAME CABINET ...... 2-32
BULKHEAD PANELS cseccccevevescvcccccccccccccccsccsses 2733
50 SERIES PRIORITY: BASIC ORDER .cececcccccccsccceese 2-34
SUMMARY OF 50 SERIES NON-BULKHEAD CABLES ..essceccess 2730
SUMMARY OF 50 SERIES BULKHEAD CABLES ...ceccccecceces 2738
50 SERIES SPECIAL BULKHEADING CABLES .cccccececccceee 2738
POWER SUPPLY INSTALLATION ccscccccccccvavescsccccceve 2740
MAINFRAME PDU DOMESTIC .ccccvecccccccnccccccrccveccee 2-4]
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SSSR
RSRTE

TABLE OF CONTENTS
FIGURE
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TABLE
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TABLE
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TABLE
TABLE
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TABLE
TABLE
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TABLE
TABLE
TABLE
TABLE
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FIGURE
TABLE
FIGURE
FIGURE
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TABLE
TABLE
FIGURE
TABLE
TABLE
TABLE
FIGURE
TABLE
TABLE
TABLE
TABLE
TABLE
TABLE
FIGURE
FIGURE
FIGURE
FIGURE
FIGURE
2-213
2-22:
2-23:
2-24:
2-253
2-26:
2-273
2-28:
2-243
2-29:
2-253
2-30:
2-31:
2-32:
2-33:
2-34:
2-35:
2-263
2-36:
2-273
2-28:
2-37:
2-29:
2-30:
2-38:
2-31:
2-32:
2-33:
2-34:
2-39:
2-40:
2-35:
2-41:
2-42:
2-43:
3-1:
3-1:
3-2:
3-2:
3-3:
3-43
3-5:
&
ww
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tm
&
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rm
©
es
ce
cf
ee
co
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WN
Fe
oe
oe
ee eo
oe
MAINFRAME PDU (750 SYSTEM) DOMESTIC ...ccacccccesccce
PERIPHERAL PDU DOMESTIC
MAINFRAME/PERIPHERAL PDU INTERNATIONAL ..ccccssecsece
PDU TO PDU INTERCONNECTIONS SINGLE CABINET PROCESSOR
PDU TO PDU INTERCONNECTIONS DUAL CABINET PROCESSOR ..
MAIN POWER CABINET INSTALLATION ..ccccccsccccecccnccs
POWER SUPPLY OUTLETS ccccccceccncccccevccccsccvcccese
VCP CABLING cecececvccccccnvncccccncensccccceeccesece
CONTROLLER DEVICE ADDRESSES .ccccecccccccserccsccsces
4004 ADDRESS CONVERSION ..ccccccccccccccccncnccncccce
DEVICE CONFIGURATION PROMS wcccccvccccvcccccccssecces
RACK-MOUNTED DISK BULKHEAD CABLING cecccccccccccssces
STAND-ALONE DISK BULKHEAD CABLING .cccccceccccccevces
MIXED-DISK BULKHEAD CABLING .eosccccrccccccccscscescne
GRC BULKHEAD CABLING .coccccccccccccvcceccssccscnsnce
KENNEDY TAPE CONTROLLER BULKHEAD CABLING .ccccccecece
STREAMING MAGNETIC TAPE BULKHEAD CABLING ...-.ccecces
URC CONFIGURATIONS csccccveccvcvcccccsceseccceeserces
URC BULKHEAD CABLING ccccccccvecsccccescevecccccccees
ICS] ADDRESSES .scccccccaccccvccccscccentscevetnacees
ICS1 ADDRESS JUMPERS
Icsl BULKHEAD CABLING @eeevpsceeoeenuset@evnseonvneeseenseevnseensaneed
ICS] CABLE TO BULKHEAD CONFIGURATION
ICS2 CONTROLLER BOARD OPTIONS .occcceccccnccccvccvccs
ICS2 BULKHEAD CABLING 2. cccccccccncccccctnccnctcccces
LAC BUS BACKPLANES wsccvcccccccvccccscssvvenceseseces
AMLC ADDRESS JUMPERS .cceccecevcccrvncevcsccesccenves
AMLC BAUD RATE CONVERSION cscccccccccccrecvccceccesees
AMLC CABLE TO BULKHEAD CONFIGURATION cosccccccecccces
AMLC BULKHEAD CABLING ceccvcccceccccssccesesscvvesses
MDLC BULKHEAD CABLING occcevcvccvcrcccvesssennveceves
MDLC CABLE TO BULKHEAD CONFIGURATION .ccccccccccvcess
PNC INTERCABLING ceccccccvcccccvcccccccvvcccccvecsces
PNC 50 SERIES CABLING cesccccccccvccccccseccccssccess
MAIN CABINET TO PERIPHERAL CABINET CABLING ..eoeveces
NON-FCC CABINET STATUS PANELS wcccrccescccncccccccces
SYSTEM STATUS PANEL CONTROLS «cccccccccecevccsvcceses
SYSTEM STATUS PANEL INDICATORS .ecsccorecccecvecncens
FCC CABINET STATUS PANEL ccscccccccsecccsvccsccensens
SYSTEM STATUS PANEL CONTROLS .ccsccvcvccvccvescvesens
STATUS PANEL INDICATORS wcccccccccvccvccsccesessucene
FCC PDU CONTROLS cecccccccvcvccccccccccccsccseccecese
FCC CABINET PDU .cccoccvcccccnavcccccccsvesescssescces
SENSE SWITCH SETTINGS FOR BOOT .ccccecccccccccceevecs
REGISTER FILE LOCATIONS .oececcccccvccccsccvccvceeees
KEYS AND MODALS
MODALS
VCP REGISTER FILE MNEMONICS SCoeevreeseeevneeeevesnesensese
SSU SWITCH SETTINGS seeeereeeeseseeceoseneseeseoeaoeeeeeneeee
TWO AND THREE BOARD CPUS: A BOARD ccccccscccceccccess
TWO AND THREE BOARD CPUS: B BOARD .cceseceavvcvesevee
P550-I1, 500, 650, SYSTEMS: CPU BLOCK DIAGRAM .....06
750 CPU: FUNCTIONAL BLOCK DIAGRAM ..ccocsccccnccceves
GENERAL CPU:
FUNCTIONAL BLOCK DIAGRAM eeweevooeceseeon eevee
xvi

FIGURE
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TABLE
4-1]
T
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OU
MTA
U
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WNP
TT
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T
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mm
WWW
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W
TABLE OF CONTENTS
MEMORY ADDRESS TRANSLATION .ccccccccccccccesssccesees 4~ 9
PARITY GENERATION AND CHECKING ..ccceccccccccssessess 4-18
INTERRUPT PROGRAM NETWORK .cccccccccccccsccvcscssseee 4-21
INTERRUPT PRIORITY NETWORK .ccccccesccccccccceveseese 4°25
PIO INSTRUCTION FIELDS .eccccccccccsccencccececcsssse 4°26
BPC MODE LINE SETTINGS .cccccccccccceccccsscccccesese 4-29
DMA TRANSFER .cccesececcccccccccrcvcccscccecsseceeses 4-3]
DMT TRANSFER
DMC TRANSFER
DMQ TRANSFER cccecccccvcccccecccccccccvccesccsescesese 4-37
DMX PRIORITY NETWORK occcccccccccccceccesccccsesesses 4-4]
SINGLE STREAM VS. MULTI-STREAM PROCESSOR ..eseesesees 4-43
P850 FUNCTIONAL BLOCK DIAGRAM .cccccccccesescsecssese 4-44
SSU ADDRESS SPACE DEFINITION .occsccscccccsceeesesess 4-48
850 DIAGNOSTIC STATUS MODES ..cccsccccesccvescecesses 4-50
MEMORY INTERFACE ADDRESS AND DATA PATHS ..ccesesseses 4-52
MEMORY ADDRESSING CONCEPTUAL ILLUSTRATIONS ...eeeeese 4-53
MEMORY BOARD CAPACITY .ccccccvccccccveccccccccecesese 4-57
MEMORY TYPE SELECTION TO CPU .ccccccccccccecssessesse 4-58
SYSTEM ILLUSTRATION (PART ONE) .ccccceccccccssvcseses 4-59
SYSTEM ILLUSTRATION (PART TWO, REAR VIEW) .ecsesseeee 4-60
SYSTEM SLOTS AND CHASSIS .occcccccccsccccccccsesseses 4-61
17-SLOT BACKPLANE .ccccccccvccccccccccsscessccesesces 4-62
19—SLOT BACKPLANE .ecccccccceccccecsccsccesescesesces 4-63
BASIC SYSTEM BLOCK ceocesccccencvccccccccsccsccecesseee 4-64
BACKPLANE SIGNAL LIST covccccccccccssccccccsccsscsees 4-65
BACKPLANE (SLOT) PIN NUMBER IDENTIFICATION ...eeeeee- 4-71
850 BACKPLANE SIGNAL LIST ..cccecccccccsccccccsescess 4-71
T/O
AND
MEMORY
BUSES
..cccccccscccccccvccscccsssseees
4°76
PNC NETWORK ceccccccncccccvecccvccesccsescsccsesesses 4-79
PRIMENET NODE DATA FLOW .ccccccccccccccccscccsecseses 4-80
AMLC: BASIC DIAGRAM .occcccccccccccccccscscssesecses 4-81
VCP
BLOCK
DIAGRAM
.eccccccccvccccccccccvesssesesecess
4-88
CONNECTOR CA SIGNAL LIST .eocccccccccccccsscscscccsee 4-91
CONNECTOR CB SIGNAL LIST .ccccccesccvccccccscsesessss 4-92
CONNECTORS CC & CD SIGNAL LISTS .ecccceccceccccsceese 4-93
CONNECTORS CE & CF SIGNAL LISTS ..csccccccccesvcesess 4-94
VCP PCB CONNECTORS .cccceccccccceccccncsscecaresesess 4-95
1045 POWER SUPPLY BLOCK DIAGRAM ..ccscccescccccecceee 4-97
1051 POWER SUPPLY BLOCK DIAGRAM ..cccccccccecescesees 4-97
DOMESTIC MAINFRAME CABINET PDU .cccccscccccceceseeses 4-100
INTERNATIONAL MAINFRAME CABINET PDU ..cccccccesessees 4-100
DOMESTIC PERIPHERAL CABINET PDU ..ccccccecccsccsscess4lOl
INTERNATIONAL
PERIPHERAL
CABINET
PDU
.ecosscoveceess
24-101
PDU SCHEMATIC .cscccccccccccvcccccccscccccccccsceseses 4-103
@aeeeeeeeseseeseeesaeeeeeeeeneeeeseneenee 4-33
eeeeeeeoe eset eoneeeeeneseeneeeeeseeeoeseeneoe 4-36
PRINT SYSLOG SAMPLE FILE .occascccccccccscvesesessess 97
PRINT
SYSLOG
AND
PRINT
NETLOG
OPTIONS
....cesceeeeees
S-
SYSTEM EVENT TYPES cecccccccccccccvcccccccescsscesecs Om
PRINT
NETLOG
SAMPLE
FILE
.ccoccccccscccccscccsevecses
S-
NETWORK EVENT TYPES cocccccccccccccccccscscsssscesses 57
SAMPLE
PM
SCHEDULE
.cccccccccccccccccccccsccecesecses
Im
OIA
IW
W
50 SERIES SYSTEMS LOGIC LEVELS @voeeceeoeeeneeeeenennne 6~
VCP
RAM
DECODE
CHART
eeeveneeneeeeeneoeeeeeeeseeannseeseene
6-
MICRO-VERIFY TESTS, P350/P400 Ceo oeeceeneaneeesesreveesse 6-
OW
ee
xvii

TABLE OF CONTENTS
FIGURE 4-
FIGURE
FIGURE
MEMORY ADDRESS TRANSLATION Coens eeeceseseoeseoeceseorene 4- 9
4
4
FIGURE 4-
4
4
6:
-7: PARITY GENERATION AND CHECKING .cccccccccscecesscsvcee 4-18
8: INTERRUPT PROGRAM NETWORK wccccevcccevccsecsescsssese 4-21
9: INTERRUPT PRIORITY NETWORK wcccscccccccccecervccesees 425
: PIO INSTRUCTION FIELDS ...cnccccccccccccnssscessssess 4-26
BPC MODE LINE SETTINGS ..ccccccccccvccesecccssscscses 4-29
: DMA TRANSFER ccccccccccccccccnccvccccscscsccccscesces 4-3]
2 DMT TRANSFER wccccccsccccccccscccccsceccccccsesoveses 4-33
¢ DMC TRANSFER .cccccnccevcccccccccsccccccscccesscccees 4-36
zs DMO TRANSFER ..ccccccccccccccsccvccsceseccesssecesses 4-37
FIGURE 4-1
TABLE 1
FIGURE 4-1
FIGURE 4-1
FIGURE 4-1]
FIGURE 4-1
FIGURE 4-
FIGURE -4-
FIGURE 4-
TABLE 4-
17: DMX PRIORITY NETWORK cccsccccceccvecvcccvervcsesseves 4-4]
1
1
2
TABLE 4-3
2
2
4
SINGLE STREAM VS. MULTI-STREAM PROCESSOR ..csssereees 4-43
P850 FUNCTIONAL BLOCK DIAGRAM .cccccccccecceccerevees 4-44
: SSU ADDRESS SPACE DEFINITION ..cccccccccccesevccecces 4-48
: 850 DIAGNOSTIC STATUS MODES ..cccccnccccccccccsecsees 4-90
O: MEMORY INTERFACE ADDRESS AND DATA PATHS .ccccccseseee 4-52
l: MEMORY ADDRESSING CONCEPTUAL ILLUSTRATIONS ...eeesees 4-53
MEMORY BOARD CAPACITY .cccccccccccccccnvessesccesscce 4-57
MEMORY TYPE SELECTION TO CPU ..cccsccccccsenccevesess 4°98
SYSTEM ILLUSTRATION (PART ONE) wccaccccccnccccccvscee 4-59
SYSTEM ILLUSTRATION (PART TWO, REAR VIEW) ..cccoeesee 4-60
SYSTEM SLOTS AND CHASSIS cscccceccccccccccccccsecsees 4-6]
s J7-SLOT BACKPLANE .cccccccccccccccccccccccveneseseses 4-62
: 19-SLOT BACKPLANE .cccccccccccccvccccsccccvcnessveses 4-63
: BASIC SYSTEM BLOCK cecccccccnvevccncvcncccsescesesses 4-64
BACKPLANE SIGNAL LIST ceccccccccccccvcsccccvccseveses 4°69
: BACKPLANE (SLOT) PIN NUMBER IDENTIFICATION ...eceeeee 4-71
850 BACKPLANE SIGNAL LIST .cccccccccccccccvccnseseses 4-7}
I/O AND MEMORY BUSES ceccececccccvccsceccscevcssevess A“76
PNC NETWORK wcsccccccevccevccccccccnccsccsecsceseeses 4-19
PRIMENET NODE DATA FLOW ..ccccccccccccccccccccscesees 4-80
AMLC: BASIC DIAGRAM ceccccccccccccccccvcccccvcssesss 4-8]
VCP BLOCK DIAGRAM .ccosesccccvccocccccccccveccvevesee 4-38
CONNECTOR CA SIGNAL LIST ccccccccccccccccveccsscvcess 4-9}
CONNECTOR CB SIGNAL LIST .cccccccccceccccessccevveses 4-92
CONNECTORS CC & CD SIGNAL LISTS ...ccccrccccccvcecees 4-93
CONNECTORS CE & CF SIGNAL LISTS c.sccccscccccccccseve 4-94
VCP PCB CONNECTORS ceccccccccccevccccccccevccccessses 4-95
1045 POWER SUPPLY BLOCK DIAGRAM .ccosccccvccecseveces 4-97
1051 POWER SUPPLY BLOCK DIAGRAM .ccccccccsccccvcvenes 4-97
DOMESTIC MAINFRAME CABINET PDU ccccccccccvcceccoveee e410
INTERNATIONAL MAINFRAME CABINET PDU .ccccceccecceseee4=100
DOMESTIC PERIPHERAL CABINET PDU csccccsccceccevcveese4lOl
INTERNATIONAL PERIPHERAL CABINET PDU .cccceseceeveee e410]
PDU SCHEMATIC wccceccccvccecccccnsvesvvccesecesvecss e413
FIGURE 4-
FIGURE 4-
TABLE 4-
TABLE 4-5
FIGURE 4-2
FIGURE 4-2
TABLE 4-6
FIGURE 4-2
FIGURE 4-2
FIGURE 4-2
TABLE 4-7
FIGURE 4-2
TABLE 4-8
FIGURE 4-2
FIGURE 4-2
FIGURE 4-3
FIGURE 4-3
FIGURE 4-3
TABLE 4-9
TABLE 4-10
TABLE 4-11
TABLE 4-12
33
34
FIGURE 4-
FIGURE 4-
FIGURE 4-
FIGURE 4-
FIGURE 4
FIGURE 4
FIGURE 4-
FIGURE 4
FIGURE 5-1: PRINT SYSLOG SAMPLE FILE .scecccvcccccecccesecceveees OF
TABLE 5-1: PRINT SYSLOG AND PRINT_NETLOG OPTIONS ...eesesseseees SK
TABLE 5-2: SYSTEM EVENT TYPES cccecccccccccccccenccccenccseecess OF
FIGURE 5-2: PRINT NETLOG SAMPLE FILE cccscccsccccccccsscccsvesees OF
TABLE 5-3: NETWORK EVENT TYPES ccccccccccsccccncccccsrecsscerese Om
FIGURE 5-3: SAMPLE PM SCHEDULE .eccccccccccccccccvccscvescvessese OF
Mn
A
Uw
Ww
TABLE 6-1: 50 SERIES SYSTEMS LOGIC LEVELS eeecetecesreevneseenesen 6-
TABLE 6-2: VCP RAM DECODE CHART Coen erereesereneeasereeeneeeeneeoe 6-
TABLE 6 3: MICRO-VERIFY TESTS, P350/P400 Peewee seeeereeeseereses 6-
WW
ke
xvii

TABLE OF CONTENTS
TABLE 6-
ggty TABLE 6-
TABLE 6-
TABLE 6-
TABLE 6-
{ze 6-
TABLE 6-
TABLE 6-
TABLE 6-
TABLE 6
FIGURE
6
TABLE 6
FIGURE 6-
6
MICRO-VERIFY TESTS, P500 .cccccccccccccccccccccsevess 6- 6
P750/850 MICROVERIFY TESTS .wecccccccccccsccccccscsess 6- 7
SYSTEM (PRIMOS)MHALTS .cccccccccvcccucccsscscecccseses OF 9
DSWSTAT WORD FORMAT: HIGH SIDE .ecocccccccccvccvccees 6-10
DSWSTAT WORD FORMAT: LOW SIDE .cccccccccccccvnccvcess O-ll
DSWPARITY WORD FORMAT: HIGH SIDE .ccesccescccccsssees O-1l
DSWPARITY WORD FORMAT: LOW SIDE ..cecccccccceccccsess 6-12
850 DEBUG REGISTERS .cccccccccccccccccccscccsccsevess On-14
MACHINE CHECK CODES DEFINED ..ccocceccvcecccccccseces 6-17
SYSTEM WILL NOT BOOT ceccccccccccevccccssccscsscesess 6-18
SYSTEM WILL NOT BOOT FLOWCHART .eccccsccccccccevccess 6-19
’ SYSTEM HALTS DURING PRIMOS cevcccsvcccccecccecseseess 6-20
SYSTEM HALTS FLOWCHART cccccccccccccccccscccecceseces 6-21
TABLE SYSTEM HALTS & DOES NOT MASTER CLEAR wecescccccccvers 6722
FIGURE 6-3: SYSTEM HALTS AND DOES NOT MASTER CLEAR FLOWCHART .... 6-23
TABLE 6-16: VALID SYSTEM HALTS .scccccccccccsccccccccccccecsesess 0724
FIGURE 6-4: VALID SYSTEM HALTS FLOWCHART ..cccccccccccccccccccses 6724
TABLE 6-17: SYSTEM HALT DURING COLD START .occcccccccccccccccesss 6725
FIGURE 6-5: SYSTEM HALTS DURING COLD START FLOWCHART ..-ceecceees 6-25
TABLE 6-18: NO LEDS vescocccccccccccccsccccccscccccsccscscccssses O27
FIGURE 6-6: NO LEDS LIGHT FLOWCHART cccccccccccccccccccccccescces 6-27
TABLE 6-19: SYSTEM HANGS wcccccccccccccccccvesscccsccesesecsscees 0-28
FIGURE 6-7: SYSTEM HANGS FLOWCHART ..ccccccscccccccccccsccccssess 6-29
TABLE 6~20: SYSTEM CONSOLE DOES NOT RESPOND ..cccccvecccecccesess 6-30
FIGURE 6-8: SYSTEM CONSOLE DOES NOT RESPOND FLOWCHART ...seeeeeee 6-31
TABLE 6-21: SLOW SYSTEM ~ STEP A
FIGURE 6-9: SLOW SYSTEM
TABLE 6-22: SLOW SYSTEM
FIGURE SLOW SYSTEM
wo
mOn
nS
ee 08
8
ee
ee
1
ot
WR
Hee
eee
oe on ee
0
U1
oe
be
oe
Wh
©
ee ee
Ceeeeecaseeeeoeeresreseeeeesreeesee 6-32
STEP A FLOWCHART ..cccccccncccccccccese 67-33
STEP B wccccnccccvccsvcccvvecesnsessess On 34
STEP B FLOWCHART ..scccccccsccenccesees 6-34
TABLE SLOW SYSTEM STEP C .wcuwcccccccaccccccccvscessersss 0735
FIGURE SLOW SYSTEM STEP C FLOWCHART ..ccvccccccvscceessees 6735
TABLE SYSTEM CRASH scccccccccrcccccnscccccccscccssesecssees 0736
TABLE LOGREC DISK ERRORS cescccccccccaccccsccvecscscsecsese O37
TABLE LOGREC MACHINE CHECKS cccccecccccccccccccccscesessses 6-38
TABLE LOGREC MEMORY PARITY ERRORS cecccccessevccevccssseves 6739
FIGURE E6, E7, E8 AND EQ MOS RAM LOCATIONS ...cceccccevcesee 67-40
FIGURE MEMORY ECCC ERROR scccoccnvcccvcsssvcccssccssesesnses 0-4)
TABLE 256KB INTERLEAVED DECODE (12128-E6) ..eccccecsccccses 6-41
TABLE 512KB INTERLEAVED DECODE (12256-E7) .scccccccesvccces 6-42
TABLE 1024KB INTERLEAVED DECODE (12512-E8) (7615-902) ..... 6-43
TABLE 6-31: 1045/1051 POWER SUPPLY TEST POINTS ..ccccccccvccceeee 67-45
TABLE 6-32: POWER SUPPLY RIPPLE ...ccccccceccccccessccsecescssses On746
TABLE 6-33: POWER SUPPLY OVER/UNDER VOLTAGE SPECIFICATIONS ...++. 6-46
FIGURE 6-14: POWER SUPPLY ADJUSTMENT ..ccccccccccvecvccccsescesess 0-46
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FIGURE
FIGURE
FIGURE
FIGURE
FIGURE
FIGURE
TABLE
vy
BOARD REMOVAL eevee eereeeneoeeneeesesreseenesreenesereenneer 7-
FCC CABINET FRONT FILTER AND BELT REMOVAL .eccceesces I>
FCC CABINET BLOWER UNIT REMOVAL ceccccovccvcsesevecee Im
FCC CABINET VANE SWITCH REMOVAL wecocsecesecccccseses Im
FCC CABINET PDU REPLACEMENT .occceccccccsccccscescsene IA10
FCC CABINET BACKPLANES cccccsccccccsesevesecccesceves Il]
50 SERIES FRUS ..cccceccncceccccscccvecssecccccsesece In12
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xviii

Prime
Proprietary
General
Description
CHAPTER 1
GENERAL DESCRIPTION
1.1 INTRODUCTION
Prime's™
current
50
Series™
products
are
the
150-11™
,
250-11™
,
550-11™
,
as
shown
in
Figure
1-1
and
Figure
1-2,
750™
,
and
850™
,
shown
in
Figure
1-3
and
Figure
1-4.
Obsolete
members
of
the
50
Series
include:
150,
250,
450
(all
2-board
processors),
550,
and
650
(3-board
processors)
systems.
CSD-550
FIGURE 1-1: --150-1I/250-11/550-11 CPU SYSTEM (NON-FCC)
The
main
technological
improvement
of
the
50
Series
current product
line
is
the
Virtual
Control
Panel
(VCP).
The
VCP
is
a
microprocessor
based
controller
which
replaces
the
System
Option
Controller
(serial
interface
for
the
system
console)
and
the
Control
Panel
(system
sense
switches
and
lights).
The
VCP
allows
the
operator
to
enter
English-like
commands
at
the
system
console,
instead
of
monitoring
control
panel
switches
and
lights.
1 - 41 070-C