Renesas M16C/50 Series User manual

RENESAS MCU
M16C Family / M16C/50 Series
Rev.1.10 Sep 2011
16
All information contained in these materials, including products and product specifications, represents
information on the product at the time of publication and is subject to change by Renesas Electronics
Corp. without notice. Please review the latest informaton published by Renesas Electronics Corp.
through various means, including the Renesas Electronics Corp. website (http://www.renesas.com).
User's Manual
www.renesas.com
M16C/5L Group, M16C/56 Group
User’s Manual: Hardware
User's Manual: Hardware

Notice
1. All information included in this document is current as of the date this document is issued. Such information, however, is
subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please
confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to
additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website.
2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights
of third parties by or arising from the use of Renesas Electronics products or technical information described in this document.
No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights
of Renesas Electronics or others.
3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part.
4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of
semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software,
and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by
you or third parties arising from the use of these circuits, software, or information.
5. When exporting the products or technology described in this document, you should comply with the applicable export control
laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas
Electronics products or the technology described in this document for any purpose relating to military applications or use by
the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and
technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited
under any applicable domestic or foreign laws or regulations.
6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics
does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages
incurred by you resulting from errors in or omissions from the information included herein.
7. Renesas Electronics products are classified according to the following three quality grades: “Standard”, “High Quality”, and
“Specific”. The recommended applications for each Renesas Electronics product depends on the product’s quality grade, as
indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular
application. You may not use any Renesas Electronics product for any application categorized as “Specific” without the prior
written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for
which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way
liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an
application categorized as “Specific” or for which the product is not intended where you have failed to obtain the prior written
consent of Renesas Electronics. The quality grade of each Renesas Electronics product is “Standard” unless otherwise
expressly specified in a Renesas Electronics data sheets or data books, etc.
“Standard”: Computers; office equipment; communications equipment; test and measurement equipment; audio and visual
equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots.
“High Quality”: Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-
crime systems; safety equipment; and medical equipment not specifically designed for life support.
“Specific”: Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or
systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare
intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life.
8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics,
especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation
characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or
damages arising out of the use of Renesas Electronics products beyond such specified ranges.
9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have
specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further,
Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to
guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a
Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire
control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because
the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system
manufactured by you.
10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental
compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable
laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS
Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with
applicable laws and regulations.
11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas
Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this
document or Renesas Electronics products, or if you have any other inquiries.
(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-
owned subsidiaries.
(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.

General Precautions in the Handling of MPU/MCU Products
The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes
on the products covered by this manual, refer to the relevant sections of the manual. If the descriptions under
General Precautions in the Handling of MPU/MCU Products and in the body of the manual differ from each
other, the description in the body of the manual takes precedence.
1. Handling of Unused Pins
Handle unused pins in accord with the directions given under Handling of Unused Pins in the
manual.
 The input pins of CMOS products are generally in the high-impedance state. In operation
with an unused pin in the open-circuit state, extra electromagnetic noise is induced in the
vicinity of LSI, an associated shoot-through current flows internally, and malfunctions occur
due to the false recognition of the pin state as an input signal become possible. Unused
pins should be handled as described under Handling of Unused Pins in the manual.
2. Processing at Power-on
The state of the product is undefined at the moment when power is supplied.
 The states of internal circuits in the LSI are indeterminate and the states of register
settings and pins are undefined at the moment when power is supplied.
In a finished product where the reset signal is applied to the external reset pin, the states
of pins are not guaranteed from the moment when power is supplied until the reset
process is completed.
In a similar way, the states of pins in a product that is reset by an on-chip power-on reset
function are not guaranteed from the moment when power is supplied until the power
reaches the level at which resetting has been specified.
3. Prohibition of Access to Reserved Addresses
Access to reserved addresses is prohibited.
 The reserved addresses are provided for the possible future expansion of functions. Do
not access these addresses; the correct operation of LSI is not guaranteed if they are
accessed.
4. Clock Signals
After applying a reset, only release the reset line after the operating clock signal has become
stable. When switching the clock signal during program execution, wait until the target clock
signal has stabilized.
 When the clock signal is generated with an external resonator (or from an external
oscillator) during a reset, ensure that the reset line is only released after full stabilization of
the clock signal. Moreover, when switching to a clock signal produced with an external
resonator (or by an external oscillator) while program execution is in progress, wait until
the target clock signal is stable.
5. Differences between Products
Before changing from one product to another, i.e. to one with a different part number, confirm
that the change will not lead to problems.
 The characteristics of MPU/MCU in the same group but having different part numbers may
differ because of the differences in internal memory capacity and layout pattern. When
changing to products of different part numbers, implement a system-evaluation test for
each of the products.

About This Manual
1. Purpose and Target User
This manual is designed to be read primarily by application developers who have an understanding of this
microcomputer (MCU) including its hardware functions and electrical characteristics. The user should have
a basic understanding of electric circuits, logic circuits and, MCUs.
This manual consists of six main categories: Overview, CPU, System Control, Peripherals, Electrical
Characteristics, and Usage Notes.
The M16C/5L Group, M16C/56 Group includes the documents listed below. Verify this manual is the latest
version by visiting the Renesas Electronics website.
Carefully read all notes in this document prior to use. Notes are found throughout each chapter, at the end
of each chapter, and in the dedicated Usage Notes chapter.
The Revision History at the end of this manual summarizes primary modifications and additions to the
previous versions. For details, please refer to the relative chapters or sections of this manual.
Type of Document Contents Document Name Document Number
Datasheet Overview of Hardware and Electrical
Characteristics M16C/5L Group, M16C/56 Group
Datasheet
R01DS0035EJ0110
User’s Manual:
Hardware Specifications and detailed descriptions of:
-pin layout
-memory map
-peripherals
-electrical characteristics
-timing characteristics
Refer to the Application Manual for
peripheral usage.
M16C/5L Group,
M16C/56 Group
User’s Manual:
Hardware
This publication
User’s Manual:
Software/Software
Manual
Descriptions of instruction set M16C/60, M16C/20,
M16C/Tiny Series
Software Manual
REJ09B0137
Application Note -Usages
-Applications
-Sample programs
-Programming technics using
Assembly language or C
programming language
Available on the Renesas Electronics
website.
Renesas Technical
Update Bulletins on product specifications, documents, etc.

2. Numbers and Symbols
The following explains the denotations used in this manual for registers, bits, pins and various numbers.
(1) Registers, bits, and pins
Registers, bits, and pins are indicated by symbols. Each symbol has a register/bit/pin identifier
after the symbol.
Example: PM03 bit in the PM0 register
P3_5 pin, VCC pin
(2) Numbers
A binary number has the suffix “b” except for a 1-bit value.
A hexadecimal number has the suffix “h”.
A decimal number has no suffix.
Example: Binary notation: 11b
Hexadecimal notation: EFA0h
Decimal notation: 1234

3. Registers
The following illustration describes registers used throughout this manual.
Symbol
EXAMPLE Address 9999h Reset Value 000X 1X00b
Example Register
Bit Symbol Bit Name Description
AAAA0 Example bit 0
RW
0 1 b0b7 b6 b5 b4 b3 b2 b1
RW
AAAA1 RW
Reserved Set this bit to 1. RW
Reserved Set this bit to 0. The read value is
undefined. RW
WO
AAAA6 Example bit 1 Functions vary with operating modes WO
Example flag RO
b2 b1
0 0 : XX function
0 1 : YY function
1 0 :Do not set this value.
1 1 : ZZ function
—
(b2) No register bit. If necessary, set this bit to 0. The read value is undefined. —
—
(b3)
—
(b4)
AAAA5
AAAA7 0: Example detected
1: Example not detected
See Note 1 See Note 2
See Note 4
See Note 3
Notes:
1. Blank box: Set this bit to 0 or 1 according to the function.
0: Set this bit to 0.
1: Set this bit to 1.
X: Nothing is assigned to this bit.
2. RW: Read and write
RO: Read only
WO: Write only (the read value is undefined)
—: Not applicable
3. Reserved bit: This bit field is reserved. Set this bit to a specified value. For RW bits, the written value is
read unless otherwise noted.
4.
yNo register bit(s): No register bit(s) is/are assigned to this field. If necessary, set to 0 for possible future
implementation.
yDo not use this combination: Proper operation is not guaranteed when this value is set.
yFunctions vary with operating modes: Functions vary with peripheral operating modes. Refer to register
illustrations of the respective mode.

4. Abbreviations and Acronyms
The following acronyms and terms are used throughout this manual.
All trademarks and registered trademarks are the property of their respective owners.
Abbreviation/Acronym Meaning
ACIA Asynchronous Communication Interface Adapter
bps bits per second
CRC Cyclic Redundancy Check
DMA Direct Memory Access
DMAC Direct Memory Access Controller
GSM Global System for Mobile Communications
Hi-Z High Impedance
IEBus Inter Equipment Bus
I/O Input/Output
IrDA Infrared Data Association
LSB Least Significant Bit
MSB Most Significant Bit
NC Non-Connection
PLL Phase Locked Loop
PWM Pulse Width Modulation
SIM Subscriber Identity Module
UART Universal Asynchronous Receiver/Transmitter
VCO Voltage Controlled Oscillator

A- 1
Quick Reference ...............................................................................................................B-1
1. Overview ..................................................................................................1
1.1 Features........................................................................................................................................ 1
1.1.1 Applications ......................................................................................................................... 1
1.2 Specifications................................................................................................................................ 2
1.3 Product List................................................................................................................................... 6
1.4 Block Diagram .............................................................................................................................. 8
1.5 Pin Assignments......................................................................................................................... 10
1.6 Pin Functions.............................................................................................................................. 16
2. Central Processing Unit (CPU)...............................................................19
2.1 Data Registers (R0, R1, R2, and R3).........................................................................................20
2.2 Address Registers (A0 and A1).................................................................................................. 20
2.3 Frame Base Register (FB).......................................................................................................... 20
2.4 Interrupt Table Register (INTB)................................................................................................... 20
2.5 Program Counter (PC)................................................................................................................ 20
2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) ...................................................... 20
2.7 Static Base Register (SB)........................................................................................................... 20
2.8 Flag Register (FLG).................................................................................................................... 20
2.8.1 Carry Flag (C Flag) ............................................................................................................ 20
2.8.2 Debug Flag (D Flag) .......................................................................................................... 20
2.8.3 Zero Flag (Z Flag) .............................................................................................................. 20
2.8.4 Sign Flag (S Flag) .............................................................................................................. 20
2.8.5 Register Bank Select Flag (B Flag) ................................................................................... 20
2.8.6 Overflow Flag (O Flag) ...................................................................................................... 20
2.8.7 Interrupt Enable Flag (I Flag) ............................................................................................. 21
2.8.8 Stack Pointer Select Flag (U Flag) .................................................................................... 21
2.8.9 Processor Interrupt Priority Level (IPL) ............................................................................. 21
2.8.10 Reserved Areas ................................................................................................................. 21
3. Memory ..................................................................................................22
4. Special Function Registers (SFRs) ........................................................24
4.1 SFRs........................................................................................................................................... 24
4.2 Notes on SFRs ........................................................................................................................... 55
4.2.1 Register Settings ............................................................................................................... 55
5. Protection...............................................................................................57
5.1 Introduction................................................................................................................................. 57
5.2 Register ...................................................................................................................................... 57
Table of Contents

A- 2
5.2.1 Protect Register (PRCR) ...................................................................................................57
5.3 Notes on Protection.................................................................................................................... 59
6. Resets....................................................................................................60
6.1 Introduction................................................................................................................................. 60
6.2 Registers..................................................................................................................................... 62
6.2.1 Processor Mode Register 0 (PM0) .................................................................................... 62
6.2.2 Reset Source Determine Register (RSTFR) ..................................................................... 63
6.3 Optional Function Select Area.................................................................................................... 64
6.3.1 Optional Function Select Address 1 (OFS1) ..................................................................... 64
6.4 Operations.................................................................................................................................. 66
6.4.1 Status after Reset .............................................................................................................. 66
6.4.2 Hardware Reset ................................................................................................................. 68
6.4.3 Power-On Reset Function ................................................................................................. 69
6.4.4 Voltage Monitor 0 Reset .................................................................................................... 70
6.4.5 Voltage Monitor 2 Reset .................................................................................................... 70
6.4.6 Oscillator Stop Detect Reset ..............................................................................................70
6.4.7 Watchdog Timer Reset ......................................................................................................70
6.4.8 Software Reset .................................................................................................................. 71
6.5 Notes on Resets......................................................................................................................... 72
6.5.1 Power Supply Rising Gradient ........................................................................................... 72
6.5.2 Power-On Reset ................................................................................................................ 72
6.5.3 OSDR Bit (Oscillation Stop Detect Reset Detect Flag) ...................................................... 72
6.5.4 Hardware Reset When VCC < Vdet0 ................................................................................ 72
7. Voltage Detector.....................................................................................73
7.1 Introduction................................................................................................................................. 73
7.2 Registers..................................................................................................................................... 74
7.2.1 Voltage Detector 2 Flag Register (VCR1) .......................................................................... 75
7.2.2 Voltage Detector Operation Enable Register (VCR2) ........................................................ 76
7.2.3 Voltage Monitor Function Select Register (VWCE) ........................................................... 77
7.2.4 Voltage Detector 2 Level Select Register (VD2LS) ........................................................... 78
7.2.5 Voltage Monitor 0 Control Register (VW0C) ...................................................................... 79
7.2.6 Voltage Monitor 2 Control Register (VW2C) ...................................................................... 80
7.3 Optional Function Select Area.................................................................................................... 82
7.3.1 Optional Function Select Address 1 (OFS1) ..................................................................... 82
7.4 Operations.................................................................................................................................. 83
7.4.1 Digital Filter ........................................................................................................................ 83
7.4.2 Voltage Detector 0 ............................................................................................................. 84
7.4.3 Voltage Detector 2 ............................................................................................................. 86
7.5 Interrupts..................................................................................................................................... 89

A- 3
8. Clock Generator.....................................................................................90
8.1 Introduction................................................................................................................................. 90
8.2 Registers..................................................................................................................................... 92
8.2.1 System Clock Control Register 0 (CM0) ............................................................................ 93
8.2.2 System Clock Control Register 1 (CM1) ............................................................................ 95
8.2.3 Oscillation Stop Detection Register (CM2) ........................................................................ 97
8.2.4 Peripheral Clock Select Register (PCLKR) ....................................................................... 99
8.2.5 PLL Control Register 0 (PLC0) ........................................................................................ 100
8.2.6 Processor Mode Register 2 (PM2) .................................................................................. 101
8.2.7 40 MHz On-Chip Oscillator Control Register 0 (FRA0) ................................................... 102
8.2.8 40 MHz On-Chip Oscillator Control Register 2 (FRA2) ................................................... 103
8.3 Clocks Generated by Clock Generators................................................................................... 104
8.3.1 Main Clock ....................................................................................................................... 104
8.3.2 PLL Clock ........................................................................................................................ 105
8.3.3 fOCO40M ........................................................................................................................ 106
8.3.4 fOCO-F ............................................................................................................................ 106
8.3.5 125 kHz On-Chip Oscillator Clock (fOCO-S) ................................................................... 106
8.3.6 Sub Clock (fC) ................................................................................................................. 107
8.4 CPU Clock and Peripheral Function Clocks............................................................................. 108
8.4.1 CPU Clock and BCLK ...................................................................................................... 108
8.4.2 Peripheral Function Clocks (f1, fOCO40M, fOCO-F, fOCO-S, fC32, fC, Main Clock) ..... 108
8.5 Clock Output Function...............................................................................................................110
8.6 System Clock Protection Function.............................................................................................110
8.7 Oscillator Stop/Restart Detect Function.....................................................................................111
8.7.1 Operation When CM27 Bit is 0 (Oscillator Stop Detect Reset) .........................................111
8.7.2 Operation When CM27 Bit is 1 (Oscillator Stop/Restart Detect Interrupt) ........................112
8.7.3 Using the Oscillator Stop/Restart Detect Function ...........................................................113
8.8 Interrupt .....................................................................................................................................113
8.9 Notes on Clock Generator.........................................................................................................114
8.9.1 Oscillator Using a Crystal or a Ceramic Resonator ..........................................................114
8.9.2 Noise Countermeasure .....................................................................................................115
8.9.3 CPU Clock ........................................................................................................................116
8.9.4 Oscillator Stop/Restart Detect Function ............................................................................116
8.9.5 PLL Frequency Synthesizer .............................................................................................117
9. Power Control....................................................................................... 118
9.1 Introduction................................................................................................................................118
9.2 Registers....................................................................................................................................118
9.2.1 Flash Memory Control Register 0 (FMR0) ........................................................................119
9.2.2 Flash Memory Control Register 2 (FMR2) ....................................................................... 120
9.3 Clock......................................................................................................................................... 122