
ISL9122AIIN-EVZ, ISL9122AIRN-EVZ 1. Functional Description
R12UZ0080EU0101 Rev.1.01 Page 4 of 16
Oct.1.20
force a manual connection; the button should turn green. If the button remains brown, please check the cable
connections, change to another USB port on computer, or try reinstalling the ISL9122 GUI software.
7. Set the 7-bit I2C address to 0x18, which matches with ISL9122A I2C address. Selecting READ ALL reads from
all registers simultaneously and populates all the register panels. Using WRITE ALL overwrites all the writable
registers with the values specified or modified in the GUI.
8. The ISL9122A has five control registers. See Tabl e 2 through Table 6 for detailed register descriptions.
9. Register RO_REG1 (Address: 0x02) provides chip identification information. See Table 2 for its register
contents. The Get IC INFO_RO_REG1 button reads from this read-only register.
10. To change the output voltage, you can use the VSET Control slider in the VSET register (Address: 0x11) panel
and perform a Write REG operation. The output voltage ramps up at the slew rate specified in the DVSRATE
setting of CONV_CFG register. If the modified output voltage is lower than the initial value, its ramp down rate
depends on the applied load and output capacitance. The Read REG button provides the contents of the
register, so adjust the slider accordingly. Use Table 4 to decode the VSET content required for the desired
output voltage.
11. Register INTFLG_REG (Address: 0x03) contains the fault flags. The background color changes from green to
red: when (1) a fault occurs from the list in Table 3, and (2) this register is read using either the Check Fault
button or the READ ALL button. Each bit is set by a fault event and cleared when read. When the bit is cleared
after reading, the background color changes from red back to green.
12. Register CONV_CFG (Address: 0x12) contains crucial converter configuration bits. Table 5 describes its
register contents. Selecting the Write (or Read) button writes (or reads) the entire CONV_CFG register in one
go.
13. Use EN_AND bit to disable the converter through I2C by toggling the Soft Start EN_AND button from
Soft Start enabled to Soft Start inhibit.
14. Selecting the Soft DSCHG enabled button presents a soft discharge resistor on the output pin, when the
converter is disabled through I2C using the EN_AND bit. By default, the Soft DSCHG disabled button is
selected.
15. Use the DVSRATE drop-down list to modify the dynamic voltage scaling rate for voltage ramp up, when output
voltage is modified using the VSET register.
16. Use the FMODE drop-down list to select one of the forced operating modes: Normal (Auto-PFM, default),
Forced PWM and Forced Bypass.
17. Use the CTRL Type drop-down list to select the control mode between Type I and Type II error amplifier.
18. Register INTFLG_MASK (Address: 0x13) contains additional features influencing the part behavior. Selecting
the Write (or Read) button writes (or reads) the entire INTFLG_MASK register in one go.
19. As mentioned in Ta b l e 6 , use OC_FAULT drop-down to select the overcurrent handling mechanism for the
part. By default, the part is set to Hiccup mode during overcurrent, but this setting can be changed to
Shutdown mode or Current Limit mode using this register.
20. Use the EN_OR drop-down list to enable a push-button ON functionality for the EN pin. By default, this feature
is disabled.