Renesas M3A-HS71 User manual

REJ11J0012-0101
Rev. 1.01
Issued: May 07, 2008
32
Renesas 32-Bit RISC Microcomputers
SuperHTM RISC engine Family / SH7670 Series
M3A-HS71
User's Manual
SH7670 CPU Board

Table of Contents
Chapter1 Overview..............................................................................................................................1-1
1.1 Overview .................................................................................................................................................................... 1-2
1.2 Configuration.............................................................................................................................................................. 1-2
1.3 External Specifications............................................................................................................................................... 1-3
1.4 Block Diagram of SH7670 CPU Board....................................................................................................................... 1-5
1.5 External View ............................................................................................................................................................. 1-6
1.6 SH7670 CPU Board Memory Mapping....................................................................................................................... 1-7
1.7 Absolute Maximum Ratings........................................................................................................................................ 1-8
1.8 Recommended Operating Conditions ........................................................................................................................ 1-8
Chapter2 Functional Overview ............................................................................................................2-1
2.1 Functional Overview................................................................................................................................................... 2-2
2.2 CPU............................................................................................................................................................................ 2-3
2.2.1 SH7670 Outline................................................................................................................................................. 2-3
2.2.2 SH7670 Pin Function Used on SH7670 CPU Board......................................................................................... 2-3
2.2.3 SH7670 Multiplex Pin Used on the SH7670 CPU Board................................................................................. 2-11
2.3 Memory .................................................................................................................................................................... 2-15
2.3.1 RAM built in SH7670....................................................................................................................................... 2-15
2.3.2 Flash Memory Interface................................................................................................................................... 2-15
2.3.3 External SDRAM Interface.............................................................................................................................. 2-17
2.3.4 External EEPROM Interface............................................................................................................................ 2-20
2.4 USB Interface........................................................................................................................................................... 2-21
2.5 Serial Port Interface.................................................................................................................................................. 2-22
2.6 ST Interface.............................................................................................................................................................. 2-23
2.7 LAN Interface ........................................................................................................................................................... 2-24
2.8 I/O Port..................................................................................................................................................................... 2-26
2.9 Power Supply Circuit................................................................................................................................................ 2-28
2.10 Clock Module.......................................................................................................................................................... 2-29
2.11 Reset Module......................................................................................................................................................... 2-30
2.12 Interrupt Switch ...................................................................................................................................................... 2-31
2.13 E10A-USB Interface............................................................................................................................................... 2-32
Chapter3 Operational Specifications...................................................................................................3-1
3.1 SH7670 CPU Board Connector Overview.................................................................................................................. 3-2
3.1.1 LAN Connector (J1) .......................................................................................................................................... 3-3
3.1.2 USB Connector (J3).......................................................................................................................................... 3-4
3.1.3 Extension Connector (J5,J6,J8,J9,J11,J12, and J13) ....................................................................................... 3-5
3.1.4 STIF Connector (J7,J10)................................................................................................................................... 3-9
3.1.5 External Power Supply Connector (J14 and J18)............................................................................................ 3-11
3.1.6 Power Supply Connector (J15) ....................................................................................................................... 3-12
3.1.7 H-UDI Connector (J16).................................................................................................................................... 3-13
3.1.8 UART Connector (J20).................................................................................................................................... 3-14
(i)
3.2 Switch and LED Outline............................................................................................................................................ 3-15
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3.2.1 Jumper (JP1~JP7) .......................................................................................................................................... 3-16
3.2.2 Switch and LED Functions.............................................................................................................................. 3-18
3.3 Board Dimensions of SH7670 CPU Board............................................................................................................... 3-21
Appendix.............................................................................................................................................A-1
M3A-HS71 SCHEMATICS
(ii)
Rev. 1.01 2008.05.07
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Chapter1Overview
Chapter1
Overview
1-1

Overview
1.1 Overview
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1.1 Overview
The SH7670 CPU board is a CPU evaluation board designed for users to evaluate the functionality and
performance of the SH7670 group of Renesas Technology original microcomputers, as well as develop and evaluate
the application software for this group of microcomputers. The features of the SH7670 evaluation board are as
follows.
Board Part Number: M3A-HS71
<The Features of SH7670 CPU Board>
zAs external memories, a 64MB (8 Mbytes) flash memory (16-bit bus connection), two 256MB (32 Mbytes)
SDRAMs (32-bit bus connection) are mounted.
zAs the SH7670 peripheral function interface, a USB connector, LAN connector are standard mounted. In
addition, the general purpose 20-pin MIL standard connector is also installed as the connector for MPEG
transport stream interface (STIF).
zAll pins of SH7670 data bus, address bus, and on-chip peripheral functions are connected to the extension
connector. (For extension board and monitoring signals with using measurement instruments)
zThe on-chip emulator E10A-USB made by Renesas Technology (with no AUD function: 14-pin connector) can
be used.
1.2 Configuration
Figure 1.2.1 shows an example of system configuration using the SH7670 CPU board.
DC 5V
Power
Supply
(1.5A min.)
H-UDI connector
RS-232C
J15
SH7670 CPU board
M3A-HS71
*
* : The user must prepare these separately on their own.
SH7670
HEW
debugger
Host
Computer *E10A-USB*
High-performance Embedded
Workshop (HEW)*
SuperH RISC engine
C/C++ compiler package*
LANUSB
STIF
Figure 1.2.1 SH7670 CPU Board System Configuration Example

Overview
1.3 External Specifications
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1.3 External Specifications
Table 1.3.1 and Table 1.3.2 list the external specifications of SH7670 CPU board.
Table 1.3.1 External Specifications of SH7670 CPU Board (1)
No. Item Content
1 CPU
SH7670
•Input(XIN) clock: 16.67 MHz
•Bus clock: Maximum 66.67 MHz,
•CPU clock: Maximum 200 MHz
•On-chip memory
• RAM: 32KB
• Instruction cache : 8 KB
• Operand cache : 8 KB
Power voltage: internal : 1.2 V, I/O 3.3 V
256-pin BGA 0.8 mm pitch (Package code: PRBG0256GA-A)
2 External Memory
The following memories are mounted
•SDRAM
• EDS2516APTA-75 (Elpida) x 2 : 64 MB
• 32-bit bus width
•Flash memory
• S29GL064A90TFIR4 : 8 MB
• 16-bit data bus width fixed
•EEPROM (IIC3)
・HN58X24128FPIE x 1 : 16KB
3 Ether •RJ-45LAN connector with on-chip pulse transformer (8-pin, RJ-45)
•Realtek PHY-LSI RTL8201CP-VD-LF is mounted
4 USB
•USB connector
→Series A socket built-in. (Mini-AB/Mini-B connectors for Host/Function
evaluation can be mounted on the board)
•VBUS power control
5 Connectors and
Through-hole
zH-UDI connector (14-pin)
zSerial port connector (D-sub 9-pin)
z20-pin MIL standard connector
• SH7670 extension connector: 4 pcs.
• SH7670 ST I/F connector : 2 pcs.
z40-pin MIL standard connector
• SH7670 extension connector: 2 pcs.
6 LED
•Power LED (1 pc.)
•User LED (Connect to the port pins of SH7670): 4 pcs.
•LED for Ethernet communication status (5 pcs.)

Overview
1.3 External Specifications
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Table 1.3.2 External Specifications of SH7670 CPU Board (2)
No. Item Content
7 Switch
•Reset switch: 1 pc.
•NMI switch: 1 pc.
•IRQ0 switch: 1 pc.
•Test switch: 1 pc.
•DIP switch for mode setting: 1 pc. (5-pole)
•DIP switch for user: 1 pc. (4-pole)
•Switch for PHY controller operation mode : 1 pc. (6-pole)
8 Board Size
•Dimensions : 145mm x 150mm
•Mounting form : 4-layer, double-side mounted
•Board configuration : 1 board

Overview
1.4 Block Diagram of SH7670 CPU Board
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1.4 Block Diagram of SH7670 CPU Board
Figure 1.4.1 shows the system block diagram of SH7670 CPU board.
SH7670
(200MHz)
Switch
(Interrupt, DIP switch)
ST
connector
32bit
Flash memory
(8MB)
Flash memory
(8MB)
H-UDI (14-pin) Serial port connector
USB
connector
Extension
connector
STIF
BSC
USB
PIO
H-UDI SCIF
INTC
VBUS
control
PIO
32bit 16bit
IIC3
EEPROM
(16KB)
EEPROM
(16KB)
LAN
connector EtherC
Extension connector
(HIF bus)
16bit
SDRAM
(16MB)
SDRAM
(16MB)
SDRAM
(64MB)
SDRAM
(64MB)
32bit
HIF
Peripheral
I/O
PHY-LSI
Figure 1.4.1 SH7670 CPU Board System Block Diagram

Overview
1.5 External View
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1.5 External View
Figure 1.5.1 shows the SH7670 CPU board overview (the image of component placement).
<Top view of the component side>
<Top view of the solder side> U10
3.3V swiching
regulator U2
Clock buffer
U11
1.2V
DC converter
：SH7670 extension connector (Not mounted)
Figure 1.5.1 SH7670 CPU Board Overview

Overview
1.6 SH7670 CPU Board Memory Mapping
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1.6 SH7670 CPU Board Memory Mapping
Figure 1.6.1 shows the SH7670 memory mapping of the SH7670 CPU board.
Logical
Address SH7670 Logical Space SH7670 CPU Board Memory Mapping
H'0000 0000
H'007F FFFF CS0 Space: 64 MB Flash Memory (8 MB)
16-bit bus
User Area
H'0400 0000
Reserved Area Reserved Area
(Disabled)
H'0800 0000
Reserved Area Reserved Area
(Disabled)
H'0C00 0000
H'0FFF FFFF CS3 space: 64 MB SDRAM (64 MB)
32-bit bus
H'1000 0000
CS4 space: 64 MB User Area
H'1400 0000
CS5 space: 64 MB User Area
H'1800 0000
CS6 space: 64 MB User Area
H'1C00 0000
Reserved Area Reserved Area
(Disabled)
H'2000 0000
CS0~CS6 space
(Cache disabled space) CS0~CS6 space (Cache disabled space)
H'8000 0000
Reserved Area
(Disabled) Reserved Area (Disabled)
H'FFF8 0000
On-chip RAM (32 KB) On-chip RAM (32 KB)
H'FFF8 8000
H'FFF8 FFFF On-chip RAM Reserved On-chip RAM Reserved
H'FFFC 0000
H'FFFF FFFF On-chip peripheral module On-chip peripheral module
Figure 1.6.1 SH7670 CPU Board Memory Mapping

Overview
1.7 Absolute Maximum Ratings
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1.7 Absolute Maximum Ratings
Table 1.7.1 lists the absolute maximum ratings of the SH7670 CPU board.
Table 1.7.1 Absolute Maximum Ratings of the SH7670 CPU Board
Symbol Parameter Rated Value Remarks
VCC 5V system power supply voltage -0.3V to 6.0V Relative to VSS
3VCC 3.3V system power supply voltage -0.3V to 4.6V Relative to VSS
1.2VCC 1.2V system power supply voltage -0.3V to 1.7V Relative to VSS
Topr Operating ambient temperature -10°C to 55°C No dewdrops allowed.
Use in corrosive gas environment prohibited.
Tstr Storage ambient temperature -20°C to 60°C No dewdrops allowed.
Use in corrosive gas environment prohibited.
Note: The ambient temperature refers to the air temperature in places closest possible to the board.
1.8 Recommended Operating Conditions
Table 1.8.1 lists the recommended operating conditions of the SH7670 CPU board.
Table 1.8.1 Operating Condition of SH7670 CPU Board
Symbol Parameter Rated Value Remarks
VCC 5V system power supply voltage 4.75V to 5.25V Relative to VSS
3VCC 3.3V system power supply voltage 3.0V to 3.6V Relative to VSS
1.2VCC 1.2V system power supply voltage 1.1V to 1.3V Relative to VSS
‐Maximum current consumption in
the board
Within 1.5A
Topr Operating ambient temperature 0°C to 40°C No dewdrops allowed.
Use in corrosive gas environment prohibited.

2-1
Chapter2Functional Overview
Chapter2
Functional Overview

Functional Overview
2.1 Functional Overview
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2.1 Functional Overview
Table 2.1.1 lists the function modules of SH7670 CPU board.
Table 2.1.1 Functional Modules of SH7670 CPU Board
Section Function Content
2.2 CPU SH7670
•Input(XIN) Clock: 16.67 MHz
•Bus Clock: 66.67 MHz
•CPU Clock: Maximum 200 MHz
2.3 Memory The following memories are mounted
•SDRAM: Maximum 64 MB
• EDS2516APTA-75 x 2: 64 MB
• 32-bit bus width
•Flash memory
• S29GL064A90TFIR4 x 1: 8 MB
• 16-bit data bus width fixed
•EEPROM
• HN58X24128FPIE x 1: 16 KB
2.4 USB Interface Mounts USB connector
2.5 Serial Port Interface Connects the SH7670 SCIF0 to serial port connector
2.6 ST Interface Connects the SH7670 ST interface signal to the ST connector(channel 1
and 2)
2.7 LAN Interface Connects the SH7670 Ethernet controller to PHY LSI
2.8 I/O Port Connects the SH7670 I/O port
2.9 Power Supply Circuit Controls the system power control of SH7670 CPU board
2.10 Clock Module Clock control
2.11 Reset Module Reset control for device mounted on the SH7670 CPU board
2.12 Interrupt Switch Connects the NMI pin and IREQ0 pin
2.13 E10A-USB Interface SH7670 H-UDI interface
- Operational Specifications Connector, switch, LED
•SH7670 extension connector
•Switch, LED
•H-UDI connector
Details are described in Chapter 3

Functional Overview
2.2 CPU
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2.2 CPU
2.2.1 SH7670 Outline
The SH7670 CPU board contains the 32-bit RISC microcomputer SH7670 that operates with a maximum 200MHz
of CPU clock frequency.
2.2.2 SH7670 Pin Function Used on SH7670 CPU Board
Table 2.2.1~Table 2.2.8 list the SH7670 pin functions used on the SH7670 CPU board.
Table 2.2.1 SH7670 Pin Selection Used on SH7670 CPU Board (1)
Type Pin I/O Name Function of SH7670 CPU Board Destination to Connect
Clock EXTAL I External clock Inputs 16.67 MHz from oscillator Connects to oscillator
XTAL O Crystal Crystal resonator is connected
CKIO O System clock Clock output CKIO is branched to connect the
followings
• Connects to SDRAM
• Connects to an extension
connector
Operating
Mode MD_BW I Mode setting The bus width for CS0 space is set to 16-bit.
MD_BW="L" Connects to GND
MD_CK1
MD_CK0 I Clock mode setting Clock mode is switched.
Clock mode 0 :
MD_CLK0="L",MD_CLK1="L"
Clock mode 1 :
MD_CLK0="H",MD_CLK1="L"
Clock mode 3 :
MD_CLK0="H",MD_CLK1="H"
Switching between MD_CLK0 and MD_CLK1
is executed with the DIP switch SW.
• Connects to DIP switch for
mode setting
MD_CK0, MD_CK1
System
Control RES# I Power-on
reset When power-on-reset and pressing the reset
SW, it becomes a power-on-reset state. Connects to reset circuit
Bus
Control CS0# OChip select Chip select signal
CS0# Connects to CE# signal of NOR
flash memory (U3-26)
CS3#
OChip select Chip select signal
CS3# • Connects to the CS＃pin of
SDRAM (U4-19,U5-19)
• Connects to an extension
connector (J9-11),
CS4#
OChip select Chip select signal
CS4#(PB06/CS4#) Connects to an extension
connector (J9-5)
CS5#
OChip select Chip select signal
CS5#(PB05/CS5#/CE1A#/IRQ3/TEND1) Connects to an extension
connector (J8-11)
CS6#
OChip select Chip select signal
CS6#(PB03/CS6#/CE1B#/IRQ1/DREQ1) Connects to an extension
connector (J9-7)
CKE
OCK enable CK enable signal
CKE • Connects to the CKE＃pin of
SDRAM (U4-37,U5-37)
• Connects to an extension
connector (J9-14)

Functional Overview
2.2 CPU
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Table 2.2.2 SH7670 Pin Selection Used on SH7670 CPU Board (2)
Type Pin I/O Name
Function of SH7670 CPU
Board Destination to Connect
RAS#
ORAS RAS signal
RAS# • Connects to the RAS# pin of SDRAM (U4-18,U5-18)
• Connects to an extension
connector (J9-12)
CAS#
OCAS CAS signal
CAS# • Connects to the CAS# pin of SDRAM (U4-17,U5-17)
• Connects to an extension
connector (J9-13)
RD/WR#
ORead-write Read-write signal
RD/WR# • Connects to the WE# pin of SDRAM (U4-16,U5-16)
• Connects to an extension
connector (J9-15)
RD#
ORead Read signal
RD# • Connects to the OE# signal of NOR flash memory (U3-28)
• Connects to an extension
connector (J12-5)
WE0#/DQMLL
OLeast significant byte
written/least
significant byte
selection
D7-D0 is selected
WE0#/DQMLL(WE0#/DQM
LL)
• Connects to the WE# pin of NOR
flash memory (U3-11)
• Connects to the DQML pin of
SDRAM (U5-15)
• Connects to an extension
connector (J9-19)
WE1#/DQMLU
OThird byte
written/third byte
selection
D15-D8 is selected
DQMLU(WE1#/DQMLU/WE
#)
• Connects to the DQMU pin of
SDRAM (U5-39)
• Connects to an extension
connector (J9-18)
WE2#/DQMUL
OSecond byte
written/second byte
selection
D23-D16 is selected
DQMUL(WE2#/DQMUL/ICI
ORD#)
• Connects to the DQMU pin of
SDRAM (U4-15)
• Connects to an extension
connector (J9-17)
WE3#/DQMUU
OMost significant byte
written/most
significant byte
selection
D31-D24 is selected
DQMUU(WE3#/DQMUU/ICI
OWR#)
• Connects to the DQML pin of
SDRAM (U4-39)
• Connects to an extension
connector (J9-16)
WAIT# I Wait WAIT#: PB00/WAIT#/SDA Connects to an extension connector
(J9-10)
Address Bus A25-A00 OAddress bus 26-bit address bus • A25-A00
Connects to an extension
connector (J12)
• A22-A01
Connects to FLASH (U3)
• A16-A02
Connects to SDRAM (U4,U5)
Data Bus D31-D00 OData bus 32-bit data bus • D15-D00
Connects to FLASH (U3)
• D31-D00
SDRAM(U4,U5)
Connects to an extension
connector (J5)

Functional Overview
2.2.2 SH7670 Pin Function Used on SH7670 CPU Board
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Table 2.2.3 SH7670 Pin Selection Used on SH7670 CPU Board (3)
Type Pin I/O Name Function of SH7670 CPU Board Destination to Connect
INTC IRQ I Interrupt
request Interrupt request pin which can select level and edge input.
Each IRQ pin is connected to the
followings.
• IRQ7#(PD07/IRQ7#/SDCLK)
• IRQ6#(PD06/IRQ6#/SDCMD)
• IRQ5#(PD05/IRQ5#/SDCD)
• IRQ4#(PD04/IRQ4#/SDWP)
• IRQ3#(PD03/IRQ3#/SDDATA3)
• IRQ2#(PD02/IRQ2#/SDDATA2)
• IRQ1#(PD01/IRQ1#/SDDATA1)
• IRQ0#(PD00/IRQ0#/SDDATA0)
•
IRQ3(PB05/CS5#/CE1A#/IRQ3/TEND1)
• IRQ2(PB04/CE2A#/IRQ2/DACK1)
•
IRQ1(PB03/CS6#/CE1B#/IRQ1/DREQ1)
• IRQ0(PB02/CE2B#/IRQ0)
• Connects to an extension connector
IRQ7#(J8-12)
IRQ6#(J8-13)
IRQ5#(J8-14)
IRQ4#(J8-15)
IRQ3#(J8-16)
IRQ2#(J8-17)
IRQ1#(J8-18)
IRQ0#(J8-19)
IRQ3(J8-11)
IRQ2(J9-6)
IRQ1(J9-7)
IRQ0(J9-8)
• Connects to push switch
IRQ0 (SW5)
• Connects to VBUS IRQ1(U8-2)
DMA
C DREQ1
DREQ0 I DMA transfer
request External DMA transfer request input pin
DREQ1(PB03/CS6#/CE1B#/IRQ1/DREQ1)
DREQ0(PF09/ST0_VLD/DREQ0)
• Connects to an extension connector
DREQ1(J9-7)
• Connects to ST connector
DREQ1(J7-16)
DACK1
DACK0 ODMA transfer
request is
acknowledged
Request acknowledge output pin to
external DMA transfer request
DACK1(PB04/CE2A#/IRQ2/DACK1)
DACK0(PF10/ST0_SYC//DACK0)
• Connects to an extension connector
DACK1(J9-6)
• Connects to ST connector
DACK0(J7-15)
TEND1
TEND0 ODMA transfer
completion
output
DMA transfer completion output signal
TEND1(PB05/CS5#/CE1A#/IRQ3/TEND1)
TEND0(PF11/ST0_PWM/TEND0)
• Connects to an extension connector
TEND1(J8-11)
• Connects to ST connector
TEND0(J7-17)
Ether CRS ICarrier sense Carrier sense pin
CRS(PC15/CRS) Connects to PHY-LSI (U7-23)
COL ICollision Collision detection pin
COL(PC14/COL) Connects to PHY-LSI (U7-1)
MII_TXD3
MII_TXD2
MII_TXD1
MII_TXD0
OSending data ４-bit sending data pin
MII_TXD3(PC07/MII_TXD3)
MII_TXD2(PC06/MII_TXD2)
MII_TXD1(PC05/MII_TXD1)
MII_TXD0(PC04/MII_TXD0)
Connects to PHY-LSI
MII_TXD3(U7-3)
MII_TXD2(U7-4)
MII_TXD1(U7-5)
MII_TXD0(U7-6)
TX_EN
OSending
enable Indicates that sending data is ready for MII_TXD3-0
TX_EN(PC12/TX_EN)
Connects to PHY-LSI (U7-2)
TX_CLK I Sending clock Reference timing of TX_EN, TX_ER, and
MII_TXD3-0
TX_CLK(PC13/TX_CLK)
Connects to PHY-LSI (U7-7)
TX_ER O Sending error Pins notifying PHY-LSI of the error in
transmitting
TX_ER(PC11/TX_ER) Connects to an extension connector
(J11-6)
MII_RXD3
MII_RXD2
MII_RXD1
MII_RXD0
IReceive data ４-bit receiving data pin
MII_RXD3(PC03/MII_RXD3)
MII_RXD2(PC02/MII_RXD2)
MII_RXD1(PC01/MII_RXD1)
MII_RXD0(PC00/MII_RXD0)
Connects to PHY-LSI
MII_RXD3(U7-18)
MII_RXD2(U7-19)
MII_RXD1(U7-20)
MII_RXD0(U7-21)
RX_DV
IReceive data
valid Indicates that there is enabled receiving data for MII_RXD3-0
RX_DV(PC08/RX_DV)
Connects to PHY-LSI (U7-22)

Functional Overview
2.2.2 SH7670 Pin Function Used on SH7670 CPU Board
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Table 2.2.4 SH7670 Pin Selection Used on SH7670 CPU Board (4)
Type Pin I/O Name Function of SH7670 CPU Board Destination to Connect
Ether RX_CLK
IReceiving clock Reference timing of RX_DV, RX_ER, and
MII_RXD3-0
RX_CLK(PC10/RX_CLK)
Connects to PHY-LSI
(U7-16)
RX_ER
IReceive error Pins recognizing the error state occurred in
receiving
RX_ER: (PC09/RX_ER)
Connects to PHY-LSI
(U7-24)
MDC O Clock for
management Reference timing input of transfer
information by MDIO
MDC: (PC17/MDC)
Connects to PHY-LSI
(U7-25)
MDIO I/O Data I/O for
management Bidirectional pin for exchanging
management information
MDIO(PC16/MDIO)
Connects to PHY-LSI
(U7-26)
WOL O MAGIC packet
receive Pin indicating Magic Packet™ * receive WOL(PC20/WOL) Connects to an extension connector (J11-3)
LNKSTA I Link status Link state input pin from PHY-LSI
LNKSTA(PC18/LNKSTA) Connects to an extension connector (J11-4)
EXOUT
OGeneral output External output pin
EXOUT(PC19/EXOUT) Connects to an extension
connector (J11-5)
STIF ST_CLKO
UT OClock output Data clock output
ST_CLKOUT Connects to ST connector (J7-2,J10-2)
ST1_CLKI
N
ST0_CLKI
N
I Clock input Data clock input
ST1_CLKIN(ST1_CLKIN/SSISCK1)
ST0_CLKIN(ST0_CLKIN/SSISCK0)
Connects to ST
connector
ST1_CLKIN(J10-1)
ST0_CLKIN(J7-1)
ST1_SYC
ST0_SYC I/O Synchronous signal Synchronous signal ST1_SYC(PE10/ST1_SYC/CTS2)
ST0_SYC(PF10/ST0_SYC/DACK0)
Connects to ST
connector
ST1_SYC(J10-15)
ST0_SYC(J7-15)
ST1_REQ
ST0_REQ I/O Request Request signal ST1_REQ(PE08/ST1_REQ/TxD2)
ST0_REQ(PF08/ST0_REQ)
Connects to ST
connector
ST1_REQ(J10-18)
ST0_REQ(J7-18)
ST1_VLD
ST0_VLD I/O Data enable Data enable ST1_VLD(PE09/ST1_VLD/SCK2)
ST0_VLD(PF09/ST0_VLD/DREQ0)
Connects to ST
connector
ST1_VLD(J10-16)
ST0_VLD(J7-16)
ST1_D7
ST1_D6
ST1_D5
ST1_D4
ST1_D3
ST1_D2
ST1_D1
ST1_D0
ST0_D7
ST0_D6
ST0_D5
ST0_D4
ST0_D3
ST0_D2
ST0_D1
ST0_D0
I/O Data Data (0 is used for serial mode)
ST1_D7(PE07/ST1_D7/SSIWS1)
ST1_D6(PE06/ST1_D6/SSIDATA1)
ST1_D5(PE05/ST1_D5/RTS1)
ST1_D4(PE04/ST1_D4/CTS1)
ST1_D3(PE03/ST1_D3/SCK1)
ST1_D2(PE02/ST1_D2/RxD1)
ST1_D1(PE01/ST1_D1/TxD1)
ST1_D0(PE00/ST1_D0/RxD2)
ST0_D7(PF07/ST0_D7/SSIWS0)
ST0_D6(PF06/ST0_D6/SSIDATA0)
ST0_D5(PF05/ST0_D5/RTS0)
ST0_D4(PF04/ST0_D4/CTS0)
ST0_D3(PF03/ST0_D3/SCK0)
ST0_D2(PF02/ST0_D2/RxD0)
ST0_D1(PF01/ST0_D1/TxD0)
ST0_D0(PF00/ST0_D0)
Connects to ST
connector
ST1_D7(J10-11)
ST1_D6(J10-6)
ST1_D5(J10-12)
ST1_D4(J10-5)
ST1_D3(J10-13)
ST1_D2(J10-4)
ST1_D1(J10-14)
ST1_D0(J10-3)
ST0_D7(J7-11)
ST0_D6(J7-6)
ST0_D5(J7-12)
ST0_D4(J7-5)
ST0_D3(J7-13)
ST0_D2(J7-4)
ST0_D1(J7-14)
ST0_D0(J7-3)

Functional Overview
2.2.2 SH7670 Pin Function Used on SH7670 CPU Board
Rev.1.01 2008.05.07 2-7
REJ11J0012-0101
2
Table 2.2.5 SH7670 Pin Selection Used on SH7670 CPU Board (5)
Type Pin I/O Name Function of SH7670 CPU Board Destination to
Connect
STIF ST1_VCO
_CLKIN,
ST0_VCO
_CLKIN
I VCX0 clock
VCX0 clock ST1_VCO_CLKIN
(ST1_VCO_CLKIN/AUDIO_CLK)
Connects to ST
connector
ST1_VCO_CLKIN
(J10-19)
ST0_VCO_CLKIN
(J7-19)
ST1_PWM
ST0_PWM O PWM output PWM output ST1_PWM(PE11/ST1_PWM/RTS2)
ST0_PWM(PF11/ST0_PWM/TEND0)
Connects to ST
connector
ST1_PWM(J10-17)
ST0_PWM(J7-17)
USB DP I/O USB D+ Data USB bus D+ Data Connects to USB
(J3-3)
DM
I/O USB D- Data USB bus D- data Connects to USB
(J3-2)
VBUS
IVBUS input Connects to Vbus of USB bus Connects to USB
(J3-1)
REFRIN
IReference input Connects to USBAPVss through 5.6KΩ±1%
resistance Connects to USB
USB_X1
USB_X2 I/O Input between
crystal resonator
for USB and
external clock
Crystal resonator for USB is connected.
USB_X1 can input an external clock Connects to crystal
resonator (48 MHz)
for USB (X5)
AV33
IUSB
analog pin power
supply
Transceiver analog pin power supply Connects to 3.3V
AG33
IUSB
analog pin GND Transceiver analog pin GND Connects to GND
DV33
IUSB
digital pin power
supply
Transceiver digital pin power supply
Connects to 3.3V
DG33
IUSB
digital pin GND Transceiver digital pin GND Connects to GND
AV12
IUSB
analog core
power supply
Transceiver analog core power supply Connects to 1.2V
AG12
IUSB
analog core GND Transceiver analog core GND Connects to GND
DV12
IUSB
digital pin power
supply
Transceiver digital pin power supply Connects to 1.2V
DG12
IUSB
digital pin GND Transceiver digital pin GND Connects to GND
UV12
IUSB
digital core
power supply
Transceiver digital core power supply Connects to 1.2V
UG12
IUSB
digital core GND Transceiver digital core GND Connects to GND

Functional Overview
2.2.2 SH7670 Pin Function Used on SH7670 CPU Board
Rev.1.01 2008.05.07 2-8
REJ11J0012-0101
2
Table 2.2.6 SH7670 Pin Selection Used on SH7670 CPU Board (6)
Type Pin I/O Name Function of SH7670 CPU Board Destination to
Connect
HIF HIFD15-
HIFD00 I/O HIF data bus Address/data/command I/O for HIF HIFD15(PG15/HIFD15)
HIFD14(PG14/HIFD14)
HIFD13(PG13/HIFD13)
HIFD12(PG12/HIFD12)
HIFD11(PG11/HIFD11)
HIFD10(PG10/HIFD10)
HIFD09(PG09/HIFD09)
HIFD08(PG08/HIFD08)
HIFD07(PG07/HIFD07)
HIFD06(PG06/HIFD06)
HIFD05(PG05/HIFD05)
HIFD04(PG04/HIFD04)
HIFD03(PG03/HIFD03)
HIFD02(PG02/HIFD02)
HIFD01(PG01/HIFD01)
HIFD00(PG00/HIFD00)
Connects to an
extension connector
HIFD15(J13-4)
HIFD14(J13-5)
HIFD13(J13-6)
HIFD12(J13-7)
HIFD11(J13-8)
HIFD10(J13-9)
HIFD09(J13-10)
HIFD08(J13-11)
HIFD07(J13-12)
HIFD06(J13-13)
HIFD05(J13-14)
HIFD04(J13-15)
HIFD03(J13-16)
HIFD02(J13-17)
HIFD01(J13-18)
HIFD00(J13-19)
HIFCS#
IHIF chip select Chip select input for HIF
HIFCS#(PG23/HIFCS#) Connects to an
extension connector
(J8-3)
HIFRS
IHIF register
select Instruction of switching access type for HIF
HIFRS(PG22/HIFRS) Connects to an
extension connector
(J8-4)
HIFWR#
IHIF write Write strobe signal
HIFWR#(PG21/HIFWR#) Connects to an
extension connector
(J8-5)
HIFRD#
IHIF read Read strobe signal
HIFRD#(PG20/HIFRD#) Connects to an
extension connector
(J13-3)
HIFINT# O HIF interrupt Interrupt request from HIF to external device
HIFIHT#(PG19/HIFINT#) Connects to an
extension connector
(J8-6)
HIFMD I HIF mode HIF boot mode is specified
HIFMD only enable for power-on-reset by RES#
pin (HIFMD/PA25/A25)
Connects to the DIP
switch for mode
setting (SW8-7)
HIFDREQ O HIFDMAC
transfer request For external device, DMAC transfer to HIFRAM is requested
HIFDREQ(PG18/HIFDREQ)
Connects to an
extension connector
(J8-7)
HIFEBL I HIF pin
enable By inputting high level, HIF pin except this pin is
activated
HIFEBL(PG16/HIFEBL)
Connects to an
extension connector
(J8-9)
HIFRDY O HIF boot ready
Indicates that, in this LSI, reset to HIF module is
released to be possible to acknowledge the
access to HIF module from external devices.
HIFRDY(PG17/HIFRDY)
Connects to an
extension connector
(J8-8)