Renesas RH850/F1Kx Series Guide

APPLICATION NOTE
R01AN3841ED0110 Rev. 1.10 Page 1 of 108
August 8, 2019
RH850/F1Kx, RH850/F1K Series
Hardware Design Guide
Introduction
This application note is intended to provide RH850/F1Kx, RH850/F1K series specific information and
recommendations on the device usage. It should be used in conjunction with the corresponding RH850/F1Kx,
RH850/F1K series user manual (includes the electrical characteristics).
Target Device
RH850/F1Kx Series
•RH850/F1KM Group
oRH850/F1KM-S1
100pin
80pin
64pin
48pin
oRH850/F1KM-S4
272pin
233pin
176pin
144pin
100pin
•RH850/F1KH Group
oRH850/F1KH-D8
324pin
233pin
176pin
•RH850/F1K Series
oRH850/F1K Group
176pin
144pin
100pin
Disclaimer:
Renesas Electronics does not warrant the information included in this document. You are fully responsible for
incorporation of these circuits, software, and information in the design of your equipment and system. Renesas
Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these
circuits, software, or information.
R01AN3841ED0110
Rev. 1.10
August 8
, 2019

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 2 of 108
August 8, 2019
Table of Contents
1. Power Supply ................................................................................................................... 8
1.1 Power Supply Overview of RH850/F1KM-S1 ............................................................................ 8
1.1.1 Power Supply Pin Overview of RH850/F1KM-S1 ............................................................... 8
1.1.2 Power Supply Pin Configuration of RH850/F1KM-S1........................................................ 9
1.1.3 Power Supply Pin Architecture of RH850/F1KM-S1 .......................................................... 9
1.1.4 Power Supply Timing of RH850/F1KM-S1 ........................................................................ 12
1.2 Power Supply Overview of RH850/F1KM-XX.......................................................................... 14
1.3 Power Supply Overview of RH850/F1KM-S4 .......................................................................... 15
1.3.1 Power Supply Pin Overview of RH850/F1KM-S4 ............................................................. 15
1.3.2 Power Supply Pin Configuration of RH850/F1KM-S4...................................................... 16
1.3.3 Power Supply Pin Architecture of RH850/F1KM-S4 ........................................................ 16
1.3.4 Power Supply Timing of RH850/F1KM-S4 ........................................................................ 27
1.4 Power Supply Overview of RH850/F1KH-D8 .......................................................................... 29
1.4.1 Power Supply Pin Overview of RH850/F1KH-D8.............................................................. 29
1.4.2 Power Supply Pin Configuration of RH850/F1KH-D8...................................................... 30
1.4.3 Power Supply Pin Architecture of RH850/F1KH-D8 ........................................................ 30
1.4.4 Power Supply Timing of RH850/F1KH-D8 ........................................................................ 41
1.5 Power Supply Overview of RH850/F1K................................................................................... 44
1.5.1 Power Supply Pin Overview of RH850/F1K ...................................................................... 44
1.5.2 Power Supply Pin Configuration of RH850/F1K .............................................................. 45
1.5.3 Power Supply Pin Architecture of RH850/F1K................................................................. 45
1.5.4 Power Supply Timing of RH850/F1K................................................................................. 51
1.6 Principle Capacitor Placement at REGVCC of RH850/F1Kx, RH850/F1K Series................ 53
2. Minimum External Components ................................................................................... 54
2.1Minimum External Components of RH850/F1KM-S1............................................................. 54
2.2 Minimum External Components of RH850/F1KM-XX ............................................................ 57
2.3 Minimum External Components of RH850/F1KM-S4............................................................. 58
2.4 Minimum External Components of RH850/F1KH-D8 ............................................................. 61
2.5 Minimum External Components of RH850/F1K ..................................................................... 64
3. Oscillator......................................................................................................................... 67
3.1 Recommended Oscillator Circuit ............................................................................................ 67
3.1.1 Main Oscillator .................................................................................................................... 67
3.1.2 Sub Oscillator...................................................................................................................... 68
3.2 Recommended Oscillator Layout............................................................................................ 69
4. Device Pins ..................................................................................................................... 70
4.1 X1 ................................................................................................................................................ 70
4.1.1 Direct Clock Supply to X1 .................................................................................................. 70
4.2 RESET ........................................................................................................................................ 71

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 3 of 108
August 8, 2019
4.2.1 Minimum RESET Circuit..................................................................................................... 71
4.2.2 RESET Input Characteristics ............................................................................................. 72
4.3 General Purpose I/O.................................................................................................................. 73
4.3.1 RESET State of General Purpose I/P ................................................................................ 73
4.3.2 JP0_4/ DCUTRST .............................................................................................................. 73
4.3.3 P8_6/ RESETOUT .............................................................................................................. 73
4.3.4 Analog Filter Function........................................................................................................ 74
4.3.5 Port and Pin Behavior during Low Power Mode.............................................................. 75
4.4 Recommended Connection of Unused Pins .......................................................................... 76
4.4.1 Recommended Connection of Unused Pins for RH850/F1KM-S1 ................................. 76
4.4.2 Recommended Connection of Unused Pins for RH850/F1KM-XX ................................. 78
4.4.3 Recommended Connection of Unused Pins for RH850/F1KM-S4 ................................. 79
4.4.4 Recommended Connection of Unused Pins for RH850/F1KH-D8.................................. 81
4.4.5 Recommended Connection of Unused Pins for RH850/F1K .......................................... 83
4.5 Injected Current......................................................................................................................... 85
5. SENT Interface (RH850/F1Kx Series only) ................................................................... 86
6. AD-Converter.................................................................................................................. 87
6.1 Conversion time ........................................................................................................................ 87
6.2 External Multiplexer Wait Time ................................................................................................ 88
6.3 Equivalent Input Circuit............................................................................................................ 88
6.4 External Circuit on ADC Input ................................................................................................. 89
6.5 Formulas for sampling error.................................................................................................... 90
7. Device Operation Modes ............................................................................................... 92
8. Development Tool Interface .......................................................................................... 93
8.1 Debug Interface Connection .................................................................................................... 93
8.2 Flash Programming Interface .................................................................................................. 98
8.2.1 Flash Programming by PG-FPx......................................................................................... 98
8.2.2 Flash Programming by E1/E2 Emulator and RFP............................................................ 99
8.3 Combined Debug and Flash Programming Interface Connection..................................... 101
8.4 Debug Considerations when Hot Plug-in is used................................................................ 103
9. Test Tool Interface ....................................................................................................... 104
10. Differences to RH850/F1L/M/H, RH850/F1Kx and RH850/F1K.................................. 105
11. Reference Documents ................................................................................................. 106
12. Abbreviations ............................................................................................................... 107

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 4 of 108
August 8, 2019
Table of Figures
Figure 1: RH850/F1KM-S1 Power supply architecture ..................................................................................... 9
Figure 2: Recommended REGVCC power configuration for RH850/F1KM-S1 .............................................. 12
Figure 3: The voltage range which has to be kept voltage slope for RH850/F1KM-S1 .................................. 12
Figure 4: RH850/F1KM-S1 Power up/down timing ......................................................................................... 13
Figure 5: RH850/F1KM-S1 Power up/down timing ......................................................................................... 13
Figure 6: RH850/F1KM-S4 Power supply architecture ................................................................................... 16
Figure 7: Recommended REGVCC power configuration for RH850/F1KM-S4 .............................................. 27
Figure 8: The voltage range which has to be kept voltage slope for RH850/F1KM-S4 .................................. 27
Figure 9: RH850/F1KM-S4 Power up/down timing ......................................................................................... 28
Figure 10: RH850/F1KM-S4 Power up/down timing ....................................................................................... 28
Figure 11: RH850/F1KH-D8 Power supply architecture.................................................................................. 30
Figure 12: Recommended REG0VCC power configuration for RH850/F1KH-D8 .......................................... 41
Figure 13: The voltage range which has to be kept voltage slope for RH850/F1KH-D8 ................................ 41
Figure 14: RH850/F1KH-D8 Power up/down timing........................................................................................ 42
Figure 15: RH850/F1KH-D8 Power up/down timing........................................................................................ 43
Figure 16: RH850/F1K Power supply architecture .......................................................................................... 45
Figure 17: Recommended REGVCC power configuration for RH850/F1K..................................................... 51
Figure 18: The voltage range which has to be kept voltage slope for RH850/F1K......................................... 51
Figure 19: RH850/F1K Power up/down timing ................................................................................................ 52
Figure 20: RH850/F1K Power up/down timing ................................................................................................ 52
Figure 21: Principle capacitor placement at REGVCC for EMI ....................................................................... 53
Figure 22: Minimum external components of RH850/F1KM-S1 in normal operating mode............................ 54
Figure 23: Minimum external components of RH850/F1KM-S4 in normal operating mode............................ 58
Figure 24: Minimum external components of RH850/F1KH-D8 in normal operating mode............................ 61
Figure 25: Minimum external components of RH850/F1K in normal operating mode .................................... 64
Figure 26: Recommended main oscillator circuit ............................................................................................ 67
Figure 27: Recommended sub oscillator circuit .............................................................................................. 68
Figure 28: Direct clock supply to X1 (MOSC).................................................................................................. 70
Figure 29: Minimum RESET circuit ................................................................................................................. 71
Figure 30: External RESET timing................................................................................................................... 72
Figure 31: Analog filter function....................................................................................................................... 74
Figure 32: Mechanism of injection current....................................................................................................... 85
Figure 33: ADC conversion time...................................................................................................................... 87
Figure 34: ADC equivalent input circuit ........................................................................................................... 88
Figure 35: ADC external circuit on analog input.............................................................................................. 89
Figure 36: Schematic for sampling error 1 formula ......................................................................................... 90
Figure 37: Schematic for sampling error 2 formula ......................................................................................... 91
Figure 38: LPD (1 pin) connection................................................................................................................... 93

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 5 of 108
August 8, 2019
Figure 39: LPD (4 pins) connection ................................................................................................................. 95
Figure 40: Nexus, LPD (4 pins) and LPD (1 pin) connection .......................................................................... 96
Figure 41: PG-FPx flash programming interface connection .......................................................................... 98
Figure 42: E1/E2 flash programming interface connection ............................................................................. 99
Figure 43: Combined debug and flash programming interface connections................................................. 101
Figure 44: Circuit configuration for hot plug-in .............................................................................................. 103
Figure 45: Boundary scan connection of RH850/F1Kx and RH850/F1K series............................................ 104

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 6 of 108
August 8, 2019
Table of Tables
Table 1: RH850/F1KM-S1 Power supply pin overview ..................................................................................... 8
Table 2: RH850/F1KM-S1 Overview of power supply architecture cases ...................................................... 10
Table 3: RH850/F1KM-S1 Power supply architecture with single supply 5V.................................................. 10
Table 4: RH850/F1KM-S1 Power supply architecture with mixed supply 5V & 3.3V...................................... 10
Table 5: RH850/F1KM-S1 Power supply architecture with mixed supply 5V & 3.3V...................................... 11
Table 6: RH850/F1KM-S1 Power supply architecture with mixed supply 5V & 3.3V...................................... 11
Table 7: RH850/F1KM-S1 Power supply architecture with single supply 3.3V............................................... 11
Table 8: RH850/F1KM-S4 Power supply pin overview ................................................................................... 15
Table 9: RH850/F1KM-S4 Overview of power supply architecture cases ...................................................... 17
Table 10: RH850/F1KM-S4 Power supply architecture with single supply 5V................................................ 17
Table 11: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 18
Table 12: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 18
Table 13: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 19
Table 14: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 20
Table 15: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 21
Table 16: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 22
Table 17: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 23
Table 18: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 23
Table 19: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 23
Table 20: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 24
Table 21: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 25
Table 22: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V.................................... 26
Table 23: RH850/F1KM-S4 Power supply architecture with single supply 3.3V............................................. 26
Table 24: RH850/F1HM-D8 Power supply pin overview ................................................................................. 29
Table 25: RH850/F1KH-D8 Overview of power supply architecture cases..................................................... 31
Table 26: RH850/F1KH-D8 Power supply architecture with single supply 5V................................................ 31
Table 27: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 32
Table 28: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 32
Table 29: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 33
Table 30: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 33
Table 31: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 34
Table 32: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 34
Table 33: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 35
Table 34: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 36
Table 35: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 36
Table 36: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 36
Table 37: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 37
Table 38: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 37

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 7 of 108
August 8, 2019
Table 39: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 38
Table 40: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 39
Table 41: RH850/F1KH-D8 Power supply architecture with mixed supply 5V & 3.3V.................................... 40
Table 42: RH850/F1KH-D8 Power supply architecture with single supply 3.3V............................................. 40
Table 43: RH850/F1K Power supply pin overview .......................................................................................... 44
Table 44: RH850/F1K Overview of power supply architecture cases ............................................................. 46
Table 45: RH850/F1K Power supply architecture with single supply 5V ........................................................ 46
Table 46: RH850/F1K Power supply architecture with mixed supply 5V & 3.3V ............................................ 46
Table 47: RH850/F1K Power supply architecture with mixed supply 5V & 3.3V ............................................ 47
Table 48: RH850/F1K Power supply architecture with mixed supply 5V & 3.3V ............................................ 47
Table 49: RH850/F1K Power supply architecture with mixed supply 5V & 3.3V ............................................ 47
Table 50: RH850/F1K Power supply architecture with mixed supply 5V & 3.3V ............................................ 48
Table 51: RH850/F1K Power supply architecture with mixed supply 5V & 3.3V ............................................ 49
Table 52: RH850/F1K Power supply architecture with mixed supply 5V & 3.3V ............................................ 50
Table 53: RH850/F1K Power supply architecture with single supply 3.3V ..................................................... 50
Table 54: Minimum external components of RH850/F1KM-S1 (100pin)......................................................... 55
Table 55: Minimum external components for RH850/F1KM-S4 (272pin) ....................................................... 59
Table 56: Minimum external components for RH850/F1KH-D8 (324pin)........................................................ 62
Table 57: Minimum external components for RH850/F1K (176pin) ................................................................ 65
Table 58: Guidance values of the main oscillator circuit ................................................................................. 67
Table 59: Guidance values of the sub oscillator circuit ................................................................................... 68
Table 60: Guidance values for the minimum RESET circuit ........................................................................... 71
Table 61: Port and pin behavior during low power mode................................................................................ 75
Table 62: Recommended connection of unused pins for RH850/F1KM-S1 ................................................... 76
Table 63: Recommended connection of unused pins for RH850/F1KM-S4 ................................................... 79
Table 64: Recommended connection of unused pins for RH850/F1KH-D8.................................................... 81
Table 65: Recommended connection of unused pins for RH850/F1K ............................................................ 83
Table 66: ADC conversion time overview........................................................................................................ 87
Table 67: Basic external ADC input circuit ...................................................................................................... 89
Table 68: Device operation mode overview .................................................................................................... 92
Table 69: Device operation mode description ................................................................................................. 92
Table 70: Debug interface signal connection .................................................................................................. 97
Table 71: Basic flash programming connection .............................................................................................. 98
Table 72: PG-FPx Flash programming signal connection............................................................................... 99
Table 73: E1/E2 Flash programming signal connection................................................................................ 100
Table 74: Basic component value for hot plug-in .......................................................................................... 103

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 8 of 108
August 8, 2019
1. Power Supply
The internal circuits are separated into two independent power domains, the Always-On area (AWO area) and the
Isolated area (ISO area). The power supply of the Always-On area (AWO area) is always on in all operating modes and
stand-by modes. The power supply of the Isolated area (ISO area) can be turned off to reduce the overall power
consumption depending on the type of stand-by mode. For each power domain, a dedicated on-chip voltage regulator
generates the internal supply voltage.
1.1 Power Supply Overview of RH850/F1KM-S1
1.1.1 Power Supply Pin Overview of RH850/F1KM-S1
The devices of the RH850/F1KM-S1 have the following power supply pins:
•Power supply voltage REGVCC for the on-chip voltage regulators. The output voltage of the voltage
regulators is supplied to the digital circuits in each power domain.
•Power supply voltage EVCC for I/O ports.
•Power supply voltage A0VREF for the A/D converters and the separated I/O ports.
Table 1: RH850/F1KM-S1 Power supply pin overview
Device
Power Supply Pins
RH850/F1KM-S1 (100pin)
REGVCC
AWOVCLNote, AWOVSS
ISOVCLNote, ISOVSS
EVCC, EVSS
A0VREF, A0VSS
RH850/F1KM-S1 (64pin)
REGVCC
AWOVCLNote, AWOVSS
ISOVCLNote, ISOVSS
EVCC, EVSS
A0VREF, A0VSS
RH850/F1KM-S1 (48pin)
REGVCC
AWOVCLNote, AWOVSS
ISOVCLNote, ISOVSS
EVCC, EVSS
A0VREF, A0VSS
Note: The pins AWOVCL and ISOVCL are available on all devices to connect external stabilization capacitors. Do
not use AWOVCL and ISOVCL as power source of other devices.

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 9 of 108
August 8, 2019
1.1.2 Power Supply Pin Configuration of RH850/F1KM-S1
The following shows power supply pin configuration. Do not open any power and GND terminals even if those are
internally connected.
•The EVCC supply pins are internally connected
•The EVSS pins are internally connected.
•AWOVSS and ISOVSS are internally connected.
•Others are not internally connected.
1.1.3 Power Supply Pin Architecture of RH850/F1KM-S1
The RH850/F1KM-S1 supports different power supply architectures. The power supply architecture depends on the
application requirements and the use case.
Some common conditions apply to the supply of the RH850/F1KM-S1:
•REGVCC = EVCC = VPOC to 5.5V
•A0VREF = 3.0V to 5.5V
•AWOVSS = ISOVSS = EVSS = A0VSS = 0V
The following figure and the different cases describe the impact to the ADC ports and the ports with analog/digital
function depending on the power supply architecture. In addition, it describes the limitations to these ports.
Figure 1: RH850/F1KM-S1 Power supply architecture
RH85 0/F1KM-S1
AWO-Area ISO-Are a
AP0
REGVCC
A0 VRE F
EVCC
EVCC
Pn
R egul at or R egul at or
P8
P9
Pm

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 10 of 108
August 8, 2019
Table 2: RH850/F1KM-S1 Overview of power supply architecture cases
Case
Supply Voltage
Permission
REGVCC
EVCC
A0VREF
Case 1
5V
5V
5V
Operation permitted
Case 2
5V
5V
3.3V
Operation permitted
Case 3
5V
3.3V
*
Operation not permitted
Case 4
3.3V
5V
*
Operation not permitted
Case 5
3.3V
3.3V
5V
Operation permitted
Case 6
3.3V
3.3V
3.3V
Operation permitted
Note: * means “don’t care”.
Table 3: RH850/F1KM-S1 Power supply architecture with single supply 5V
Case 1 – Single Supply 5V
Condition
REGVCC = 5V
EVCC = 5V
A0VREF = 5V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function
P9 – Port usable with analog or digital function
Limitation
No limitation applies

Operation permitted
Table 4: RH850/F1KM-S1 Power supply architecture with mixed supply 5V & 3.3V
Case 2 – Mixed Supply 5V & 3.3V
Condition
REGVCC = 5V
EVCC = 5V
A0VREF = 3.3V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group
P9 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group
Limitation
Analog port function limitation applies to P8 and P9

Operation permitted

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 11 of 108
August 8, 2019
Table 5: RH850/F1KM-S1 Power supply architecture with mixed supply 5V & 3.3V
Case 3 and Case 4 – Mixed Supply 5V & 3.3V
Condition
REGVCC ≠EVCC
EVCC = 3.3V or 5V
A0VREF = don’t care
Port Function
–
Limitation
Common condition REGVCC = EVCC not met

Operation not permitted
Table 6: RH850/F1KM-S1 Power supply architecture with mixed supply 5V & 3.3V
Case 5 – Mixed Supply 5V & 3.3V
Condition
REGVCC = 3.3V
EVCC = 3.3V
A0VREF = 5V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function, analog input voltage
limited to max. 3.3V, reduced AD conversion range between 0V to 3.3V
P9 – Port usable with analog or digital function, analog input voltage
limited to max. 3.3V, reduced AD conversion range between 0V to 3.3V
Limitation
Analog port function limitation applies to P8 and P9

Operation permitted
Table 7: RH850/F1KM-S1 Power supply architecture with single supply 3.3V
Case 6 – Single Supply 3.3V
Condition
REGVCC = 3.3V
EVCC = 3.3V
A0VREF = 3.3V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function
P9 – Port usable with analog or digital function
Limitation
No limitation applies

Operation permitted
3FFh
0V
3.3V
5V
2A3h
0V
3.3V
5V
Note: Conversion range example based on 10-bit ADC resolution
Analog input channel on AP0 Analog input channel on P8, P9
Red uced AD c onversion ran ge
Available
voltage range
Available
voltage range

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 12 of 108
August 8, 2019
1.1.4 Power Supply Timing of RH850/F1KM-S1
The RH850/F1KM-S1 has a recommended power supply timing.
The voltage slope of the different power supply pins is defined with min. 0.02V/ms and max. 500V/ms. Satisfy the spec
of voltage slope by using power IC with enable control or by using power IC which starts output over VPOC. The
following shows an example of configuration between RH850/F1KM-S1 and PMIC.
Figure 2: Recommended REGVCC power configuration for RH850/F1KM-S1
The voltage range which has to be kept voltage slope is as follows. There is no voltage slope limitation at the case other
than below condition. For detail, see the following figure.
Figure 3: The voltage range which has to be kept voltage slope for RH850/F1KM-S1
Note: When the power source rises again, keep the spec of “REGVCC minimum width (tw_POC)“ which specified in
the Section 47C.4.5.2, Voltage Detector (POC, LVI, VLVI, CVM) Characteristics of the RH850/F1KH,
RH850/F1KM Hardware User’s Manual.
For details on the electrical characteristics, please refer to Section 47C, Electrical Characteristics of RH850/F1KM-S1
of the RH850/F1KH, RH850/F1KM Hardware User’s Manual.
PMIC
+B
VINx VOUT1 REGVCC
EVCC
RH850/F1KM-S1
: Voltage range that tVS shall be kept
REGVCC/EV CC/A0VREF
3.0V (VPOC (max))
0V
2.7V (VPOC (min))

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 13 of 108
August 8, 2019
a) When RESET terminal is used
Figure 4: RH850/F1KM-S1 Power up/down timing
b) When RESET terminal is not used
Figure 5: RH850/F1KM-S1 Power up/down timing
Note. For the spec of tDPOR, tDRPD and tVS, please refer to Section 47C.4.5.3, Power Up/Down Timing of the
RH850/F1KH, RH850/F1KM Hardware User’s Manual.
REGVCC/EV CC VP OC (mi n )
A0 VRE F 3.0V
0V
Min. 0 us
RESET
Max . 0.5/tVS ms
0V
0V VIL
t
DP OR
Min. 0 us Min. 0 us
t
DRP D
REGVCC/EV CC VP OC (mi n )
A0 VRE F 3.0V
0V
Min. 0 us
Max. 500us
0V
Min. -1us
Max. 0.5/t vs ms

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 14 of 108
August 8, 2019
1.2 Power Supply Overview of RH850/F1KM-XX
Reserved for future use

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 15 of 108
August 8, 2019
1.3 Power Supply Overview of RH850/F1KM-S4
1.3.1 Power Supply Pin Overview of RH850/F1KM-S4
The devices of the RH850/F1KM-S4 have the following power supply pins:
•Power supply voltage REGVCC for the on-chip voltage regulators. The output voltage of the voltage
regulators is supplied to the digital circuits in each power domain.
•Power supply voltages EVCC and BVCC (depending on device pin count) for the I/O ports.
•Power supply voltages A0VREF and A1VREF (depending on the device pin count) for the A/D converters and
the separated I/O ports.
Table 8: RH850/F1KM-S4 Power supply pin overview
Device
Power Supply Pins
RH850/F1KM-S4 (272pin)
REGVCC
AWOVCLNote, AWOVSS
ISOVCLNote, ISOVSS
EVCC, EVSS
BVCC, BVSS
A0VREF, A0VSS
A1VREF, A1VSS
RH850/F1KM-S4 (233pin)
REGVCC
AWOVCLNote, AWOVSS
ISOVCLNote, ISOVSS
EVCC, EVSS
BVCC, BVSS
A0VREF, A0VSS
A1VREF, A1VSS
RH850/F1KM-S4 (176pin)
REGVCC
AWOVCLNote, AWOVSS
ISOVCLNote, ISOVSS
EVCC, EVSS
BVCC, BVSS
A0VREF, A0VSS
A1VREF, A1VSS
RH850/F1KM-S4 (144pin)
REGVCC
AWOVCLNote, AWOVSS
ISOVCLNote, ISOVSS
EVCC, EVSS
BVCC, BVSS
A0VREF, A0VSS
A1VREF, A1VSS
RH850/F1KM-S4 (100pin)
REGVCC
AWOVCLNote, AWOVSS
ISOVCLNote, ISOVSS
EVCC, EVSS
A0VREF, A0VSS
Note: The pins AWOVCL and ISOVCL are available on all devices to connect external stabilization capacitors. Do
not use AWOVCL and ISOVCL as power source of other devices.

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 16 of 108
August 8, 2019
1.3.2 Power Supply Pin Configuration of RH850/F1KM-S4
The following shows power supply pin configuration. Do not open any power and GND terminals even if those are
internally connected.
•The EVCC supply pins are internally connected
•The BVCC supply pins are internally connected. (when available on the device).
•The EVSS pins are internally connected.
•The BVSS pins are internally connected. (when available on the device).
•AWOVSS and ISOVSS are internally connected.
•Others are not internally connected.
1.3.3 Power Supply Pin Architecture of RH850/F1KM-S4
The RH850/F1KM-S4 supports different power supply architectures. The power supply architecture depends on the
chosen RH850/F1KM-S4 device, application requirements and the use case.
Some common conditions apply to the supply of the RH850/F1KM-S4:
•REGVCC = EVCC = VPOC to 5.5V
•BVCC = VPOC to REGVCC (when available on the device)
•A0VREF = 3.0V to 5.5V
•A1VREF = 3.0V to 5.5V (when available on the device)
•AWOVSS = ISOVSS = EVSS = BVSS = A0VSS = A1VSS = 0V
The following figure and the different cases describe the impact to the ADC ports and the ports with analog/digital
function depending on the power supply architecture. In addition, it describes the limitations to these ports.
Figure 6: RH850/F1KM-S4 Power supply architecture
Note: The BVCC and A1VREF supply pin availability depends on the chosen device.
RH85 0/F1KM-S4
AWO-Area ISO-Are a
AP0
REGVCC
A0 VRE F
EVCC
EVCC
Pn R egul at or R egul at or
P8
P9
Pm
AP1A1VREF
Pm
P18 BVCC
P19

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 17 of 108
August 8, 2019
Table 9: RH850/F1KM-S4 Overview of power supply architecture cases
Case
Voltage
Permission
REGVCC
EVCC
BVCC
A0VREF
A1VREF
Case 1
5V
5V
5V
5V
5V
Operation permitted
Case 2
5V
5V
5V
5V
3.3V
Operation permitted
Case 3
5V
5V
5V
3.3V
5V
Operation permitted
Case 4
5V
5V
5V
3.3V
3.3V
Operation permitted
Case 5
5V
5V
3.3V
5V
5V
Operation permitted
Case 6
5V
5V
3.3V
5V
3.3V
Operation permitted
Case 7
5V
5V
3.3V
3.3V
5V
Operation permitted
Case 8
5V
5V
3.3V
3.3V
3.3V
Operation permitted
Case 9
5V
3.3V
*
*
*
Operation not permitted
Case 10
3.3V
5V
*
*
*
Operation not permitted
Case 11
3.3V
3.3V
5V
*
*
Operation not permitted
Case 12
3.3V
3.3V
3.3V
5V
5V
Operation permitted
Case 13
3.3V
3.3V
3.3V
5V
3.3V
Operation permitted
Case 14
3.3V
3.3V
3.3V
3.3V
5V
Operation permitted
Case 15
3.3V
3.3V
3.3V
3.3V
3.3V
Operation permitted
Note: * means “don’t care”.
Table 10: RH850/F1KM-S4 Power supply architecture with single supply 5V
Case 1 – Single Supply 5V
Condition
REGVCC = 5V
EVCC = 5V
BVCC = 5V
A0VREF = 5V
A1VREF = 5V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function
P9 – Port usable with analog or digital function
AP1 – Port usable with analog or digital function
P18 – Port usable with analog or digital function
P19 – Port usable with analog or digital function
Limitation
No limitation applies

Operation permitted

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 18 of 108
August 8, 2019
Table 11: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V
Case 2 – Mixed Supply 5V & 3.3V
Condition
REGVCC = 5V
EVCC = 5V
BVCC = 5V
A0VREF = 5V
A1VREF = 3.3V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function
P9 – Port usable with analog or digital function
AP1 – Port usable with analog or digital function
P18 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group.
P19 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group.
Limitation
Analog port function limitation applies to P18 and P19

Operation permitted
Table 12: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V
Case 3 – Mixed Supply 5V & 3.3V
Condition
REGVCC = 5V
EVCC = 5V
BVCC = 5V
A0VREF = 3.3V
A1VREF = 5V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group.
P9 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group.
AP1 – Port usable with analog or digital function
P18 – Port usable with analog or digital function
P19 – Port usable with analog or digital function
Limitation
Analog port function limitation applies to P8 and P9

Operation permitted

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 19 of 108
August 8, 2019
Table 13: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V
Case 4 – Mixed Supply 5V & 3.3V
Condition
REGVCC = 5V
EVCC = 5V
BVCC = 5V
A0VREF = 3.3V
A1VREF = 3.3V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group.
P9 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group.
AP1 – Port usable with analog or digital function
P18 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group.
P19 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V. When analog input terminal is over 3.3V,
do not include the input into an AD scan group.
Limitation
Analog port function limitation applies to P8, P9, P18 and P19

Operation permitted

RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 20 of 108
August 8, 2019
Table 14: RH850/F1KM-S4 Power supply architecture with mixed supply 5V & 3.3V
Case 5 – Mixed Supply 5V & 3.3V
Condition
REGVCC = 5V
EVCC = 5V
BVCC = 3.3V
A0VREF = 5V
A1VREF = 5V
Port Function
AP0 – Port usable with analog or digital function
P8 – Port usable with analog or digital function
P9 – Port usable with analog or digital function
AP1 – Port usable with analog or digital function
P18 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V, reduced AD conversion range between 0V
to 3.3V
P19 – Port usable with analog or digital function, analog input
voltage limited to max. 3.3V, reduced AD conversion range between 0V
to 3.3V
Limitation
Analog port function limitation applies to P18 and P19

Operation permitted
3FFh
0V
3.3V
5V
2A3h
0V
3.3V
5V
Note: C on ver sio n r ange ex am pl e base d on 10-bit ADC resolution
Analog input channel on AP1Analog input channel on P18 an d P19
Red uced AD conversion ran ge
Available
voltage range Available
voltage range