SST 5136-DNP-CPCI Application guide

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5136-DNP-CPCI
Hardware Reference
Version 1.0
50 Northland Road, Waterloo, Ontario N2V 1N3
[phone] fax [phone]
© 1999 SST, a division of Woodhead Canada Limited.
Printed in Canada
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5136-DNP-CPCI Hardware Reference
© 1999 SST/Woodhead Canada Limited i
Publication Name :
Publication Revision:
Date Printed:
dnp-cpci.doc
1.0
7/21/99
© 1999 SST/Woodhead Canada Limited
SST is a trademark of Woodhead industries, Inc.
--This Document Applies To --
5136-DNP-CPCI Interface Card
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5136-DNP-CPCI Hardware Reference
© 1999 SST/Woodhead Canada Limited ii
Table of Contents
1. Introduction 1
1.1 Purpose of this Document 1
1.2 5136-DNP-CPCI Overview 1
2. Hardware Description 2
2.1 Overview 2
2.2 Connectors 2
2.2.1CompactPCI Edge Connector 2
2.2.2CAN Connector (CN1) 2
2.2.3Test Points (TP1, TP2) 3
2.3 Indicators 3
2.3.1Health Indicator 3
2.3.2Health Indicator (Health) 3
2.3.3Network Status Indicator (Comm) 3
3. Hardware Installation 4
3.1 Introduction 4
3.2 Installing the card 4
3.3 Connecting to a DeviceNet Network 4
3.3.1Termination Resistor 4
3.4 Connecting to a CAN Network 5
3.4.1Termination Resistor 5
3.4.2Power 5
3.5 Grounding 5
4. Hardware Technical Information 6
4.1 Introduction 6
4.2 DeviceNet Pro Mode Register Interface 6
4.2.1Card Command Register - CCM - Base Address + 0 6
4.2.2Card Configuration Register - CCR - Base Address + 2 7
4.2.3Memory Configuration Registers MCR 0 - 3 - Base Address + 3 7
4.2.4Memory Configuration Register 0 - MCR0 8
4.2.5Memory Bank Selection 8
4.2.6Memory Configuration Register 1 - MCR1 8
4.2.7Memory Configuration Register 2 - MCR2 9
4.2.8Memory Configuration Register 3 - MCR3 9
4.2.9Interrupt Configuration Register - ICR - Base Address + 4 9
4.2.10 Identification Register - IDR - Base Address + 7 10
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5136-DNP-CPCI Hardware Reference
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4.3 DeviceNet Compatibility Mode I/O Registers 10
4.3.1Main Board Control Register - BCR0 - Base Address + 0 10
4.3.2Loader/Memory Configuration Register - BCR1 - Base Address + 1 11
4.3.3Loader/Memory Configuration Register - BCR2 - Base Address + 2 11
4.3.4Identification Register - IDR - Base Address + 7 12
4.4 PCI Configuration 12
4.5 Application Module Header 13
4.5.1Data Type Descriptions 13
4.5.2Byte Ordering 13
4.5.3Application Module Header 14
4.6 Loading an Application Module in Compatible Mode 15
4.6.1Test for 5136-DNP-CPCI at I/O port address specified 15
4.6.2Check for conflicting RAM 15
4.6.3Enable and test the card RAM 15
4.6.4Load the application module 15
4.6.5Configure Interrupts 16
4.6.6Start the application module 16
4.6.7Check module startup results 16
4.6.8Test Interrupt Generation 16
4.6.9Successful completion 16
4.6.10 If something goes wrong 16
Appendix A Specifications 17
Appendix B Card Error Messages 18
Appendix C Technical Support 20
Appendix D Warranty 21
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5136-DNP-CPCI Hardware Reference
© 1999 SST/Woodhead Canada Limited 1
1. Introduction
1.1 Purpose of this Document
This document is a hardware reference manual for the 5136-DNP-CPCI interface card.
The 5136-DNP-CPCI has its own CPU that executes downloadable application software modules. Each of these
software modules has an accompanying manual that describes its operation.
1.2 5136-DNP-CPCI Overview
The 5136-DNP-CPCI is a CompactPCI interface card for communication with DeviceNet and other CAN-based
networks.
The main features of the 5136-DNP-CPCI are:
•33 MHz, 32 bit CompactPCI interface (fully compliant with PCI 2.1 Spec and CompactPCI 2.0 R2.1 spec)
•40 MHz AM186EM microprocessor with 256K RAM
•256K shared RAM
•Optically isolated CAN interface
•DeviceNet compatible 5-pin CAN connector
•DeviceNet compatible Network Status bicolor indicator
•Supports connection to non-powered (3 wire) CAN networks with external 12-24 VDC supply
•Compatible with CAN specification 2.0 part A
•Supports CAN data rates up to 1 Mbaud
•Supports standard DeviceNet data rates 125, 250 and 500 Kbaud
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2. Hardware Description
2.1 Overview
The 5136-DNP-CPCI is a 3U small form factor 32-bit CompactPCI interface card. The main features of the card
are described in detail in the following sections.
CN1
2.2 Connectors
2.2.1 CompactPCI Edge Connector
The CompactPCI connector can plug in to any 5V CompactPCI motherboard connector. The 5136-DNP-CPCI
does not require that the motherboard connector supply 3.3V power. The 5136-DNP-CPCI will not plug in to
3.3V-only PCI connectors.
2.2.2 CAN Connector (CN1)
The CAN connector, a standard 5-pin removable connector, conforms to the standard DeviceNet pinout.
2.2.2.1 V+, V-
These are the DeviceNet network power supply terminals. Connect to an external 11-25 VDC power supply if the
network cable does not have power supply conductors.
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5136-DNP-CPCI Hardware Reference
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2.2.2.2 CANH, CANL
These are the CAN communication bus terminals. Use only shielded twisted pair cable.
2.2.2.3 SHIELD
Connect the network cable shield to this terminal. This terminal is snubbed to the PC chassis ground. The shield
should be connected directly to earth ground at only one point in the network.
2.2.3 Test Points (TP1, TP2)
Test
Point Test Point Description
TP1 +5V
TP2 Ground
2.3 Indicators
2.3.1 Health Indicator
The Health indicator is a DeviceNet compliant bicolor LED indicating the status of the 5136-DNP-CPCI card.
Color Status
Off No Power
Green Application module loaded and running
Red Application module not loaded, an error occurred during the load, or
a runtime fatal error occurred
2.3.2 Health Indicator (Health)
The Health indicator is a bicolor LED indicating the status of the 5136-DNP-CPCI interface card.
Color Status
Off No Power
Green Application moduleloaded and running
Red Application module not loaded, an error occurred during the load, or
a runtime fatal error occurred
2.3.3 Network Status Indicator (Comm)
The Network Status indicator is a bicolor LED indicating the status of the communication channel. The meaning
of this LED is determined by the currently loaded application module. Refer to the application module’s reference
guide for more details.
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5136-DNP-CPCI Hardware Reference
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3. Hardware Installation
3.1 Introduction
This section describes the steps necessary to configure and install the 5136-DNP-CPCI.
The 5136-DNP-CPCI is plug-and-play compatible. No DIP-switches need to be set since all required memory
regions, I/O regions, and interrupts are automatically allocated by the Plug&Play BIOS.
3.2 Installing the card
To install the 5136-DNP-CPCI in your computer:
1. Turn the CompactPCI system off.
2. Wear an anti-static strap for the remaining steps.
If an anti-static strap is not available, leave the power cord connected and try to keep in contact with the metal
case of your CompactPCI system to eliminate the possibility of damaging the 5136-DNP-CPCI.
3. Locate an unused CompactPCI slot in your system.
4. Take the 5136-DNP-CPCI out of the anti-static bag, touching only the edges of the card. Do not touch the
header pins or the surface of the board.
5. Slide the 5136-DNP-CPCI card into an available slot in the CompactPCI system.
3.3 Connecting to a DeviceNet Network
Connect either a DeviceNet Trunk or Drop cable to the 5-pin connector according to the color code in section
2.2.2. Make sure that all strands of wire go into the connector as bent strands may cause shorts to the adjacent
terminal.
Directly connecting DeviceNet Trunk cable is not recommended due to the mechanical stress placed on the
connector by the heavy trunk cable. If you must attach trunk cable, secure it so no undue stress is placed on the
5-pin connector.
3.3.1 Termination Resistor
The 5136-DNP-CPCI does not have a built-in termination resistor. If the card is at the extreme end of the network
(end of trunk), connect a 120 ohm termination resistor from pin 2 to pin 4 of the 5-pin connector (providing there
are not already 2 terminators present on the network). This resistor can be inserted along with the DeviceNet cable
prior to tightening the screws.
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3.4 Connecting to a CAN Network
Connect the CAN cable to the 5-pin connector and tighten all screws. Make sure that all strands of wire go into the
connector as bent strands may cause shorts to the adjacent terminal.
3.4.1 Termination Resistor
The 5136-DNP-CPCI does not have a built-in termination resistor. You must add termination in accordance with
the requirements of the target CAN network.
3.4.2 Power
If the CAN network does not supply 11-24 VDC power, connect an external power supply to the V+ and V- pins
on the connector.
3.5 Grounding
The network shield should be connected directly to earth ground at only one point in the network.
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4. Hardware Technical Information
4.1 Introduction
This section provides technical hardware information. The information in this section is intended for programmers
familiar with hardware-level PC programming.
4.2 DeviceNet Pro Mode Register Interface
Offset Register 7 6 5 4 3 2 1 0
0CCM Reserved MemEn IrqPending CardInt
1SP1 Reserved
2CCR CardRun WDT FlashEn Mode Reserved MCRSel
3MCR0 Reserved Bank
3MCR1 AddrMode Win32K Reserved
3MCR2 Reserved
3MCR3 A19 Reserved
4ICR Reserved IrqMode Reserved
5SP2 Reserved
6SP3 Reserved
7AIDR IdMode Lock Reserved SEL Di Do CLK
7SIDR IdMode CardId
4.2.1 Card Command Register - CCM - Base Address + 0
Bit 7 6 5 4 3 2 1 0
Read/Write R R R R R/W R/W R/W R/W
Reset 0000
Name Reserved MemEn IrqPending CardInt
Bit Name Description
Card Int
(CINT) This bit is used to send interrupts to the card processor.
•Writing 1 generates an interrupt to the card
•Writing 0 has no effect
•Reading 1 indicates interrupt in progress.
•Reading 0 indicates interrupt complete.
IrqPending This bit indicates that an interrupt from the card is still pending.
•Writing 1 acknowledges the interrupt (and clears this condition)
•Writing 0 has no effect
•Reading 1 indicates interrupt in progress.
•Reading 0 indicates interrupt complete.
MemEn These bits indicate and control whether or not the card’s shared memory will
respond to host memory accesses. This may be used to multiplex several 5136-
DNP-CPCI cards at the same base address by enabling the memory on one card at
a time.
•Writing 01 Disables card memory
•Writing 10 Enables card memory
•Writing 11 or 00 has no effect
•Reading 11 indicates that this card’s memory is currently enabled.
•Reading 00 indicates that this card’s memory is currently disabled.
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Bit Name Description
Reserved These bits are reserved for future use.
•Writing 0000 has no effect.
•These bits may read 1 or 0.
Applications should mask off and ignore these bits.
4.2.2 Card Configuration Register - CCR - Base Address + 2
Bit 7 6 5 4 3 2 1 0
Read/Write R/W RR/W R/W R R R/W R/W
Reset 00 00 0 0
Name CardRun WDT FlashEn Mode Reserved MCRSel
Bit Name Description
MCRSel These bits select which Memory Configuration Register is mapped into I/O space as
the MCR at Base Address + 3.
•00 Selects MCR0
•01 Selects MCR1
•10 Selects MCR2
•11 Selects MCR3
Reserved These bits are reserved for future expansion.
Always write 00 to these bits.
Mode This bit controls and indicates the current mode of operation.
•When this bit is 1, the Pro Mode register set is selected
•When this bit is 0, the Compatibility Mode register set is selected.
FlashEn This bit controls and indicates whether or not the card will boot from the on-board
Flash memory.
•When this bit is 1, the card is set to boot from Flash ROM.
Note: There is no Flash ROM on the 5136-DNP-CPCI.
•When this bit is 0, the card is set to boot from Static RAM.
WDT This bit indicates the state of the watchdog timer.
•When this bit is 1, the watchdog has timed out, and the card is NOT running.
You must stop and re-start the card to start it running again. If this has
occurred, the card’s HealthLED will be RED.
•When this bit is 0, the watchdog has not timed out.
CardRun This bit controls and indicates whether or not the card’s processor is running. It also
affects thecard’s Health LED.
•When this bit is 0, the processor is halted, and the LED is RED.
•When this bit is 1, the processor is running normally, and the LED is GREEN.
•When this bit is 1, and watchdog has timed out, processor is halted, and the
LED is RED.
This bit must remain low for at least 50 µs to guarantee proper reset.
4.2.3 Memory Configuration Registers MCR 0 - 3 - Base Address + 3
Bit 76543210
Name The four MCR registers are mapped into Base Address + 3, according the MCRSel bits in
theCard Configuration Register (CCR).
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4.2.4 Memory Configuration Register 0 - MCR0
Bank Selection
Bit 76543210
Read/Write RRRRR/W R/W R/W R/W
Reset 00
Name Reserved Bank
Bit Name Description
Bank The 5136-DNP-CPCI has 256k of memory accessible to the host. These bits select
which bank of memory the host can access.
•In 16k mode the bank number may be 0 through 15 (or 0x0 - 0xF)
•In 32k mode the bank number may be 0 through 7.
The primary host interface window is located in bank 0.
Note that by setting the Bank to 0 and the Bank Size to 16K, all banks can be linearly
accessed in the 256K window, Bank 0 being mapped to the lowest 16K through to
Bank 15 mapped to the highest 16K.
See section 4.2.5.
Reserved These bits are reserved for future expansion.
Always write 00 to these bits.
4.2.5 Memory Bank Selection
Pro Mode Pro Mode Compatible
Mode Compatible Mode Comment*
16k Bank Size 32k Bank Size 16k Bank Size 32k Bank Size
0030HostInterface
1020
2111
3101
42N/A2
52N/A2
63N/A3
73N/A3
84N/A4
94N/A4
10 5 N/A 5
11 5 N/A 5
12646
13 6 5 6 Module Load
14 7 6 7 Region
15777
*The shaded area is reserved for future use
4.2.6 Memory Configuration Register 1 - MCR1
Memory Mode
Bit 76543210
Read/Write RRRR/W RRRR
Reset 0001 0
Name AddrMode Win32K Reserved
Bit Name Description
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Bit Name Description
Reserved These bits are reserved for 32-bit address selection
Win32K These bits control and indicate the Memory Bank Size
•00 Indicates a 16k Bank Size
•01 Indicates a 32k Bank Size
•Other sizes are not supported by the 5136-DNP-CPCI at this time.
AddrMode These bits indicate the memory mode used by this card.
•00 Indicates 20-bit addressing
•Other modes are not supported bythe 5136-DNP-CPCI at this time.
4.2.7 Memory Configuration Register 2 - MCR2
Memory Address Selection
Bit 76543210
Read/Write RRRRRRRR
Reset 0
Name Reserved
Bit Name Description
Reserved These bits are reserved for 32-bit and 24-bit address selection
4.2.8 Memory Configuration Register 3 - MCR3
Memory Address Selection
Bit 76543210
Read/Write RR/W R/W R/W R/W R/W R R
Reset 10000000
Name A19 Reserved
Bit Name Description
Reserved These bits are reserved. Always write 0 to these locations.
A19 A19 must always be set to 1.
4.2.9 Interrupt Configuration Register - ICR - Base Address + 4
Bit 76543210
Read/Write R R R/W R/W
Reset 00 0 0
Name Reserved IrqMode Reserved
Bit Name Description
IrqMode These bits determine the hardware interrupt mode
•00 disables PCI interrupts
•11 enables PCI interrupts
Reserved Reserved bits, always write 0.
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4.2.10 Identification Register - IDR - Base Address + 7
Bit 76543210
Reset 10100000
Read/Write R/WRRRRRRR
SIDR Name IdMode CardId = 0x0D
Read/Write R/W R R R/W R/W R/W R R/W
AIDR Name IdMode Lock Reserved SEL Di Do CLK
Bit Name Description
IdMode This bit selects the functionality of the remaining bits in the ID Register.
•1 selects Advanced ID Register (AIDR)
•0 selects Simple ID Register (SIDR)
CardId This is a 7 bit unique card Identifier.
•A value of 0x0D indicates that this is a 5136-DNP-CPCI card.
CLK This bit controls the data clock to the card’s EEPROM.
Do This bit provides output data from the card’s EEPROM.
Di This bit is the input data to the card’s EEPROM.
Sel This bit controls the select pin on the card’s EEPROM. The Lock bit must be set
before the Sel bit may be enabled.
Reserved These bits are reserved for future use. Always write 0.
Lock This bit is a semaphore between the card processor and the host. It determines who
has control of the EEPROM.
•Writing 1 indicates that the host would like control.
•Writing 0 indicates that the host no longer needs control.
•Reading 1 means that the host may have control.
•Reading 0 means that the host may NOT have control.
4.3 DeviceNet Compatibility Mode I/O Registers
Offset Register 7 6 5 4 3 2 1 0
0BCR0 MemEn Bank IntEn IrqPending Reserved CardInt
1BCR1 Win16K Reserved Reserved Reserved
2BCR2 CardRun WDInh HealthGrn Mode Reserved
7AIDR IdMode Lock Reserved SEL Di Do CLK
7SIDR IdMode CardId
4.3.1 Main Board Control Register - BCR0 - Base Address + 0
Bit 7 6 5 4 3 2 1 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Reset 000000
Name MemEn Bank IntEn IrqPending Reserved CardInt
Bit Name Description
CardInt
(CINT) This bit is used to send interrupts to the card processor.
•Writing 1 generates an interrupt to the card
•Writing 0 has no effect
•Reading 1 indicates interrupt in progress.
•Reading 0 indicates interrupt complete.
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Bit Name Description
Reserved This bit is read/write for backward compatibility.
This bit has no effect.
IrqPending
(IRQ)
This bit indicates that an interrupt from the card is still pending.
•Writing 1 acknowledges the interrupt (and clears this condition)
•Writing 0 has no effect
•Reading 1 indicates interrupt in progress.
•Reading 0 indicates interrupt complete.
IntEn
(IRQE) •Writing 1 enables PCI interrupts
•Writing 0 disables PCI interrupts (the IrqPending flag still functions as
described)
Bank The 5136-DNP-CPCI has 256k of memory accessible to the host. These bits select
which bank of memory the host can access.
•In 16K mode the bank number may be 0 through 7.
•In 32K mode the bank number may be 0 through 7.
Note A: This means that in 16K mode, only one half of the card’s memory is
accessible. See the Memory Bank Selection table in section 4.2.5.
Note B: It is not necessary to use Memory Banks with the 5136-DNP-CPCI as the
entire 256k can be linearly accessed. Banks are supported though for backward
compatibility. See section 4.2.5.
MemEn
(MEN)
These bits indicate and control whether or not the card’s shared memory will
respond to host memory accesses. This may be used to multiplex several
5136-DNP cards at the same base address by enabling the memory on one card at
a time.
•Writing 0 Disables card memory
•Writing 1 Enables card memory
4.3.2 Loader/Memory Configuration Register - BCR1 - Base Address + 1
Bit 7 6 5 4 3 2 1 0
Read/Write R/W R/W RR/W R/W R/W R/W R/W
Reset 0 0 0 00000
Name Win16K Reserved Reserved Reserved
Bit Name Description
Reserved Bits 0-4 are are read/write for backward compatibility but perform no function. Bit 5
is read only, bit 6 is read/write for compatibility.
Win32K This bit controls and indicates the Memory Bank Size
•0 indicates a 32K bank size
•1 indicates a 16K bank size
4.3.3 Loader/Memory Configuration Register - BCR2 - Base Address + 2
Bit 7 6 5 4 3 2 1 0
Read/Write R/W R/W RR/W R/W R/W R/W R/W
Reset 00 0 0 0
Name CardRun WDInh HealthGrn Mode Reserved
Bit Name Description
Reserved These bits are Read/Write for backward compatibility, but perform no function on the
5136-DNP-CPCI.
Mode This bit controls and indicates the current mode of operation.
•When this bit is 1, the Pro Mode register set is selected
•When this bit is 0, the Compatibility Mode register set is selected.
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Bit Name Description
HealthGrn
(HLTH)
This bit controls and indicates the state of the card’s health LED.
•When this bit is 1, and thewatchdog has not timed out, the LED is green.
•When this bit is 0, the LED is red.
•When the watchdog has timed out, theLED is red.
WDInh
(WDI)
This bit controls and indicates whether or not the card’s watchdog is enabled.
•When this bit is 0, the watchdog is enabled.
•When this bit is 1, the watchdog is inhibited.
CardRun
(RUN)
This bit controls and indicates whether or not the card’s processor is running.
•When this bit is 0, the processor is halted.
•When this bit is 1, the processor is running, unless the watchdog has timed
out.
This bit must remain low for at least 50 µs to guarantee proper reset.
4.3.4 Identification Register - IDR - Base Address + 7
IDR at Base Address + 7 is identical to that of ProMode. Refer to section 4.2.10.
4.4 PCI Configuration
Upon power up, the PCI Configuration is as follows.
PCI CFG
Register
Address
Register Function
32 24 23 16 15 8 7
0
PCI
Writable
0x00 Device ID
0x9050 Vendor ID 0x10B5 N
0x04 Status
0x0000 Command 0x0000 Y
0x08 Class Code
0x028000 Revision ID Factory set N
0x0C BIST
0x00 Header ID 0x00 PCI Latency
0x00 CacheLineSize
0x00 Y[7:0]
0x10 PCI Base Address 0 for Memory-Mapped Config Registers
0xFFFFFF80 Y
0x14 PCI Base Address 1 for IO-Mapped Config Registers
0x00000000 Y
0x18 PCI Base Address 2 for Local Address Space 0
Shared RAM Access Window
0xFFFC0000 Y
0x1C PCI Base Address 3 for Local Address Space 1
I/O Space Access Window
0xFFFFFFF9 Y
0x20 PCI Base Address 4 for Local Address Space 2
0x0000000 Y
0x24 PCI Base Address 5 for Local Address Space 3
0x00000000 Y
0x28 Cardbus CIS Pointer (Not supported)
0x00000000 N
0x2C Subsystem ID
0x0010 Subsystem Vendor ID 0x133D N
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PCI CFG
Register
Address
Register Function
32 24 23 16 15 8 7
0
PCI
Writable
0x30 PCI Base Address for Local Expansion ROM
0x00000000 Y
0x34 Reserved
0x00000000 N
0x38 Reserved
0x00000000 N
0x3C Max_Lat
0x00 Min_Gnt 0x00 Interrupt Pin 0x01 Interrupt Line 0x00 Y[7:0]
4.5 Application Module Header
Applications for the 5136-DNP-CPCI card are based on an event-driven kernel. This kernel provides an abstract
hardware interface, startup self-diagnostics and common services such as timers and event management.
The kernel reserves the first 128 bytes of the host interface block for loader interface and run-time status
information common to all 5136-DNP-CPCI applications. This area is called the Application Module Header.
4.5.1 Data Type Descriptions
Data Type Description
CHAR 8-bit ASCII character, 1 byte
UINT1 unsigned integer, 1 byte
SINT1 signed integer, 1 byte
UINT2 unsigned integer, 2 bytes
SINT2 signed integer, 2 bytes
UINT4 unsigned integer, 4 bytes
4.5.2 Byte Ordering
The 5136-DNP-CPCI interface card uses Intel style byte ordering for multi-byte entities LSB-low address and
MSB-high address. If your host system uses Motorola byte ordering (MSB-low address and LSB-high address) you
must compensate for byte ordering in software.
The following macro will compensate for byte ordering in a 16-bit data entity.
#define SWAP_WORD (WordData) ((WordData<<8) | (WordData>>8))
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4.5.3 Application Module Header
The following table defines the layout of the Application Module Header. The non-shaded sections of the table are
common to all application modules for the 5136-DNP-CPCI. The shaded areas are either optional or the function is
determined by the application module. See the application module reference guide for details.
Offset Name Data Type Description
0000h ModuleType CHAR[2] "DN" (0444eh) = card OK
"ER" (04552h) = fatal error
0002h WinSize UINT2 Set by loader to indicate host interface window size.
0 = 16K, 1 = 32K, 2 = 64K, 3=128K
0004h CardId UINT2 For host application use
0006h Kernel Id UINT2 Kernel identification.
0x01 = CAN 2.0A kernel
0x02 = CAN 2.0B kernel
0008h Kernel Rev UINT2 Kernel Revision
000ah ModuleId UINT2 Module Id.
000ch ModuleRev UINT2 Module revision.
000eh NetSerial UINT4 DeviceNet serial number.
0012h CardType CHAR[16] Card type. (i.e. "5136-DNP-CPCI")
0022h CardSerial CHAR[8] Card Serial number.
002ah IrqControl1UINT2 Card interrupt control.
002ch IrqStatusA1UINT1 Card interrupt status.
002dh IrqStatusB1UINT1
002eh MainCode1UINT2 Main Application Error Code
0030h CanStatus UINT2 CAN status word.
0032h CanTx UINT2 CAN transmit counter. Incremented when messages are
submitted to the CAN controller.
0034h CanAck UINT2 CAN ack error counter. Incremented when a transmit message is
aborted due to lack of acknowledgment from other stations. When
CanAck is incremented, CanTx is decremented to compensate for
messages not actually transmitted.
0036h CanRx2UINT2 CAN receive counter. Incremented when messages are received.
Messages that fail the receive filter still increment CanRx.
0038h CanError UINT2 CAN communication error counter. Incremented when a CAN
frame error is detected.
003ah CanLost2UINT2 CAN lost messages counter. Incremented when a CAN message
is received before the previous one is queued.
003ch CanOverrun2UINT2 CAN receive queue overrun counter. Incremented when a CAN
message is lost due to a full receive queue.
003eh AddCode1UINT2 Additional Application Error Code
0040h Message CHAR[60] When ModuleType is "DN", contains the module identification
string. When ModuleType is "ER”, contains the kernel error string.
007ch MajorTickInterval UINT2 Major Tick Interval (equivalent of system timebase)
007eh MinorTickCount UINT2 Number of minor ticks per major tick interval
0080h Application1Undefined Application host interface. The format of this area is defined by the
application module.
1Format / meaning defined by the application module, see module documentation
2Maynot be supported by the application module, see module documentation
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5136-DNP-CPCI Hardware Reference
© 1999 SST/Woodhead Canada Limited 15
4.6 Loading an Application Module in Compatible Mode
The following sections describe the sequence of steps to load an application module into the 5136-DNP-CPCI card.
The loader application provided with the software handles this process. For register descriptions, see section 4.3.
4.6.1 Test for 5136-DNP-CPCI at I/O port address specified
1. Write zero to each of the configuration registers (BCR0, BCR1 and BCR2) in case of a re-load condition.
2. Write 0x06 to BCR0.
3. Read BCR0. It should contain 0x02.
4. Write 0x00 to BCR0.
5. Read BCR0. It should contain 0x00.
6. (Optional) Read IDR. This register should contain 0x0D.
4.6.2 Check for conflicting RAM
During these steps, disable operating system task switching, interrupts and any other processes that may be using
the target memory.
1. Read a word from the target memory block and save it.
2. Write 0xAA55 to the target address.
3. Read the target address. It should not contain 0xAA55.
4. If the result is 0xAA55, restore the saved contents of the target address and abort the load procedure.
5. Refer to section 4.6.10 for further instructions.
6. Repeat steps 1-3 for the entire target memory block.
4.6.3 Enable and test the card RAM
1. Write MemBase in BCR1 to set the card RAM base address.
2. Set MemEn in BCR0 to enable card memory.
3. Select memory bank as required by writing to Bank in BCR0.
4. Fill the memory bank with a test pattern.
5. We recommend storing the byte offset as a 16-bit value in each word of memory (for example, write
0x0000 to the first word, 0x0002 to the next word and so on).
6. Read and verify the test pattern written in step 4.
7. If the memory test fails, abort the load procedure.
8. Refer to section 4.6.10 for further instructions.
9. Fill the memory bank with 0.
10. Repeat steps 3-7 for all other memory banks.
4.6.4 Load the application module
Select the memory bank as required in the following steps by writing to Bank in BCR0.
1. Write the application module to banks 4, 5, 6 and 7.
2. The application binary file is 65535 bytes in length; the last byte of bank 7 is unused.
3. Calculate the sum of all of the bytes in banks 4, 5, 6 and 7 except the last byte of bank 7 (unused). The
least significant byte of the result should be zero.
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