Star Lake SCH200 User manual

User’s Manual
Revision Date: June. 10. 2020
SCH200
IEC-61850-3, IEEE-1613 1U Fanless
Power Automation Computer

SCH200 User’s Manual
Revision Date: June. 10. 2020
1
Safety Information
Electrical safety
To prevent electrical shock hazard, disconnect the power cable fro the electrical outlet before relocating the
syste .
When adding or re oving devices to or fro the syste , ensure that the power cables for the devices are
unplugged before the signal cables are connected. If possible, disconnect all power cables fro the existing
syste before you add a device.
Before connecting or re oving signal cables fro the otherboard, ensure that all power cables are unplugged.
Seek professional assistance before using an adapter or extension cord. These devices could interrupt the
grounding circuit.
Make sure that your power supply is set to the correct voltage in your area.
If you are not sure about the voltage of the electrical outlet you are using, contact your local power co pany.
If the power supply is broken, do not try to fix it by yourself. Contact a qualified service technician or your local
distributor.
Operation safety
Before installing the otherboard and adding devices on it, carefully read all the anuals that ca e with the
package.
Before using the product, ake sure all cables are correctly connected and the power cables are not da aged. If
you detect any da age, contact your dealer i ediately.
To avoid short circuits, keep paper clips, screws, and staples away fro connectors, slots, sockets and circuitry.
Avoid dust, hu idity, and te perature extre es. Do not place the product in any area where it ay beco e
wet.
Place the product on a stable surface.
If you encounter any technical proble s with the product, contact your local distributor
Statement
All rights reserved. No part of this publication ay be reproduced in any for or by any eans, without prior
written per ission fro the publisher.
All trade arks are the properties of the respective owners.
All product specifications are subject to change without prior notice

SCH200 User’s Manual
Revision Date: June. 10. 2020
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Revision History
Revision Date (yyyy/ /dd) Changes
V1.0 2020/06/10 First release
Packing list
Item Description Q’ty
1 SCH200 E bedded Syste 1
2 Driver CD 1
3 3-pin Ter inal Block Power Connector (For DC Power Input) 1
If any of the above items is damaged or missing, please contact your local distributor

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Revision Date: June. 10. 2020
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Table Contents
Safety Information
Chapter 1: Produ t Introdu tion
1.1 Spe ifi ations
1.2 Front Panel i/o Pla ement
1.3 Me hani al Dimension
Chapter 2: The Internal Headers and Conne tors
2.1 Front Panel Conne tor
2.2 LVDS onne tor
2.3 eDP Conne tor
2.4 LVDS inverter power header pin-out
2.5 Dual USB 2.0
2.6 USB 2.0 pin-out
2.7 FP Audio pin-out
2.8 Internal speaker pin-out
2.9 Serial port header pin-out
2.10 CMOS Clear Header
2.11 M.2 Mkey slot for storage pin-out
2.12 M.2 E key slot For wireless pin-out
2.13 SATA Power Cable pin-out
2.14 SATA Header pin-out
2.15 Panel Power header pin-out (MB Lo ation J20)
2.16 MiAPI Header
2.17 Mini PCIe so ket
2.18 TPM Header
Chapter 3: BIOS Spe ifi ation
3.1 MAIN PAGE
3.2 ADVANCED PAGE
3.3 CHIPSET PAGE
3.4 SECURITY PAGE
3.5 BOOT PAGE
3.6 SAVE & EXIT PAGE
3.7 RECOVERY PAGE(ACTIVE FOR 3.4.3 SECURE FLASH UPDATE ONLY)

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Chapter 1: Produ t Introdu tion
1.1 Spe ifi ations
System
CPU Socket LGA 1151 for Intel® Core i7/i5/i3/Celeron® (Supports up to 65W)
Intel®
Me ory type 2 x SO-DIMM DDR4 2400/2666 MHz up to 64GB
Chipset Intel® Q370 Chipset
Display
Display Port
HDMI
Resolution up to 4096 x 2304 60@Hz
Resolution up to 4096 x 2160 30@Hz
Storage
M.2 Up to 1TB
SSD RAID 0/1 (Optional)
Ethernet
Ethernet 2 x 100Base-FX port supported
2 x 100Base-TX port supported
Rear I/O
Display 1 x Display port
1 x HDMI port
Ethernet 4 x RJ45 ( 100Base-FX/ 2 x 100Base-TX Ethernet odule, optional)
Audio 2 x 3.5 Audio Jacks (1 x MIC, 1 x Line-Out)
USB 4 x USB 3.0
DC-IN 2 x DC-in (Redundant Optional)
Button 1 x Power Button w/Indicator LED
COM 8 x ports (6 x RS-232/422/485 support, 2 x RS-232)
Power Requirement
Power Input 12V DC-in
Appli ations, Operating System
Applications Energy/S art Grid/Power Plant Manage ent, Intelligent Auto ation and
anufacturing applications

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Operating Syste Windows 10 64Bit ,Windows server 2012 r2, Windows server 2016
Ubuntu13.04, Ubuntu13.10, Ubuntu14.04, Fedora20
Physi al
Di ension 450 x 482 x 44 (W x D x H)
Operation Te p. -20°C to 60°C
Storage Te p. -40°C to 85°C
Relative Hu idity 5% to 95%, non-condensing
Syste Design Conduction Cooing
Heatsink Alu inu Alloy, Corrosion Resistant
Finish Anodic alu inu oxide
Environment
MIL-STD-810G Test
Operating Tests
Low Te perature Method 502.5
Procedure 2
exposure(24h x 3 cycle) at -40℃
in.
High Te perature Method 501.5
Procedure 2
60ºC for 2 hours after te perature
stabilization.
Hu idity Method 507.5
Procedure 2
RH -95%. Test cycles: ten 24-hours ,
functional test after 5th and 10th
cycles
Vibration Method 514.6
Category 20
10—500Hz 1.04Gr s
Test duration: 1 hours x 3 axis (total
3 hours)
Shock Method 516.6
Procedure 1 20G, 11 Sec, 3 per axis
Non-Operating Tests
Low Te perature Storage Method 502.5 exposure(24h x 7 cycle) at -40℃
in.
High Te perature Storage Method 501.5
Procedure 1
71ºC for 2 hours after te perature
stabilization.

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Vibration Method 514.6
Category 24
200 to 2000Hz
Test duration: One hour per axis; r s
= 7.7 gs
Shock Method 516.6
Procedure V 40G, 11 s, 3 pluse.
1.2 Front Panel i/o Pla ement
1 COM x 8
2 USB 3.0 x 4
3 LAN x 4
4 Display Port x 1
5 Audio Jack (Mic-in, Line-out)
6 Power Button with LED light x1
7 DC-IN x 2

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1.3 Me hani al Dimension

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Chapter 2: The Internal Headers and Conne tors
2.11 Front Panel Conne tor
Figure 1 : Front Panel Connector
Pin Signal Name Description Pin Signal Name Description
1
HDD_POWER_LED
Pull-up resistor (750 )
to +5V
2
POWER_LED_MAI
N
[Out] Front panel
LED (Green)
3 HDD_LED# [Out] Hard disk activity
LED
4 POWER_LED_ALT
[Out] Front panel
LED (Yellow)
5 GROUND Ground 6 POWER_SWITCH# Power button
7 RESET_SWITCH# Reset switch 8 GROUND Ground
9 +5V_DC Power 10 KEY No pin
Table 1: Front Panel Connector
2.2 LVDS onne tor
Figure 2: LVDS Connector

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Pin Signal Description
1 TD0P LVDS Channel A diff data output - positive
2 TD0N LVDS Channel A diff data output - negative
3 TC0P LVDS Channel A diff data output - positive
4 TC0N LVDS Channel A diff data output - negative
5 TB0P LVDS Channel A diff data output - positive
6 TB0N LVDS Channel A diff data output - negative
7 TA0P LVDS Channel A diff data output - positive
8 TA0N LVDS Channel A diff data output - negative
9 TD1P LVDS Channel B diff data output-positive
10 TD1N LVDS Channel B diff data output-negative
11 TC1P LVDS Channel B diff data output-positive
12 TC1N LVDS Channel B diff data output-negative
13 TB1P LVDS Channel B diff data output-positive
14 TB1N LVDS Channel B diff data output-negative
15 TA1P LVDS Channel B diff data output-positive
16 TA1N LVDS Channel B diff data output-negative
17 GND Ground
18 3.3V/5V/12V Selectable LCD power output
19 3.3V/5V/12V Selectable LCD power output
20 3.3V/5V/12V Selectable LCD power output
21 NC NC
22 VCC3 VCC
23 CABLE_ID2 Ground (reserve for MiTAC AIO CABLE_ID2)
24 GND Ground
25 GND Ground
26 TCK0P LVDS Channel A diff data output - positive
27 TCK0N LVDS Channel A diff data output - negative
28 GND Ground
29 GND Ground

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30 CABLE_ID3 Ground (reserve for MiTAC AIO CABLE_ID3)
31 LVDS_DDC_SCL LVDS_DDC_SCL
32 CABLE_ID1 Ground (reserve for MiTAC AIO CABLE_ID1)
33 PS8625_BKLT_CTRL PS8625_BKLT_CTRL
34 TCK1P LVDS Channel B diff data output - positive
35 TCK1N LVDS Channel B diff data output - negative
36 NC NC
37 NC NC
38 NC NC
39 CABLE_ID4 Ground (reserve for MiTAC AIO CABLE_ID4)
40 NC NC
Table 2: 40-pin LVDS data header pin-out reference
2.3 eDP Conne tor
Figure 3: eDP Connector
Pin Signal Description
1 NC NC
2 GND Ground
3
EDP_CPU_3- MAIN LINK
4
EDP_CPU_3+ MAIN LINK
5 GND Ground
6
EDP_CPU_2- MAIN LINK
7
EDP_CPU_2+ MAIN LINK
8 GND Ground
9
EDP_CPU_1- MAIN LINK

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10
EDP_CPU_1+ MAIN LINK
11 GND Ground
12
EDP_CPU_0- MAIN LINK
13
EDP_CPU_0+ MAIN LINK
14 GND Ground
15 EDP_CPU_AUX+ Aux channel
16 EDP_CPU_AUX- Aux channel
17 GND Ground
18 LCD_VCC Selectable LCD power output
19 LCD_VCC Selectable LCD power output
20 LCD_VCC Selectable LCD power output
21 LCD_VCC Selectable LCD power output
22 NC NC
23 NC NC
24 GND Ground
25 GND Ground
26 GND Ground
27 HPDET Hot plug detection
28 GND Ground
29 GND Ground
30 NC NC
31 GND Ground
32 BKLT_EN BKLT_EN
33
PCH_BACKLIGHT_PWM PCH_BACKLIGHT_PWM
34 NC NC
35 NC NC
36 BKLT_PWR Selectable BKLT power output
37 BKLT_PWR Selectable BKLT power output
38 BKLT_PWR Selectable BKLT power output

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39 BKLT_PWR Selectable BKLT power output
40 NC NC
Table 3: 40-pin eDP data header pin-out reference
2.4 LVDS inverter power header pin-out
Figure 4: LVDS inverter power header pin-out
Pin Signal Name Description
1 LVDS_BKTEN_R Backlight enable
2 LVDS_PWM Backlight PWM control
3 12V/19V Inverter power
4 12V/19V Inverter power
5 GND Ground
6 GND Ground
7 BRIGHT_UP- BRIGHTNESS UP
8 BRIGHT_DOWN- BRIGHTNESS DOWN
Table 4: 8-pin LVDS inverter power header signals
2.5 Dual USB 2.0
Figure 5: Dual USB2 0 pin-out

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Pin Signal Pin Signal
1 5V_USB 2 5V_USB
3 Data (negative) 4 Data (negative)
5 Data (positive) 6 Data (positive)
7 Ground 8 Ground
9 Key (no pin) 10 No Connect
Table 5: Dual USB 2 0 Header
2.6 USB 2.0 pin-out
Figure 6: USB2 0 pin-out
Pin Signal
1 5V_USB
2 Data (negative)
3 Data (positive)
4 Ground
9 Key (no pin)
Table 6 USB 2 0 Header
2.7 FP Audio pin-out
Figure 7: FP Audio pin-out

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Pin Signal Name Description
1 MIC Front panel icrophone input signal
2 AUD_GND Ground used by analog audio circuits
3 MIC_BIAS
Microphone power / additional MIC
input for stereo icrophone support
4 Presence
Active low signal that signals bios that an
audio dongle is connected to the
analog header
5 FP_OUT_R Right channel audio signal to front panel
6 AUD_GND Ground used by analog audio circuits
7 Reserved reserved
8 Key No pin
9 FP_OUT_L Left channel audio signal to front panel
10 AUD_GND Ground used by analog audio circults
Table 7: FP Audio Header
2.8 Internal speaker pin-out
Pin Signal Name
1 Front_L-
2 Front_L+
3 Front_R+
4 Front_R-
Table 8: Internal header signals

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2.9 Serial port header pin-out
Figure 9: Serial port header pin-out
Pin Signal Name
1 DCD
2 RXD#
3 TXD#
4 DTR
5 GND
6 DSR
7 RTS
8 CTS
9 RI
10 Key(no pin)
Table 9 Serial port header pin-out
2.10 CMOS Clear Header
Figure 10: CMOS Clear Header
1-2 Clear CMOS
2-3 Nor al
Table 10: CMOS Clear behavior

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2.11 M.2 Mkey slot for storage pin-out
Figure 11: M.2 M key slot For Storage pin-out
74 3.3Vaux GND 75
72 3.3Vaux GND 73
70 3.3Vaux GND 71
68 SUSCLK(32kHz)(O)(0/3.3V) PEDET(OC-PCIe/GND-SATA) 69
Connector Key N/C
67
Connector Key Connector Key
Connector Key Connector Key
Connector Key Connector Key
58 N/C Connector Key
56 N/C GND 57
54 PEWake#(IO){0/3.3V}or N/C REFCLKP 55
52 PERST#(O)(0/3.3V) or N/C REFCLKN 53
50 PERST#(O)(0/3.3V) or N/C GND 51
48 N/C PETp0/SATA-A+ 49
46 N/C PETn0/SATA-A- 47
44 N/C GND 45
42 N/C PERp0/SATA-B- 43
40 N/C PERn0/SATA-B+ 41
38 DEVSLP(O){0/3.3V} GND 39
36 N/C PETp1 37
34 N/C PETn1 35

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32 N/C GND 33
30 N/C PERp1 31
28 N/C PERn1 29
26 N/C GND 27
24 N/C N/C 25
22 N/C N/C 23
20 N/C GND 21
18 3.3Vaux N/C 19
16 3.3Vaux N/C 17
14 3.3Vaux GND 15
12 3.3Vaux N/C 13
10 DAS/DSS#(I){OD} N/C 11
8 N/C GND 9
6 N/C N/C 7
4 3.3Vaux N/C 5
2 3.3Vaux GND 3
GND
1
Table 11: M.2 M key slot For Storage signals
2.12 M.2 E key slot For wireless pin-out
Figure 12: M 2 E key slot For wireless pin-out

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Table 12: M 2 E key slot For wireless signals
2.13 SATA Power Cable pin-out
Figure 13: SATA Power Cable pin-out

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Pin Signal Name Description
1 VCC3 Power
2 GND Ground
3 VCC3 Power
4 GND Ground
5 +12V Power
Table 13: SATA Power Cable signals
2.14 SATA Header pin-out
Figure 14: SATA Header pin-out
Pin Signal Name Description
1 GND Ground
2 SATAHDR_TXP0_C SATA DATA Trans it(positive)
3 SATAHDR_TXN0_C SATA DATA Trans it(negative)
4 GND Ground
5 SATAHDR_RXN0_C SATA DATA Receive(negative)
6 SATAHDR_RXP0_C SATA DATA Receive(positive)
7 GND Ground
8 G1 NC
9 G2 NC
Table 14: SATA Header signals